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developerf64861f2022-06-22 11:44:53 +08001From bc23057e7ba6d15de91adc11be0093e672a87dbb Mon Sep 17 00:00:00 2001
developere2cc0fa2022-03-29 17:31:03 +08002From: MeiChia Chiu <meichia.chiu@mediatek.com>
developerf64861f2022-06-22 11:44:53 +08003Date: Wed, 22 Jun 2022 10:45:53 +0800
4Subject: [PATCH 1004/1008] mt76: mt7915: add support for muru_onoff via
developerbd398d52022-06-06 20:53:24 +08005 debugfs
developere2cc0fa2022-03-29 17:31:03 +08006
7---
developerf64861f2022-06-22 11:44:53 +08008 .../net/wireless/mediatek/mt76/mt7915/init.c | 1 +
9 .../net/wireless/mediatek/mt76/mt7915/mcu.c | 9 +++--
10 .../net/wireless/mediatek/mt76/mt7915/mcu.h | 6 ++++
11 .../wireless/mediatek/mt76/mt7915/mt7915.h | 1 +
12 .../mediatek/mt76/mt7915/mtk_debugfs.c | 33 +++++++++++++++++++
13 5 files changed, 48 insertions(+), 2 deletions(-)
developere2cc0fa2022-03-29 17:31:03 +080014
15diff --git a/mt7915/init.c b/mt7915/init.c
developerf64861f2022-06-22 11:44:53 +080016index fa9568ca..6e2a1c13 100644
developere2cc0fa2022-03-29 17:31:03 +080017--- a/mt7915/init.c
18+++ b/mt7915/init.c
developerf64861f2022-06-22 11:44:53 +080019@@ -577,6 +577,7 @@ static void mt7915_init_work(struct work_struct *work)
developere2cc0fa2022-03-29 17:31:03 +080020 mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband);
21 mt7915_init_txpower(dev, &dev->mphy.sband_6g.sband);
22 mt7915_txbf_init(dev);
23+ dev->dbg.muru_onoff = OFDMA_DL | MUMIMO_UL | MUMIMO_DL;
24 }
25
26 void mt7915_wfsys_reset(struct mt7915_dev *dev)
27diff --git a/mt7915/mcu.c b/mt7915/mcu.c
developerf64861f2022-06-22 11:44:53 +080028index 5e87db13..3ee1db4e 100644
developere2cc0fa2022-03-29 17:31:03 +080029--- a/mt7915/mcu.c
30+++ b/mt7915/mcu.c
developerf64861f2022-06-22 11:44:53 +080031@@ -856,13 +856,18 @@ mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
developere2cc0fa2022-03-29 17:31:03 +080032
33 muru = (struct sta_rec_muru *)tlv;
34
35- muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer ||
36+ muru->cfg.mimo_dl_en = (mvif->cap.he_mu_ebfer ||
37 mvif->cap.vht_mu_ebfer ||
38- mvif->cap.vht_mu_ebfee;
developere2cc0fa2022-03-29 17:31:03 +080039+ mvif->cap.vht_mu_ebfee) &&
40+ !!(dev->dbg.muru_onoff & MUMIMO_DL);
developerf64861f2022-06-22 11:44:53 +080041 if (!is_mt7915(&dev->mt76))
42 muru->cfg.mimo_ul_en = true;
43 muru->cfg.ofdma_dl_en = true;
44
developere2cc0fa2022-03-29 17:31:03 +080045+ muru->cfg.mimo_ul_en = !!(dev->dbg.muru_onoff & MUMIMO_UL);
46+ muru->cfg.ofdma_dl_en = !!(dev->dbg.muru_onoff & OFDMA_DL);
47+ muru->cfg.ofdma_ul_en = !!(dev->dbg.muru_onoff & OFDMA_UL);
developerf64861f2022-06-22 11:44:53 +080048+
developere2cc0fa2022-03-29 17:31:03 +080049 if (sta->vht_cap.vht_supported)
50 muru->mimo_dl.vht_mu_bfee =
developerf64861f2022-06-22 11:44:53 +080051 !!(sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
developere2cc0fa2022-03-29 17:31:03 +080052diff --git a/mt7915/mcu.h b/mt7915/mcu.h
developerf64861f2022-06-22 11:44:53 +080053index ec8887b5..92715b97 100644
developere2cc0fa2022-03-29 17:31:03 +080054--- a/mt7915/mcu.h
55+++ b/mt7915/mcu.h
developerf64861f2022-06-22 11:44:53 +080056@@ -552,4 +552,10 @@ struct csi_data {
developere2cc0fa2022-03-29 17:31:03 +080057 };
58 #endif
59
60+/* MURU */
61+#define OFDMA_DL BIT(0)
62+#define OFDMA_UL BIT(1)
63+#define MUMIMO_DL BIT(2)
64+#define MUMIMO_UL BIT(3)
65+
66 #endif
67diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developerf64861f2022-06-22 11:44:53 +080068index b2b9b7ec..c4f8a6ad 100644
developere2cc0fa2022-03-29 17:31:03 +080069--- a/mt7915/mt7915.h
70+++ b/mt7915/mt7915.h
developerf64861f2022-06-22 11:44:53 +080071@@ -402,6 +402,7 @@ struct mt7915_dev {
developere2cc0fa2022-03-29 17:31:03 +080072 bool dump_rx_pkt;
73 bool dump_rx_raw;
74 u32 token_idx;
75+ u8 muru_onoff;
76 } dbg;
77 const struct mt7915_dbg_reg_desc *dbg_reg;
78 #endif
79diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c
developer68e1eb22022-05-09 17:02:12 +080080index ccaaea78..d2dbae45 100644
developere2cc0fa2022-03-29 17:31:03 +080081--- a/mt7915/mtk_debugfs.c
82+++ b/mt7915/mtk_debugfs.c
developer68e1eb22022-05-09 17:02:12 +080083@@ -2480,6 +2480,38 @@ static int mt7915_token_txd_read(struct seq_file *s, void *data)
developere2cc0fa2022-03-29 17:31:03 +080084 return 0;
85 }
86
87+static int mt7915_muru_onoff_get(void *data, u64 *val)
88+{
89+ struct mt7915_dev *dev = data;
90+
91+ *val = dev->dbg.muru_onoff;
92+
93+ printk("mumimo ul:%d, mumimo dl:%d, ofdma ul:%d, ofdma dl:%d\n",
94+ !!(dev->dbg.muru_onoff & MUMIMO_UL),
95+ !!(dev->dbg.muru_onoff & MUMIMO_DL),
96+ !!(dev->dbg.muru_onoff & OFDMA_UL),
97+ !!(dev->dbg.muru_onoff & OFDMA_DL));
98+
99+ return 0;
100+}
101+
102+static int mt7915_muru_onoff_set(void *data, u64 val)
103+{
104+ struct mt7915_dev *dev = data;
105+
106+ if (val > 15) {
107+ printk("Wrong value! The value is between 0 ~ 15.\n");
108+ goto exit;
109+ }
110+
111+ dev->dbg.muru_onoff = val;
112+exit:
113+ return 0;
114+}
115+
116+DEFINE_DEBUGFS_ATTRIBUTE(fops_muru_onoff, mt7915_muru_onoff_get,
117+ mt7915_muru_onoff_set, "%llx\n");
118+
119 static int mt7915_amsduinfo_read(struct seq_file *s, void *data)
120 {
121 struct mt7915_dev *dev = dev_get_drvdata(s->private);
developer68e1eb22022-05-09 17:02:12 +0800122@@ -2857,6 +2889,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir)
developere2cc0fa2022-03-29 17:31:03 +0800123
124 mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
125
126+ debugfs_create_file("muru_onoff", 0600, dir, dev, &fops_muru_onoff);
127 debugfs_create_file("fw_debug_module", 0600, dir, dev,
128 &fops_fw_debug_module);
129 debugfs_create_file("fw_debug_level", 0600, dir, dev,
130--
developerf64861f2022-06-22 11:44:53 +08001312.25.1
developere2cc0fa2022-03-29 17:31:03 +0800132