developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 1 | From 23e3cea0589cd65b9c405f23720e4ba8b1264cb3 Mon Sep 17 00:00:00 2001 |
| 2 | From: Sam Shih <sam.shih@mediatek.com> |
| 3 | Date: Fri, 2 Jun 2023 13:06:00 +0800 |
| 4 | Subject: [PATCH] |
| 5 | [backport-networking-drivers][999-1704-net-phy-aquantia-add-AQR113C.patch] |
| 6 | |
| 7 | --- |
| 8 | drivers/net/phy/aquantia_main.c | 45 +++++++++++++++------------------ |
| 9 | 1 file changed, 21 insertions(+), 24 deletions(-) |
| 10 | |
developer | d6c38c2 | 2022-07-01 08:37:26 +0800 | [diff] [blame] | 11 | diff --git a/drivers/net/phy/aquantia_main.c b/drivers/net/phy/aquantia_main.c |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 12 | index 75d8351ee..e7495c9a7 100644 |
developer | d6c38c2 | 2022-07-01 08:37:26 +0800 | [diff] [blame] | 13 | --- a/drivers/net/phy/aquantia_main.c |
| 14 | +++ b/drivers/net/phy/aquantia_main.c |
| 15 | @@ -22,6 +22,7 @@ |
| 16 | #define PHY_ID_AQR107 0x03a1b4e0 |
| 17 | #define PHY_ID_AQCS109 0x03a1b5c2 |
| 18 | #define PHY_ID_AQR405 0x03a1b4b0 |
| 19 | +#define PHY_ID_AQR113C 0x31c31c12 |
| 20 | |
| 21 | #define MDIO_PHYXS_VEND_IF_STATUS 0xe812 |
| 22 | #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3) |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 23 | @@ -303,17 +304,6 @@ static int aqr_read_status(struct phy_device *phydev) |
developer | d7641da | 2023-02-24 13:56:03 +0800 | [diff] [blame] | 24 | return genphy_c45_read_status(phydev); |
| 25 | } |
| 26 | |
| 27 | -static int aqr107_read_downshift_event(struct phy_device *phydev) |
| 28 | -{ |
| 29 | - int val; |
| 30 | - |
| 31 | - val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_STATUS1); |
| 32 | - if (val < 0) |
| 33 | - return val; |
| 34 | - |
| 35 | - return !!(val & MDIO_AN_TX_VEND_INT_STATUS1_DOWNSHIFT); |
| 36 | -} |
| 37 | - |
| 38 | static int aqr107_read_rate(struct phy_device *phydev) |
| 39 | { |
| 40 | int val; |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 41 | @@ -388,13 +378,7 @@ static int aqr107_read_status(struct phy_device *phydev) |
developer | c7f3c9a | 2022-11-30 09:13:46 +0800 | [diff] [blame] | 42 | break; |
| 43 | } |
| 44 | |
developer | d7641da | 2023-02-24 13:56:03 +0800 | [diff] [blame] | 45 | - val = aqr107_read_downshift_event(phydev); |
| 46 | - if (val <= 0) |
| 47 | - return val; |
| 48 | - |
| 49 | - phydev_warn(phydev, "Downshift occurred! Cabling may be defective.\n"); |
| 50 | - |
| 51 | - /* Read downshifted rate from vendor register */ |
| 52 | + /* Read possibly downshifted rate from vendor register */ |
| 53 | return aqr107_read_rate(phydev); |
| 54 | } |
| 55 | |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 56 | @@ -516,9 +500,6 @@ static int aqr107_config_init(struct phy_device *phydev) |
developer | d7641da | 2023-02-24 13:56:03 +0800 | [diff] [blame] | 57 | if (!ret) |
| 58 | aqr107_chip_info(phydev); |
| 59 | |
| 60 | - /* ensure that a latched downshift event is cleared */ |
| 61 | - aqr107_read_downshift_event(phydev); |
| 62 | - |
| 63 | return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); |
| 64 | } |
| 65 | |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 66 | @@ -543,9 +524,6 @@ static int aqcs109_config_init(struct phy_device *phydev) |
developer | d7641da | 2023-02-24 13:56:03 +0800 | [diff] [blame] | 67 | if (ret) |
| 68 | return ret; |
| 69 | |
| 70 | - /* ensure that a latched downshift event is cleared */ |
| 71 | - aqr107_read_downshift_event(phydev); |
| 72 | - |
| 73 | return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); |
| 74 | } |
| 75 | |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 76 | @@ -695,6 +673,24 @@ static struct phy_driver aqr_driver[] = { |
developer | d6c38c2 | 2022-07-01 08:37:26 +0800 | [diff] [blame] | 77 | .ack_interrupt = aqr_ack_interrupt, |
| 78 | .read_status = aqr_read_status, |
| 79 | }, |
| 80 | +{ |
| 81 | + PHY_ID_MATCH_MODEL(PHY_ID_AQR113C), |
| 82 | + .name = "Aquantia AQR113C", |
| 83 | + .probe = aqr107_probe, |
| 84 | + .config_init = aqr107_config_init, |
| 85 | + .config_aneg = aqr_config_aneg, |
| 86 | + .config_intr = aqr_config_intr, |
| 87 | + .ack_interrupt = aqr_ack_interrupt, |
| 88 | + .read_status = aqr107_read_status, |
| 89 | + .get_tunable = aqr107_get_tunable, |
| 90 | + .set_tunable = aqr107_set_tunable, |
| 91 | + .suspend = aqr107_suspend, |
| 92 | + .resume = aqr107_resume, |
| 93 | + .get_sset_count = aqr107_get_sset_count, |
| 94 | + .get_strings = aqr107_get_strings, |
| 95 | + .get_stats = aqr107_get_stats, |
| 96 | + .link_change_notify = aqr107_link_change_notify, |
| 97 | +}, |
| 98 | }; |
| 99 | |
| 100 | module_phy_driver(aqr_driver); |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 101 | @@ -707,6 +703,7 @@ static struct mdio_device_id __maybe_unused aqr_tbl[] = { |
developer | d6c38c2 | 2022-07-01 08:37:26 +0800 | [diff] [blame] | 102 | { PHY_ID_MATCH_MODEL(PHY_ID_AQR107) }, |
| 103 | { PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) }, |
| 104 | { PHY_ID_MATCH_MODEL(PHY_ID_AQR405) }, |
| 105 | + { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) }, |
| 106 | { } |
| 107 | }; |
| 108 | |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 109 | -- |
| 110 | 2.34.1 |
| 111 | |