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developer02e65912023-08-17 16:33:10 +08001/* eip202_cd_format.c
2 *
3 * EIP-202 Ring Control Driver Library
4 * Command Descriptor Internal interface
5 *
6 * This module contains the EIP-202 Command Descriptor specific functionality
7 */
8
9/* -------------------------------------------------------------------------- */
10/* */
11/* Module : ddk197 */
12/* Version : 5.6.1 */
13/* Configuration : DDK-197-GPL */
14/* */
15/* Date : 2022-Dec-16 */
16/* */
17/* Copyright (c) 2008-2022 by Rambus, Inc. and/or its subsidiaries. */
18/* */
19/* This program is free software: you can redistribute it and/or modify */
20/* it under the terms of the GNU General Public License as published by */
21/* the Free Software Foundation, either version 2 of the License, or */
22/* any later version. */
23/* */
24/* This program is distributed in the hope that it will be useful, */
25/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
26/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
27/* GNU General Public License for more details. */
28/* */
29/* You should have received a copy of the GNU General Public License */
30/* along with this program. If not, see <http://www.gnu.org/licenses/>. */
31/* -------------------------------------------------------------------------- */
32
33/*----------------------------------------------------------------------------
34 * This module implements (provides) the following interface(s):
35 */
36
37#include "eip202_cd_format.h"
38
39// Descriptor I/O Driver Library API implementation
40#include "eip202_cdr.h" // EIP202_ARM_CommandDescriptor_t
41
42
43/*----------------------------------------------------------------------------
44 * This module uses (requires) the following interface(s):
45 */
46
47// Default configuration
48#include "c_eip202_ring.h"
49
50// EIP-202 Ring Control Driver Library Internal interfaces
51#include "eip202_ring_internal.h"
52
53// Driver Framework Basic Definitions API
54#include "basic_defs.h" // bool, uint32_t, uint8_t
55
56// Driver Framework DMA Resource API
57#include "dmares_types.h" // DMAResource_Handle_t
58#include "dmares_rw.h" // DMAResource_Write/Read
59
60// Standard IOToken API
61#include "iotoken.h"
62
63
64/*----------------------------------------------------------------------------
65 * Definitions and macros
66 */
67
68
69/*----------------------------------------------------------------------------
70 * Local variables
71 */
72
73
74/*----------------------------------------------------------------------------
75 * EIP202_CD_Make_ControlWord
76 */
77uint32_t
78EIP202_CD_Make_ControlWord(
79 const uint8_t TokenWordCount,
80 const uint32_t SegmentByteCount,
81 const bool fFirstSegment,
82 const bool fLastSegment,
83 const bool fForceEngine,
84 const uint8_t EngineId)
85{
86 uint32_t Value = 0;
87
88 if(fFirstSegment)
89 Value |= BIT_23;
90
91 if(fLastSegment)
92 Value |= BIT_22;
93
94 Value |= ((((uint32_t)TokenWordCount) & MASK_8_BITS) << 24);
95 Value |= ((((uint32_t)SegmentByteCount) & MASK_16_BITS));
96 if (fForceEngine)
97 Value |= BIT_21 | (((uint32_t)EngineId & MASK_5_BITS) << 16);
98
99 return Value;
100}
101
102
103/*----------------------------------------------------------------------------
104 * EIP202_CD_Write
105 */
106void
107EIP202_CD_Write(
108 DMAResource_Handle_t Handle,
109 const unsigned int WordOffset,
110 const EIP202_ARM_CommandDescriptor_t * const Descr_p,
111 const bool fATP)
112
113{
114 unsigned int InTokenWordOffset;
115
116#ifdef EIP202_RING_ANTI_DMA_RACE_CONDITION_CDS
117 IOToken_Mark_Set(Descr_p->Token_p);
118#endif
119
120#ifdef EIP202_64BIT_DEVICE
121 // Write Control Word
122 DMAResource_Write32(Handle, WordOffset, Descr_p->ControlWord);
123
124 // Lengths greater than 20 bits not supported yet.
125#ifndef EIP202_CDR_OPT1
126 DMAResource_Write32(Handle, WordOffset + 1, 0);
127#endif
128
129 // Write Source Packet Data address
130 DMAResource_Write32(Handle, WordOffset + 2, Descr_p->SrcPacketAddr.Addr);
131 DMAResource_Write32(Handle, WordOffset + 3, Descr_p->SrcPacketAddr.UpperAddr);
132
133 if (fATP)
134 {
135#ifndef EIP202_CDR_OPT2
136 // Write Token Data address
137 DMAResource_Write32(Handle,
138 WordOffset + 4,
139 Descr_p->TokenDataAddr.Addr);
140 DMAResource_Write32(Handle,
141 WordOffset + 5,
142 Descr_p->TokenDataAddr.UpperAddr);
143#endif
144 InTokenWordOffset = WordOffset + 6;
145 }
146 else
147 InTokenWordOffset = WordOffset + 4;
148#else // EIP202_64BIT_DEVICE
149 // Write Control Word
150 DMAResource_Write32(Handle, WordOffset, Descr_p->ControlWord);
151
152 // Write Source Packet Data address
153 DMAResource_Write32(Handle, WordOffset + 1, Descr_p->SrcPacketAddr.Addr);
154
155 if (fATP)
156 {
157#ifndef EIP202_CDR_OPT2
158 // Write Token Data address
159 DMAResource_Write32(Handle, WordOffset + 2, Descr_p->TokenDataAddr.Addr);
160#endif
161 InTokenWordOffset = WordOffset + 3;
162 }
163 else
164 InTokenWordOffset = WordOffset + 2;
165#endif // !EIP202_64BIT_DEVICE
166
167 // Write Input Token (only for the first segment and if token is available)
168 if (Descr_p->ControlWord & BIT_23 && Descr_p->Token_p)
169 {
170 unsigned int i, offset = InTokenWordOffset;
171
172 // Write Application ID
173#ifdef EIP202_RING_ANTI_DMA_RACE_CONDITION_CDS
174 IOToken_Mark_Set(Descr_p->Token_p);
175#endif
176
177 for (i = 0; i < IOToken_InWordCount_Get(); i++)
178 DMAResource_Write32(Handle, offset + i, Descr_p->Token_p[i]);
179 }
180
181 return;
182}
183
184
185/* end of file eip202_cd_format.c */