blob: 56c68f1943ff8cf114f452ff4b35d523f621ce0b [file] [log] [blame]
developer3abe1ad2022-01-24 11:13:32 +08001/* Copyright (C) 2021-2022 Mediatek Inc. */
2#define _GNU_SOURCE
3
4#include <unl.h>
5
6#include "atenl.h"
7
8#define to_rssi(_rcpi) ((_rcpi - 220) / 2)
9
10struct atenl_nl_priv {
11 struct atenl *an;
12 struct unl unl;
13 struct nl_msg *msg;
14 int attr;
15 void *res;
16};
17
18struct atenl_nl_ops {
19 int set;
20 int dump;
21 int (*ops)(struct atenl *an, struct atenl_data *data,
22 struct atenl_nl_priv *nl_priv);
23};
24
25static struct nla_policy testdata_policy[NUM_MT76_TM_ATTRS] = {
26 [MT76_TM_ATTR_STATE] = { .type = NLA_U8 },
27 [MT76_TM_ATTR_MTD_PART] = { .type = NLA_STRING },
28 [MT76_TM_ATTR_MTD_OFFSET] = { .type = NLA_U32 },
developerf90c9af2022-12-28 22:40:23 +080029 [MT76_TM_ATTR_BAND_IDX] = { .type = NLA_U8 },
developer50835162023-09-19 13:29:11 +080030 [MT76_TM_ATTR_SKU_EN] = { .type = NLA_U8 },
developer3abe1ad2022-01-24 11:13:32 +080031 [MT76_TM_ATTR_TX_COUNT] = { .type = NLA_U32 },
32 [MT76_TM_ATTR_TX_LENGTH] = { .type = NLA_U32 },
33 [MT76_TM_ATTR_TX_RATE_MODE] = { .type = NLA_U8 },
34 [MT76_TM_ATTR_TX_RATE_NSS] = { .type = NLA_U8 },
35 [MT76_TM_ATTR_TX_RATE_IDX] = { .type = NLA_U8 },
36 [MT76_TM_ATTR_TX_RATE_SGI] = { .type = NLA_U8 },
37 [MT76_TM_ATTR_TX_RATE_LDPC] = { .type = NLA_U8 },
38 [MT76_TM_ATTR_TX_RATE_STBC] = { .type = NLA_U8 },
39 [MT76_TM_ATTR_TX_LTF] = { .type = NLA_U8 },
40 [MT76_TM_ATTR_TX_POWER_CONTROL] = { .type = NLA_U8 },
41 [MT76_TM_ATTR_TX_ANTENNA] = { .type = NLA_U8 },
42 [MT76_TM_ATTR_FREQ_OFFSET] = { .type = NLA_U32 },
43 [MT76_TM_ATTR_STATS] = { .type = NLA_NESTED },
developer071927d2022-08-31 20:39:29 +080044 [MT76_TM_ATTR_PRECAL] = { .type = NLA_NESTED },
45 [MT76_TM_ATTR_PRECAL_INFO] = { .type = NLA_NESTED },
developer3abe1ad2022-01-24 11:13:32 +080046};
47
48static struct nla_policy stats_policy[NUM_MT76_TM_STATS_ATTRS] = {
49 [MT76_TM_STATS_ATTR_TX_PENDING] = { .type = NLA_U32 },
50 [MT76_TM_STATS_ATTR_TX_QUEUED] = { .type = NLA_U32 },
51 [MT76_TM_STATS_ATTR_TX_DONE] = { .type = NLA_U32 },
52 [MT76_TM_STATS_ATTR_RX_PACKETS] = { .type = NLA_U64 },
53 [MT76_TM_STATS_ATTR_RX_FCS_ERROR] = { .type = NLA_U64 },
54};
55
56static struct nla_policy rx_policy[NUM_MT76_TM_RX_ATTRS] = {
57 [MT76_TM_RX_ATTR_FREQ_OFFSET] = { .type = NLA_U32 },
58 [MT76_TM_RX_ATTR_RCPI] = { .type = NLA_NESTED },
developer50835162023-09-19 13:29:11 +080059 [MT76_TM_RX_ATTR_RSSI] = { .type = NLA_NESTED },
developer3abe1ad2022-01-24 11:13:32 +080060 [MT76_TM_RX_ATTR_IB_RSSI] = { .type = NLA_NESTED },
61 [MT76_TM_RX_ATTR_WB_RSSI] = { .type = NLA_NESTED },
62 [MT76_TM_RX_ATTR_SNR] = { .type = NLA_U8 },
63};
64
65struct he_sgi {
66 enum mt76_testmode_tx_mode tx_mode;
67 u8 sgi;
68 u8 tx_ltf;
69};
70
71#define HE_SGI_GROUP(_tx_mode, _sgi, _tx_ltf) \
72 { .tx_mode = MT76_TM_TX_MODE_##_tx_mode, .sgi = _sgi, .tx_ltf = _tx_ltf }
73static const struct he_sgi he_sgi_groups[] = {
74 HE_SGI_GROUP(HE_SU, 0, 0),
75 HE_SGI_GROUP(HE_SU, 0, 1),
76 HE_SGI_GROUP(HE_SU, 1, 1),
77 HE_SGI_GROUP(HE_SU, 2, 2),
78 HE_SGI_GROUP(HE_SU, 0, 2),
79 HE_SGI_GROUP(HE_EXT_SU, 0, 0),
80 HE_SGI_GROUP(HE_EXT_SU, 0, 1),
81 HE_SGI_GROUP(HE_EXT_SU, 1, 1),
82 HE_SGI_GROUP(HE_EXT_SU, 2, 2),
83 HE_SGI_GROUP(HE_EXT_SU, 0, 2),
84 HE_SGI_GROUP(HE_TB, 1, 0),
85 HE_SGI_GROUP(HE_TB, 1, 1),
86 HE_SGI_GROUP(HE_TB, 2, 2),
87 HE_SGI_GROUP(HE_MU, 0, 2),
88 HE_SGI_GROUP(HE_MU, 0, 1),
89 HE_SGI_GROUP(HE_MU, 1, 1),
90 HE_SGI_GROUP(HE_MU, 2, 2),
91};
92#undef HE_SGI_LTF_GROUP
93
94static u8 phy_type_to_attr(u8 phy_type)
95{
96 static const u8 phy_type_to_attr[] = {
97 [ATENL_PHY_TYPE_CCK] = MT76_TM_TX_MODE_CCK,
98 [ATENL_PHY_TYPE_OFDM] = MT76_TM_TX_MODE_OFDM,
99 [ATENL_PHY_TYPE_HT] = MT76_TM_TX_MODE_HT,
100 [ATENL_PHY_TYPE_HT_GF] = MT76_TM_TX_MODE_HT,
101 [ATENL_PHY_TYPE_VHT] = MT76_TM_TX_MODE_VHT,
102 [ATENL_PHY_TYPE_HE_SU] = MT76_TM_TX_MODE_HE_SU,
103 [ATENL_PHY_TYPE_HE_EXT_SU] = MT76_TM_TX_MODE_HE_EXT_SU,
104 [ATENL_PHY_TYPE_HE_TB] = MT76_TM_TX_MODE_HE_TB,
105 [ATENL_PHY_TYPE_HE_MU] = MT76_TM_TX_MODE_HE_MU,
developer77215642023-05-15 13:52:35 +0800106 [ATENL_PHY_TYPE_EHT_SU] = MT76_TM_TX_MODE_EHT_SU,
107 [ATENL_PHY_TYPE_EHT_TRIG] = MT76_TM_TX_MODE_EHT_TRIG,
108 [ATENL_PHY_TYPE_EHT_MU] = MT76_TM_TX_MODE_EHT_MU,
developer3abe1ad2022-01-24 11:13:32 +0800109 };
110
111 if (phy_type >= ARRAY_SIZE(phy_type_to_attr))
112 return 0;
113
114 return phy_type_to_attr[phy_type];
115}
116
117static void
118atenl_set_attr_state(struct atenl *an, struct nl_msg *msg,
119 u8 band, enum mt76_testmode_state state)
120{
121 if (get_band_val(an, band, cur_state) == state)
122 return;
123
124 nla_put_u8(msg, MT76_TM_ATTR_STATE, state);
125 set_band_val(an, band, cur_state, state);
126}
127
128static void
129atenl_set_attr_antenna(struct atenl *an, struct nl_msg *msg, u8 tx_antenna)
130{
131 if (!tx_antenna)
132 return;
developer67630e02022-12-06 14:35:28 +0800133
134 nla_put_u8(msg, MT76_TM_ATTR_TX_ANTENNA, tx_antenna);
developer3abe1ad2022-01-24 11:13:32 +0800135}
136
137static int
138atenl_nl_set_attr(struct atenl *an, struct atenl_data *data,
139 struct atenl_nl_priv *nl_priv)
140{
141 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
142 struct nl_msg *msg = nl_priv->msg;
143 u32 val = ntohl(*(u32 *)hdr->data);
144 int attr = nl_priv->attr;
145 void *ptr, *a;
146
147 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
148 if (!ptr)
149 return -ENOMEM;
150
151 switch (attr) {
152 case MT76_TM_ATTR_TX_ANTENNA:
153 atenl_set_attr_antenna(an, msg, val);
154 break;
155 case MT76_TM_ATTR_FREQ_OFFSET:
156 nla_put_u32(msg, attr, val);
157 break;
158 case MT76_TM_ATTR_TX_POWER:
159 a = nla_nest_start(msg, MT76_TM_ATTR_TX_POWER);
160 if (!a)
161 return -ENOMEM;
162 nla_put_u8(msg, 0, val);
163 nla_nest_end(msg, a);
164 break;
165 default:
166 nla_put_u8(msg, attr, val);
167 break;
168 }
169
170 nla_nest_end(msg, ptr);
171
172 return unl_genl_request(&nl_priv->unl, msg, NULL, NULL);
173}
174
175static int
176atenl_nl_set_cfg(struct atenl *an, struct atenl_data *data,
177 struct atenl_nl_priv *nl_priv)
178{
179 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
180 struct nl_msg *msg = nl_priv->msg;
181 enum atenl_cmd cmd = data->cmd;
182 u32 *v = (u32 *)hdr->data;
183 u8 type = ntohl(v[0]);
184 u8 enable = ntohl(v[1]);
185 void *ptr, *cfg;
186
187 if (cmd == HQA_CMD_SET_TSSI) {
188 type = 0;
189 enable = 1;
190 }
191
192 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
193 if (!ptr)
194 return -ENOMEM;
195
196 cfg = nla_nest_start(msg, MT76_TM_ATTR_CFG);
197 if (!cfg)
198 return -ENOMEM;
199
200 if (nla_put_u8(msg, 0, type) ||
201 nla_put_u8(msg, 1, enable))
202 return -EINVAL;
203
204 nla_nest_end(msg, cfg);
205
206 nla_nest_end(msg, ptr);
207
208 return unl_genl_request(&nl_priv->unl, msg, NULL, NULL);
209}
210
211static int
212atenl_nl_set_tx(struct atenl *an, struct atenl_data *data,
213 struct atenl_nl_priv *nl_priv)
214{
215 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
216 struct nl_msg *msg = nl_priv->msg;
217 u32 *v = (u32 *)hdr->data;
218 u8 *addr1 = hdr->data + 36;
219 u8 *addr2 = addr1 + ETH_ALEN;
220 u8 *addr3 = addr2 + ETH_ALEN;
developer5698c9c2022-05-30 16:40:23 +0800221 u8 def_mac[ETH_ALEN] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55};
developer3abe1ad2022-01-24 11:13:32 +0800222 void *ptr, *a;
223
developer5698c9c2022-05-30 16:40:23 +0800224 if (get_band_val(an, an->cur_band, use_tx_time))
225 set_band_val(an, an->cur_band, tx_time, ntohl(v[7]));
226 else
227 set_band_val(an, an->cur_band, tx_mpdu_len, ntohl(v[7]));
228
developer3abe1ad2022-01-24 11:13:32 +0800229 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
230 if (!ptr)
231 return -ENOMEM;
232
developer3abe1ad2022-01-24 11:13:32 +0800233 a = nla_nest_start(msg, MT76_TM_ATTR_MAC_ADDRS);
234 if (!a)
235 return -ENOMEM;
236
developer5698c9c2022-05-30 16:40:23 +0800237 nla_put(msg, 0, ETH_ALEN, use_default_addr(addr1) ? def_mac : addr1);
238 nla_put(msg, 1, ETH_ALEN, use_default_addr(addr2) ? def_mac : addr2);
239 nla_put(msg, 2, ETH_ALEN, use_default_addr(addr3) ? def_mac : addr3);
developer3abe1ad2022-01-24 11:13:32 +0800240
241 nla_nest_end(msg, a);
242
243 nla_nest_end(msg, ptr);
244
245 *(u32 *)(hdr->data + 2) = data->ext_id;
246
247 return unl_genl_request(&nl_priv->unl, msg, NULL, NULL);
248}
249
250static int
251atenl_nl_tx(struct atenl *an, struct atenl_data *data, struct atenl_nl_priv *nl_priv)
252{
253#define USE_SPE_IDX BIT(31)
254 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
255 struct nl_msg *msg = nl_priv->msg;
256 u32 *v = (u32 *)hdr->data;
257 u8 band = ntohl(v[2]);
258 void *ptr;
259 int ret;
260
261 if (band >= MAX_BAND_NUM)
262 return -EINVAL;
263
264 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
265 if (!ptr)
266 return -ENOMEM;
267
268 if (data->ext_cmd == HQA_EXT_CMD_STOP_TX) {
269 atenl_set_attr_state(an, msg, band, MT76_TM_STATE_IDLE);
270 } else {
271 u32 tx_count = ntohl(v[3]);
272 u8 tx_rate_mode = phy_type_to_attr(ntohl(v[4]));
273 u8 aid = ntohl(v[11]);
274 u8 sgi = ntohl(v[13]);
275 u32 tx_antenna = ntohl(v[14]);
276 void *a;
277
278 if (sgi > 5)
279 return -EINVAL;
280
281 if (!tx_count)
282 tx_count = 10000000;
283
284 nla_put_u32(msg, MT76_TM_ATTR_TX_COUNT, tx_count);
285 nla_put_u32(msg, MT76_TM_ATTR_TX_IPG, ntohl(v[12]));
286 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_MODE, tx_rate_mode);
287 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_IDX, ntohl(v[5]));
288 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_STBC, ntohl(v[7]));
289 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_LDPC, ntohl(v[8]));
290 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_NSS, ntohl(v[15]));
291
developer5698c9c2022-05-30 16:40:23 +0800292 if (get_band_val(an, band, use_tx_time))
293 nla_put_u32(msg, MT76_TM_ATTR_TX_TIME,
294 get_band_val(an, band, tx_time));
developer77215642023-05-15 13:52:35 +0800295 else if (get_band_val(an, band, tx_mpdu_len))
developer93dadcc2022-07-13 10:25:35 +0800296 nla_put_u32(msg, MT76_TM_ATTR_TX_LENGTH,
297 get_band_val(an, band, tx_mpdu_len));
developer5698c9c2022-05-30 16:40:23 +0800298
developer3abe1ad2022-01-24 11:13:32 +0800299 /* for chips after 7915, tx need to use at least wcid = 1 */
300 if (!is_mt7915(an) && !aid)
301 aid = 1;
302 nla_put_u8(msg, MT76_TM_ATTR_AID, aid);
303
304 if (tx_antenna & USE_SPE_IDX) {
305 nla_put_u8(msg, MT76_TM_ATTR_TX_SPE_IDX,
306 tx_antenna & ~USE_SPE_IDX);
307 } else {
308 nla_put_u8(msg, MT76_TM_ATTR_TX_SPE_IDX, 0);
309 atenl_set_attr_antenna(an, msg, tx_antenna);
310 }
311
developer77215642023-05-15 13:52:35 +0800312 if (!is_mt7996(an) && tx_rate_mode >= MT76_TM_TX_MODE_HE_SU) {
developer3abe1ad2022-01-24 11:13:32 +0800313 u8 ofs = sgi;
314 size_t i;
315
316 for (i = 0; i < ARRAY_SIZE(he_sgi_groups); i++)
317 if (he_sgi_groups[i].tx_mode == tx_rate_mode)
318 break;
319
320 if ((i + ofs) >= ARRAY_SIZE(he_sgi_groups))
321 return -EINVAL;
322
323 sgi = he_sgi_groups[i + ofs].sgi;
324 nla_put_u8(msg, MT76_TM_ATTR_TX_LTF,
325 he_sgi_groups[i + ofs].tx_ltf);
326 }
327 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_SGI, sgi);
328
329 a = nla_nest_start(msg, MT76_TM_ATTR_TX_POWER);
330 if (!a)
331 return -ENOMEM;
332 nla_put_u8(msg, 0, ntohl(v[6]));
333 nla_nest_end(msg, a);
334
335 atenl_set_attr_state(an, msg, band, MT76_TM_STATE_TX_FRAMES);
336 }
337
338 nla_nest_end(msg, ptr);
339
340 ret = unl_genl_request(&nl_priv->unl, msg, NULL, NULL);
341 if (ret)
342 return ret;
343
344 *(u32 *)(hdr->data + 2) = data->ext_id;
345
346 return 0;
347}
348
349static int
350atenl_nl_rx(struct atenl *an, struct atenl_data *data, struct atenl_nl_priv *nl_priv)
351{
352 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
353 struct atenl_band *anb = &an->anb[an->cur_band];
354 struct nl_msg *msg = nl_priv->msg;
355 u32 *v = (u32 *)hdr->data;
356 u8 band = ntohl(v[2]);
357 void *ptr;
358
359 if (band >= MAX_BAND_NUM)
360 return -EINVAL;
361
362 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
363 if (!ptr)
364 return -ENOMEM;
365
366 if (data->ext_cmd == HQA_EXT_CMD_STOP_RX) {
367 atenl_set_attr_state(an, msg, band, MT76_TM_STATE_IDLE);
368 } else {
369 v = (u32 *)(hdr->data + 18);
370
371 atenl_set_attr_antenna(an, msg, ntohl(v[0]));
developer77215642023-05-15 13:52:35 +0800372 if (is_mt7996(an)) {
373 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_MODE,
374 phy_type_to_attr(ntohl(v[2])));
375 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_SGI, ntohl(v[3]));
376 nla_put_u8(msg, MT76_TM_ATTR_AID, ntohl(v[4]));
377 } else {
378 nla_put_u8(msg, MT76_TM_ATTR_AID, ntohl(v[1]));
379 }
developer3abe1ad2022-01-24 11:13:32 +0800380 atenl_set_attr_state(an, msg, band, MT76_TM_STATE_RX_FRAMES);
381
382 anb->reset_rx_cnt = false;
383
384 /* clear history buffer */
385 memset(&anb->rx_stat, 0, sizeof(anb->rx_stat));
386 }
387
388 nla_nest_end(msg, ptr);
389
390 *(u32 *)(hdr->data + 2) = data->ext_id;
391
392 return unl_genl_request(&nl_priv->unl, msg, NULL, NULL);
393}
394
395static int
396atenl_off_ch_scan(struct atenl *an, struct atenl_data *data,
397 struct atenl_nl_priv *nl_priv)
398{
399 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
400 struct nl_msg *msg = nl_priv->msg;
401 u32 *v = (u32 *)hdr->data;
402 u8 ch = ntohl(v[2]);
403 u8 bw = ntohl(v[4]);
404 u8 tx_path = ntohl(v[5]);
405 u8 status = ntohl(v[6]);
406 void *ptr;
407
408 if (!status)
409 ch = 0; /* stop */
410
411 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
412 if (!ptr)
413 return -ENOMEM;
414
415 nla_put_u8(msg, MT76_TM_ATTR_OFF_CH_SCAN_CH, ch);
416 nla_put_u8(msg, MT76_TM_ATTR_OFF_CH_SCAN_CENTER_CH,
417 atenl_get_center_channel(bw, CH_BAND_5GHZ, ch));
418 nla_put_u8(msg, MT76_TM_ATTR_OFF_CH_SCAN_BW, bw);
419 nla_put_u8(msg, MT76_TM_ATTR_OFF_CH_SCAN_PATH, tx_path);
420
421 nla_nest_end(msg, ptr);
422
developer5698c9c2022-05-30 16:40:23 +0800423 *(u32 *)(hdr->data + 2) = data->ext_id;
developer3abe1ad2022-01-24 11:13:32 +0800424
425 return 0;
426}
427
428static int atenl_nl_dump_cb(struct nl_msg *msg, void *arg)
429{
430 struct atenl_nl_priv *nl_priv = (struct atenl_nl_priv *)arg;
431 struct nlattr *tb1[NUM_MT76_TM_ATTRS];
432 struct nlattr *tb2[NUM_MT76_TM_STATS_ATTRS];
433 struct nlattr *nl_attr;
434 int attr = nl_priv->attr;
435 u64 *res = nl_priv->res;
436
437 nl_attr = unl_find_attr(&nl_priv->unl, msg, NL80211_ATTR_TESTDATA);
438 if (!nl_attr) {
developer5698c9c2022-05-30 16:40:23 +0800439 atenl_err("Testdata attribute not found\n");
developer3abe1ad2022-01-24 11:13:32 +0800440 return NL_SKIP;
441 }
442
443 nla_parse_nested(tb1, MT76_TM_ATTR_MAX, nl_attr, testdata_policy);
444 nla_parse_nested(tb2, MT76_TM_STATS_ATTR_MAX,
445 tb1[MT76_TM_ATTR_STATS], stats_policy);
446
447 if (attr == MT76_TM_STATS_ATTR_TX_DONE)
448 *res = nla_get_u32(tb2[MT76_TM_STATS_ATTR_TX_DONE]);
449
450 return NL_SKIP;
451}
452
453static int
454atenl_nl_dump_attr(struct atenl *an, struct atenl_data *data,
455 struct atenl_nl_priv *nl_priv)
456{
457 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
458 struct nl_msg *msg = nl_priv->msg;
459 void *ptr;
460 u64 res = 0;
461
462 nl_priv->res = (void *)&res;
463
464 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
465 if (!ptr)
466 return -ENOMEM;
467 nla_put_flag(msg, MT76_TM_ATTR_STATS);
468 nla_nest_end(msg, ptr);
469
470 unl_genl_request(&nl_priv->unl, msg, atenl_nl_dump_cb, (void *)nl_priv);
471
472 if (nl_priv->attr == MT76_TM_STATS_ATTR_TX_DONE)
473 *(u32 *)(hdr->data + 2 + 4 * an->cur_band) = htonl(res);
474
475 return 0;
476}
477
478static int atenl_nl_continuous_tx(struct atenl *an,
479 struct atenl_data *data,
480 struct atenl_nl_priv *nl_priv)
481{
482 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
483 struct nl_msg *msg = nl_priv->msg;
484 u32 *v = (u32 *)hdr->data;
485 u8 band = ntohl(v[0]);
486 bool enable = ntohl(v[1]);
487 void *ptr;
488
489 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
490 if (!ptr)
491 return -ENOMEM;
492
493 if (band >= MAX_BAND_NUM)
494 return -EINVAL;
495
496 if (!enable) {
497 int phy = get_band_val(an, band, phy_idx);
498 char cmd[64];
499
500 atenl_set_attr_state(an, msg, band, MT76_TM_STATE_IDLE);
501 nla_nest_end(msg, ptr);
502 unl_genl_request(&nl_priv->unl, msg, NULL, NULL);
503
504 sprintf(cmd, "iw dev mon%d del", phy);
505 system(cmd);
506 sprintf(cmd, "iw phy phy%d interface add mon%d type monitor", phy, phy);
507 system(cmd);
508 sprintf(cmd, "ifconfig mon%d up", phy);
509 system(cmd);
510
511 return 0;
512 }
513
514 if (get_band_val(an, band, rf_mode) != ATENL_RF_MODE_TEST)
515 return 0;
516
517 nla_put_u8(msg, MT76_TM_ATTR_TX_ANTENNA, ntohl(v[2]));
518 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_MODE, phy_type_to_attr(ntohl(v[3])));
519 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_IDX, ntohl(v[6]));
520
521 atenl_dbg("%s: enable = %d, ant=%u, tx_rate_mode=%u, rate_idx=%u\n",
522 __func__, enable, ntohl(v[2]), ntohl(v[3]), ntohl(v[6]));
523
524 atenl_set_attr_state(an, msg, band, MT76_TM_STATE_TX_CONT);
525
526 nla_nest_end(msg, ptr);
527
528 return unl_genl_request(&nl_priv->unl, msg, NULL, NULL);
529}
530
531static int atenl_nl_get_rx_info_cb(struct nl_msg *msg, void *arg)
532{
533 struct atenl_nl_priv *nl_priv = (struct atenl_nl_priv *)arg;
534 struct atenl *an = nl_priv->an;
535 struct atenl_band *anb = &an->anb[an->cur_band];
536 struct atenl_data *data = nl_priv->res;
537 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
538 struct atenl_rx_info_hdr *rx_hdr;
539 struct atenl_rx_info_band *rx_band;
540 struct atenl_rx_info_user *rx_user;
541 struct atenl_rx_info_path *rx_path;
542 struct atenl_rx_info_comm *rx_comm;
543 struct nlattr *tb1[NUM_MT76_TM_ATTRS];
544 struct nlattr *tb2[NUM_MT76_TM_STATS_ATTRS];
545 struct nlattr *tb3[NUM_MT76_TM_RX_ATTRS];
546 struct nlattr *nl_attr, *cur;
547 struct atenl_rx_stat rx_cur, rx_diff = {};
548 u32 rcpi[4] = {};
549 u32 type_num = htonl(4);
550 s32 ib_rssi[4] = {}, wb_rssi[4] = {};
551 u8 path = an->anb[an->cur_band].chainmask;
552 u8 path_num = __builtin_popcount(path);
553 u8 *buf = hdr->data + 2;
554 int i, rem;
555
556 *(u32 *)buf = type_num;
557 buf += sizeof(type_num);
558
559#define RX_PUT_HDR(_hdr, _type, _val, _size) do { \
560 _hdr->type = htonl(_type); \
561 _hdr->val = htonl(_val); \
562 _hdr->len = htonl(_size); \
563 buf += sizeof(*_hdr); \
564 } while (0)
565
566 rx_hdr = (struct atenl_rx_info_hdr *)buf;
567 RX_PUT_HDR(rx_hdr, 0, BIT(an->cur_band), sizeof(*rx_band));
568 rx_band = (struct atenl_rx_info_band *)buf;
569 buf += sizeof(*rx_band);
570
571 rx_hdr = (struct atenl_rx_info_hdr *)buf;
572 RX_PUT_HDR(rx_hdr, 1, path, path_num * sizeof(*rx_path));
573 rx_path = (struct atenl_rx_info_path *)buf;
574 buf += path_num * sizeof(*rx_path);
575
576 rx_hdr = (struct atenl_rx_info_hdr *)buf;
577 RX_PUT_HDR(rx_hdr, 2, GENMASK(15, 0), 16 * sizeof(*rx_user));
578 rx_user = (struct atenl_rx_info_user *)buf;
579 buf += 16 * sizeof(*rx_user);
580
581 rx_hdr = (struct atenl_rx_info_hdr *)buf;
582 RX_PUT_HDR(rx_hdr, 3, BIT(0), sizeof(*rx_comm));
583 rx_comm = (struct atenl_rx_info_comm *)buf;
584 buf += sizeof(*rx_comm);
585
586 hdr->len = htons(buf - hdr->data);
587
588 nl_attr = unl_find_attr(&nl_priv->unl, msg, NL80211_ATTR_TESTDATA);
589 if (!nl_attr) {
developer5698c9c2022-05-30 16:40:23 +0800590 atenl_err("Testdata attribute not found\n");
developer3abe1ad2022-01-24 11:13:32 +0800591 return NL_SKIP;
592 }
593
594 nla_parse_nested(tb1, MT76_TM_ATTR_MAX, nl_attr, testdata_policy);
595 nla_parse_nested(tb2, MT76_TM_STATS_ATTR_MAX,
596 tb1[MT76_TM_ATTR_STATS], stats_policy);
597
598 rx_cur.total = nla_get_u64(tb2[MT76_TM_STATS_ATTR_RX_PACKETS]);
599 rx_cur.err_cnt = nla_get_u64(tb2[MT76_TM_STATS_ATTR_RX_FCS_ERROR]);
600 rx_cur.len_mismatch = nla_get_u64(tb2[MT76_TM_STATS_ATTR_RX_LEN_MISMATCH]);
601 rx_cur.ok_cnt = rx_cur.total - rx_cur.err_cnt - rx_cur.len_mismatch;
602
developer5698c9c2022-05-30 16:40:23 +0800603 if (!anb->reset_rx_cnt ||
604 get_band_val(an, an->cur_band, cur_state) == MT76_TM_STATE_RX_FRAMES) {
developer3abe1ad2022-01-24 11:13:32 +0800605#define RX_COUNT_DIFF(_field) \
developer5698c9c2022-05-30 16:40:23 +0800606 rx_diff._field = (rx_cur._field) - (anb->rx_stat._field);
developer3abe1ad2022-01-24 11:13:32 +0800607 RX_COUNT_DIFF(total);
608 RX_COUNT_DIFF(err_cnt);
609 RX_COUNT_DIFF(len_mismatch);
610 RX_COUNT_DIFF(ok_cnt);
611#undef RX_COUNT_DIFF
612
613 memcpy(&anb->rx_stat, &rx_cur, sizeof(anb->rx_stat));
614 }
615
616 rx_band->mac_rx_mdrdy_cnt = htonl((u32)rx_diff.total);
617 rx_band->mac_rx_fcs_err_cnt = htonl((u32)rx_diff.err_cnt);
618 rx_band->mac_rx_fcs_ok_cnt = htonl((u32)rx_diff.ok_cnt);
619 rx_band->mac_rx_len_mismatch = htonl((u32)rx_diff.len_mismatch);
620 rx_user->fcs_error_cnt = htonl((u32)rx_diff.err_cnt);
621
622 nla_parse_nested(tb3, MT76_TM_RX_ATTR_MAX,
623 tb2[MT76_TM_STATS_ATTR_LAST_RX], rx_policy);
624
625 rx_user->freq_offset = htonl(nla_get_u32(tb3[MT76_TM_RX_ATTR_FREQ_OFFSET]));
626 rx_user->snr = htonl(nla_get_u8(tb3[MT76_TM_RX_ATTR_SNR]));
627
628 i = 0;
629 nla_for_each_nested(cur, tb3[MT76_TM_RX_ATTR_RCPI], rem) {
630 if (nla_len(cur) != 1 || i >= 4)
631 break;
632
633 rcpi[i++] = nla_get_u8(cur);
634 }
635
636 i = 0;
637 nla_for_each_nested(cur, tb3[MT76_TM_RX_ATTR_IB_RSSI], rem) {
638 if (nla_len(cur) != 1 || i >= 4)
639 break;
640
641 ib_rssi[i++] = (s8)nla_get_u8(cur);
642 }
643
644 i = 0;
645 nla_for_each_nested(cur, tb3[MT76_TM_RX_ATTR_WB_RSSI], rem) {
646 if (nla_len(cur) != 1 || i >= 4)
647 break;
648
649 wb_rssi[i++] = (s8)nla_get_u8(cur);
650 }
651
652 for (i = 0; i < 4; i++) {
653 struct atenl_rx_info_path *path = &rx_path[i];
654
655 path->rcpi = htonl(rcpi[i]);
656 path->rssi = htonl(to_rssi((u8)rcpi[i]));
657 path->fagc_ib_rssi = htonl(ib_rssi[i]);
658 path->fagc_wb_rssi = htonl(wb_rssi[i]);
659 }
660
661 return NL_SKIP;
662}
663
664static int atenl_nl_get_rx_info(struct atenl *an, struct atenl_data *data,
665 struct atenl_nl_priv *nl_priv)
666{
667 struct nl_msg *msg = nl_priv->msg;
668 void *ptr;
669
670 nl_priv->an = an;
671 nl_priv->res = (void *)data;
672
673 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
674 if (!ptr)
675 return -ENOMEM;
676
677 nla_put_flag(msg, MT76_TM_ATTR_STATS);
678
679 nla_nest_end(msg, ptr);
680
681 return unl_genl_request(&nl_priv->unl, msg, atenl_nl_get_rx_info_cb,
682 (void *)nl_priv);
683}
684
685static int
686atenl_nl_set_ru(struct atenl *an, struct atenl_data *data,
687 struct atenl_nl_priv *nl_priv)
688{
689 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
690 struct nl_msg *msg;
691 u32 *v = (u32 *)(hdr->data + 4);
692 u32 seg0_num = ntohl(v[0]); /* v[1] seg1_num unused */
693 void *ptr;
694 int i, ret;
695
696 if (seg0_num > 8)
697 return -EINVAL;
698
699 for (i = 0, v = &v[2]; i < seg0_num; i++, v += 11) {
700 u32 ru_alloc = ntohl(v[1]);
701 u32 aid = ntohl(v[2]);
702 u32 ru_idx = ntohl(v[3]);
703 u32 mcs = ntohl(v[4]);
704 u32 ldpc = ntohl(v[5]);
705 u32 nss = ntohl(v[6]);
706 u32 tx_length = ntohl(v[8]);
707 char buf[10];
708
709 if (unl_genl_init(&nl_priv->unl, "nl80211") < 0) {
developer5698c9c2022-05-30 16:40:23 +0800710 atenl_err("Failed to connect to nl80211\n");
developer3abe1ad2022-01-24 11:13:32 +0800711 return 2;
712 }
713
714 msg = unl_genl_msg(&nl_priv->unl, NL80211_CMD_TESTMODE, false);
715 nla_put_u32(msg, NL80211_ATTR_WIPHY, get_band_val(an, an->cur_band, phy_idx));
716
717 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
718 if (!ptr)
719 return -ENOMEM;
720
721 if (i == 0)
722 atenl_set_attr_state(an, msg, an->cur_band, MT76_TM_STATE_IDLE);
723
724 nla_put_u8(msg, MT76_TM_ATTR_AID, aid);
725 nla_put_u8(msg, MT76_TM_ATTR_RU_IDX, ru_idx);
726 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_IDX, mcs);
727 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_LDPC, ldpc);
728 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_NSS, nss);
developer93dadcc2022-07-13 10:25:35 +0800729 nla_put_u32(msg, MT76_TM_ATTR_TX_LENGTH, tx_length);
developer3abe1ad2022-01-24 11:13:32 +0800730
731 ret = snprintf(buf, sizeof(buf), "%x", ru_alloc);
732 if (snprintf_error(sizeof(buf), ret))
733 return -EINVAL;
734
735 nla_put_u8(msg, MT76_TM_ATTR_RU_ALLOC, strtol(buf, NULL, 2));
736
737 nla_nest_end(msg, ptr);
738
739 unl_genl_request(&nl_priv->unl, msg, NULL, NULL);
740
741 unl_free(&nl_priv->unl);
742 }
743
744 return 0;
745}
746
developer5698c9c2022-05-30 16:40:23 +0800747static int
748atenl_nl_ibf_init(struct atenl *an, u8 band)
749{
750 struct atenl_nl_priv nl_priv = {};
751 struct nl_msg *msg;
752 void *ptr, *a;
753 int ret;
754
755 if (unl_genl_init(&nl_priv.unl, "nl80211") < 0) {
756 atenl_err("Failed to connect to nl80211\n");
757 return 2;
758 }
759
760 msg = unl_genl_msg(&nl_priv.unl, NL80211_CMD_TESTMODE, false);
761 nla_put_u32(msg, NL80211_ATTR_WIPHY, get_band_val(an, band, phy_idx));
762
763 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
764 if (!ptr) {
765 ret = -ENOMEM;
766 goto out;
767 }
768
769 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_MODE, MT76_TM_TX_MODE_HT);
770 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_IDX, an->ibf_mcs);
771 nla_put_u8(msg, MT76_TM_ATTR_TX_ANTENNA, an->ibf_ant);
772 nla_put_u8(msg, MT76_TM_ATTR_TXBF_ACT, MT76_TM_TXBF_ACT_INIT);
773
774 a = nla_nest_start(msg, MT76_TM_ATTR_TXBF_PARAM);
775 if (!a) {
776 ret = -ENOMEM;
777 goto out;
778 }
779 nla_put_u16(msg, 0, 1);
780 nla_nest_end(msg, a);
781
782 nla_nest_end(msg, ptr);
783
784 ret = unl_genl_request(&nl_priv.unl, msg, NULL, NULL);
785
786out:
787 unl_free(&nl_priv.unl);
788 return ret;
789}
790
791static int
792atenl_nl_ibf_e2p_update(struct atenl *an)
793{
794 struct atenl_nl_priv nl_priv = {};
795 struct nl_msg *msg;
796 void *ptr, *a;
797 int ret;
798
799 if (unl_genl_init(&nl_priv.unl, "nl80211") < 0) {
800 atenl_err("Failed to connect to nl80211\n");
801 return 2;
802 }
803
804 msg = unl_genl_msg(&nl_priv.unl, NL80211_CMD_TESTMODE, false);
805 nla_put_u32(msg, NL80211_ATTR_WIPHY, get_band_val(an, an->cur_band, phy_idx));
806
807 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
808 if (!ptr) {
809 ret = -ENOMEM;
810 goto out;
811 }
812
813 nla_put_u8(msg, MT76_TM_ATTR_TXBF_ACT, MT76_TM_TXBF_ACT_E2P_UPDATE);
814 a = nla_nest_start(msg, MT76_TM_ATTR_TXBF_PARAM);
815 if (!a) {
816 ret = -ENOMEM;
817 goto out;
818 }
819 nla_put_u16(msg, 0, 0);
820 nla_nest_end(msg, a);
821
822 nla_nest_end(msg, ptr);
823
824 ret = unl_genl_request(&nl_priv.unl, msg, NULL, NULL);
825
826out:
827 unl_free(&nl_priv.unl);
828 return ret;
829}
830
developer44ae8e92023-07-21 13:42:14 +0800831void
developer5698c9c2022-05-30 16:40:23 +0800832atenl_get_ibf_cal_result(struct atenl *an)
833{
developerd90747f2023-10-11 15:56:01 +0800834 u16 offset, group_size = 40;
developer5698c9c2022-05-30 16:40:23 +0800835
836 if (an->adie_id == 0x7975)
837 offset = 0x651;
838 else if (an->adie_id == 0x7976)
839 offset = 0x60a;
840
developerd90747f2023-10-11 15:56:01 +0800841 if (is_mt7996(an)) {
842 offset = 0xc00;
843 group_size = 46;
844 }
845
846 /* per group size = 40 or 46, for group 0-8 */
847 atenl_eeprom_read_from_driver(an, offset, group_size * 9);
developer5698c9c2022-05-30 16:40:23 +0800848}
849
850static int
851atenl_nl_ibf_set_val(struct atenl *an, struct atenl_data *data,
852 struct atenl_nl_priv *nl_priv)
developer3abe1ad2022-01-24 11:13:32 +0800853{
854#define MT_IBF(_act) MT76_TM_TXBF_ACT_##_act
855 static const u8 bf_act_map[] = {
856 [TXBF_ACT_IBF_PHASE_COMP] = MT_IBF(PHASE_COMP),
857 [TXBF_ACT_IBF_PROF_UPDATE] = MT_IBF(IBF_PROF_UPDATE),
858 [TXBF_ACT_EBF_PROF_UPDATE] = MT_IBF(EBF_PROF_UPDATE),
859 [TXBF_ACT_IBF_PHASE_CAL] = MT_IBF(PHASE_CAL),
860 };
861#undef MT_IBF
862 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
863 struct nl_msg *msg = nl_priv->msg;
864 u32 *v = (u32 *)(hdr->data + 4);
865 u32 action = ntohl(v[0]);
developerf9843e22022-09-13 10:57:15 +0800866 u16 val[8], is_atenl = 1;
developer5698c9c2022-05-30 16:40:23 +0800867 u8 tmp_ant;
developer3abe1ad2022-01-24 11:13:32 +0800868 void *ptr, *a;
869 char cmd[64];
870 int i;
871
872 for (i = 0; i < 8; i++)
873 val[i] = ntohl(v[i + 1]);
874
875 atenl_dbg("%s: action = %u, val = %u, %u, %u, %u, %u\n",
876 __func__, action, val[0], val[1], val[2], val[3], val[4]);
877
878 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
879 if (!ptr)
880 return -ENOMEM;
881
882 switch (action) {
developer3abe1ad2022-01-24 11:13:32 +0800883 case TXBF_ACT_CHANNEL:
developer5698c9c2022-05-30 16:40:23 +0800884 an->cur_band = val[1];
885 /* a sanity to prevent script band idx error */
886 if (val[0] > 14)
887 an->cur_band = 1;
888 atenl_nl_ibf_init(an, an->cur_band);
889 atenl_set_channel(an, 0, an->cur_band, val[0], 0, 0);
890
891 nla_put_u8(msg, MT76_TM_ATTR_AID, 0);
developer3abe1ad2022-01-24 11:13:32 +0800892 nla_put_u8(msg, MT76_TM_ATTR_TXBF_ACT, MT76_TM_TXBF_ACT_UPDATE_CH);
893 a = nla_nest_start(msg, MT76_TM_ATTR_TXBF_PARAM);
894 if (!a)
895 return -ENOMEM;
896 nla_put_u16(msg, 0, 0);
897 nla_nest_end(msg, a);
898 break;
899 case TXBF_ACT_MCS:
developer5698c9c2022-05-30 16:40:23 +0800900 tmp_ant = (1 << DIV_ROUND_UP(val[0], 8)) - 1 ?: 1;
901 /* sometimes the correct band idx will be set after this action,
902 * so maintain a temp variable to allow mcs update in anthor action.
903 */
904 an->ibf_mcs = val[0];
developer5698c9c2022-05-30 16:40:23 +0800905 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_IDX, an->ibf_mcs);
developerd90747f2023-10-11 15:56:01 +0800906 if (!is_mt7996(an)) {
907 an->ibf_ant = tmp_ant;
908 nla_put_u8(msg, MT76_TM_ATTR_TX_ANTENNA, an->ibf_ant);
909 }
developer3abe1ad2022-01-24 11:13:32 +0800910 break;
911 case TXBF_ACT_TX_ANT:
912 nla_put_u8(msg, MT76_TM_ATTR_TX_ANTENNA, val[0]);
913 break;
914 case TXBF_ACT_RX_START:
915 atenl_set_attr_state(an, msg, an->cur_band, MT76_TM_STATE_RX_FRAMES);
916 break;
917 case TXBF_ACT_RX_ANT:
918 nla_put_u8(msg, MT76_TM_ATTR_TX_ANTENNA, val[0]);
919 break;
920 case TXBF_ACT_TX_PKT:
921 nla_put_u8(msg, MT76_TM_ATTR_AID, val[1]);
developer3abe1ad2022-01-24 11:13:32 +0800922 nla_put_u8(msg, MT76_TM_ATTR_TXBF_ACT, MT76_TM_TXBF_ACT_TX_PREP);
developer77215642023-05-15 13:52:35 +0800923 if (!val[2])
924 nla_put_u32(msg, MT76_TM_ATTR_TX_COUNT, 0xFFFFFFFF);
925 else
926 nla_put_u32(msg, MT76_TM_ATTR_TX_COUNT, val[2]);
developer93dadcc2022-07-13 10:25:35 +0800927 nla_put_u32(msg, MT76_TM_ATTR_TX_LENGTH, 1024);
developer3abe1ad2022-01-24 11:13:32 +0800928 a = nla_nest_start(msg, MT76_TM_ATTR_TXBF_PARAM);
929 if (!a)
930 return -ENOMEM;
931
932 for (i = 0; i < 5; i++)
933 nla_put_u16(msg, i, val[i]);
934 nla_nest_end(msg, a);
935
936 atenl_set_attr_state(an, msg, an->cur_band, MT76_TM_STATE_TX_FRAMES);
937 break;
938 case TXBF_ACT_IBF_PHASE_COMP:
developer5698c9c2022-05-30 16:40:23 +0800939 nla_put_u8(msg, MT76_TM_ATTR_AID, 1);
developer3abe1ad2022-01-24 11:13:32 +0800940 case TXBF_ACT_IBF_PROF_UPDATE:
941 case TXBF_ACT_EBF_PROF_UPDATE:
942 case TXBF_ACT_IBF_PHASE_CAL:
943 nla_put_u8(msg, MT76_TM_ATTR_TXBF_ACT, bf_act_map[action]);
944 a = nla_nest_start(msg, MT76_TM_ATTR_TXBF_PARAM);
945 if (!a)
946 return -ENOMEM;
developerd90747f2023-10-11 15:56:01 +0800947 /* Note: litepoint may send random number for lna_gain_level,
948 * reset to 1 (mid gain) and 0 for wifi 7 and wifi 6, respectively
949 */
developerf9843e22022-09-13 10:57:15 +0800950 if (action == TXBF_ACT_IBF_PHASE_CAL)
developerd90747f2023-10-11 15:56:01 +0800951 val[4] = is_mt7996(an) ? 1 : 0;
developer3abe1ad2022-01-24 11:13:32 +0800952 for (i = 0; i < 5; i++)
953 nla_put_u16(msg, i, val[i]);
developerf9843e22022-09-13 10:57:15 +0800954 /* Used to distinguish between command mode and HQADLL mode */
955 nla_put_u16(msg, 5, is_atenl);
developer3abe1ad2022-01-24 11:13:32 +0800956 nla_nest_end(msg, a);
957 break;
958 case TXBF_ACT_IBF_PHASE_E2P_UPDATE:
developer5698c9c2022-05-30 16:40:23 +0800959 atenl_nl_ibf_e2p_update(an);
960 atenl_get_ibf_cal_result(an);
developer3abe1ad2022-01-24 11:13:32 +0800961
962 nla_put_u8(msg, MT76_TM_ATTR_AID, 0);
963 nla_put_u8(msg, MT76_TM_ATTR_TXBF_ACT, MT76_TM_TXBF_ACT_INIT);
964
965 a = nla_nest_start(msg, MT76_TM_ATTR_TXBF_PARAM);
966 if (!a)
967 return -ENOMEM;
968 nla_put_u16(msg, 0, 0);
969 nla_nest_end(msg, a);
970 break;
developer5698c9c2022-05-30 16:40:23 +0800971 case TXBF_ACT_INIT:
972 case TXBF_ACT_POWER:
developer3abe1ad2022-01-24 11:13:32 +0800973 default:
974 break;
975 }
976
977 nla_nest_end(msg, ptr);
978
developer5698c9c2022-05-30 16:40:23 +0800979 *(u32 *)(hdr->data + 2) = data->ext_id;
developer3abe1ad2022-01-24 11:13:32 +0800980
981 return unl_genl_request(&nl_priv->unl, msg, NULL, NULL);
982}
983
984static int
985atenl_nl_ibf_get_status(struct atenl *an, struct atenl_data *data,
986 struct atenl_nl_priv *nl_priv)
987{
988 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
989 u32 status = htonl(1);
990
developer5698c9c2022-05-30 16:40:23 +0800991 *(u32 *)(hdr->data + 2) = data->ext_id;
developer3abe1ad2022-01-24 11:13:32 +0800992 memcpy(hdr->data + 6, &status, 4);
993
994 return 0;
995}
996
997static int
998atenl_nl_ibf_profile_update_all(struct atenl *an, struct atenl_data *data,
999 struct atenl_nl_priv *nl_priv)
1000{
1001 struct atenl_cmd_hdr *hdr = atenl_hdr(data);
1002 struct nl_msg *msg;
1003 void *ptr, *a;
1004 u32 *v = (u32 *)(hdr->data + 4);
1005 u16 pfmu_idx = ntohl(v[0]);
1006 int i;
1007
1008 for (i = 0, v = &v[5]; i < 64; i++, v += 5) {
1009 int j;
1010
1011 if (unl_genl_init(&nl_priv->unl, "nl80211") < 0) {
developer5698c9c2022-05-30 16:40:23 +08001012 atenl_err("Failed to connect to nl80211\n");
developer3abe1ad2022-01-24 11:13:32 +08001013 return 2;
1014 }
1015
1016 msg = unl_genl_msg(&nl_priv->unl, NL80211_CMD_TESTMODE, false);
1017 nla_put_u32(msg, NL80211_ATTR_WIPHY,
1018 get_band_val(an, an->cur_band, phy_idx));
1019
1020 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
1021 if (!ptr)
1022 return -ENOMEM;
1023
1024 nla_put_u8(msg, MT76_TM_ATTR_TXBF_ACT, MT76_TM_TXBF_ACT_PROF_UPDATE_ALL);
1025 a = nla_nest_start(msg, MT76_TM_ATTR_TXBF_PARAM);
1026 if (!a)
1027 return -ENOMEM;
1028 nla_put_u16(msg, 0, pfmu_idx);
1029
1030 for (j = 0; j < 5; j++)
1031 nla_put_u16(msg, j + 1, ntohl(v[j]));
1032 nla_nest_end(msg, a);
1033
1034 nla_nest_end(msg, ptr);
1035
1036 unl_genl_request(&nl_priv->unl, msg, NULL, NULL);
1037
1038 unl_free(&nl_priv->unl);
1039 }
1040
developer5698c9c2022-05-30 16:40:23 +08001041 *(u32 *)(hdr->data + 2) = data->ext_id;
developer3abe1ad2022-01-24 11:13:32 +08001042
1043 return 0;
1044}
1045
1046#define NL_OPS_GROUP(cmd, ...) [HQA_CMD_##cmd] = { __VA_ARGS__ }
1047static const struct atenl_nl_ops nl_ops[] = {
1048 NL_OPS_GROUP(SET_TX_PATH, .set=MT76_TM_ATTR_TX_ANTENNA),
1049 NL_OPS_GROUP(SET_TX_POWER, .set=MT76_TM_ATTR_TX_POWER),
1050 NL_OPS_GROUP(SET_RX_PATH, .set=MT76_TM_ATTR_TX_ANTENNA),
1051 NL_OPS_GROUP(SET_FREQ_OFFSET, .set=MT76_TM_ATTR_FREQ_OFFSET),
1052 NL_OPS_GROUP(SET_CFG, .ops=atenl_nl_set_cfg),
1053 NL_OPS_GROUP(SET_TSSI, .ops=atenl_nl_set_cfg),
1054 NL_OPS_GROUP(CONTINUOUS_TX, .ops=atenl_nl_continuous_tx),
1055 NL_OPS_GROUP(GET_TX_INFO, .dump=MT76_TM_STATS_ATTR_TX_DONE),
1056 NL_OPS_GROUP(GET_RX_INFO, .ops=atenl_nl_get_rx_info, .dump=true),
1057 NL_OPS_GROUP(SET_RU, .ops=atenl_nl_set_ru),
1058};
1059#undef NL_OPS_GROUP
1060
1061#define NL_OPS_EXT(cmd, ...) [HQA_EXT_CMD_##cmd] = { __VA_ARGS__ }
1062static const struct atenl_nl_ops nl_ops_ext[] = {
1063 NL_OPS_EXT(SET_TX, .ops=atenl_nl_set_tx),
1064 NL_OPS_EXT(START_TX, .ops=atenl_nl_tx),
1065 NL_OPS_EXT(STOP_TX, .ops=atenl_nl_tx),
1066 NL_OPS_EXT(START_RX, .ops=atenl_nl_rx),
1067 NL_OPS_EXT(STOP_RX, .ops=atenl_nl_rx),
1068 NL_OPS_EXT(OFF_CH_SCAN, .ops=atenl_off_ch_scan),
1069 NL_OPS_EXT(IBF_SET_VAL, .ops=atenl_nl_ibf_set_val),
1070 NL_OPS_EXT(IBF_GET_STATUS, .ops=atenl_nl_ibf_get_status),
1071 NL_OPS_EXT(IBF_PROF_UPDATE_ALL, .ops=atenl_nl_ibf_profile_update_all),
1072};
1073#undef NL_OPS_EXT
1074
1075int atenl_nl_process(struct atenl *an, struct atenl_data *data)
1076{
1077 struct atenl_nl_priv nl_priv = {};
1078 const struct atenl_nl_ops *ops;
1079 struct nl_msg *msg;
1080 int ret = 0;
1081
1082 if (data->ext_cmd != 0)
1083 ops = &nl_ops_ext[data->ext_cmd];
1084 else
1085 ops = &nl_ops[data->cmd];
1086
1087 if (unl_genl_init(&nl_priv.unl, "nl80211") < 0) {
developer5698c9c2022-05-30 16:40:23 +08001088 atenl_err("Failed to connect to nl80211\n");
developer3abe1ad2022-01-24 11:13:32 +08001089 return -1;
1090 }
1091
1092 msg = unl_genl_msg(&nl_priv.unl, NL80211_CMD_TESTMODE, !!ops->dump);
1093 nla_put_u32(msg, NL80211_ATTR_WIPHY, get_band_val(an, an->cur_band, phy_idx));
1094 nl_priv.msg = msg;
1095
1096 if (ops->ops) {
1097 ret = ops->ops(an, data, &nl_priv);
1098 } else if (ops->dump) {
1099 nl_priv.attr = ops->dump;
1100 ret = atenl_nl_dump_attr(an, data, &nl_priv);
1101 } else {
1102 nl_priv.attr = ops->set;
1103 ret = atenl_nl_set_attr(an, data, &nl_priv);
1104 }
1105
1106 if (ret)
developer5698c9c2022-05-30 16:40:23 +08001107 atenl_err("command process error: 0x%x (0x%x)\n", data->cmd_id, data->ext_id);
developer3abe1ad2022-01-24 11:13:32 +08001108
1109 unl_free(&nl_priv.unl);
1110
1111 return ret;
1112}
1113
1114int atenl_nl_process_many(struct atenl *an, struct atenl_data *data)
1115{
1116 struct atenl_nl_priv nl_priv = {};
1117 const struct atenl_nl_ops *ops;
1118 int ret = 0;
1119
1120 if (data->ext_cmd != 0)
1121 ops = &nl_ops_ext[data->ext_cmd];
1122 else
1123 ops = &nl_ops[data->cmd];
1124
1125 if (ops->ops)
1126 ret = ops->ops(an, data, &nl_priv);
1127
1128 return ret;
1129}
1130
1131int atenl_nl_set_state(struct atenl *an, u8 band,
1132 enum mt76_testmode_state state)
1133{
1134 struct atenl_nl_priv nl_priv = {};
1135 struct nl_msg *msg;
1136 void *ptr;
1137
1138 if (unl_genl_init(&nl_priv.unl, "nl80211") < 0) {
developer5698c9c2022-05-30 16:40:23 +08001139 atenl_err("Failed to connect to nl80211\n");
developer3abe1ad2022-01-24 11:13:32 +08001140 return 2;
1141 }
1142
1143 msg = unl_genl_msg(&nl_priv.unl, NL80211_CMD_TESTMODE, false);
1144 nla_put_u32(msg, NL80211_ATTR_WIPHY, get_band_val(an, band, phy_idx));
1145
1146 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
1147 if (!ptr)
1148 return -ENOMEM;
1149
1150 atenl_set_attr_state(an, msg, band, state);
1151
1152 nla_nest_end(msg, ptr);
1153
1154 unl_genl_request(&nl_priv.unl, msg, NULL, NULL);
1155
1156 unl_free(&nl_priv.unl);
1157
1158 return 0;
1159}
1160
developer5698c9c2022-05-30 16:40:23 +08001161int atenl_nl_set_aid(struct atenl *an, u8 band, u8 aid)
1162{
1163 struct atenl_nl_priv nl_priv = {};
1164 struct nl_msg *msg;
1165 void *ptr;
1166
1167 if (unl_genl_init(&nl_priv.unl, "nl80211") < 0) {
1168 atenl_err("Failed to connect to nl80211\n");
1169 return 2;
1170 }
1171
1172 msg = unl_genl_msg(&nl_priv.unl, NL80211_CMD_TESTMODE, false);
1173 nla_put_u32(msg, NL80211_ATTR_WIPHY, get_band_val(an, band, phy_idx));
1174
1175 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
1176 if (!ptr)
1177 return -ENOMEM;
1178
1179 nla_put_u8(msg, MT76_TM_ATTR_AID, aid);
1180
1181 nla_nest_end(msg, ptr);
1182
1183 unl_genl_request(&nl_priv.unl, msg, NULL, NULL);
1184
1185 unl_free(&nl_priv.unl);
1186
1187 return 0;
1188}
1189
developer3abe1ad2022-01-24 11:13:32 +08001190static int atenl_nl_check_mtd_cb(struct nl_msg *msg, void *arg)
1191{
1192 struct atenl_nl_priv *nl_priv = (struct atenl_nl_priv *)arg;
1193 struct atenl *an = nl_priv->an;
1194 struct nlattr *tb[NUM_MT76_TM_ATTRS];
1195 struct nlattr *attr;
1196
1197 attr = unl_find_attr(&nl_priv->unl, msg, NL80211_ATTR_TESTDATA);
1198 if (!attr)
1199 return NL_SKIP;
1200
1201 nla_parse_nested(tb, MT76_TM_ATTR_MAX, attr, testdata_policy);
1202 if (!tb[MT76_TM_ATTR_MTD_PART] || !tb[MT76_TM_ATTR_MTD_OFFSET])
1203 return NL_SKIP;
1204
1205 an->mtd_part = strdup(nla_get_string(tb[MT76_TM_ATTR_MTD_PART]));
1206 an->mtd_offset = nla_get_u32(tb[MT76_TM_ATTR_MTD_OFFSET]);
developerf90c9af2022-12-28 22:40:23 +08001207 an->band_idx = nla_get_u32(tb[MT76_TM_ATTR_BAND_IDX]);
developer3abe1ad2022-01-24 11:13:32 +08001208
1209 return NL_SKIP;
1210}
1211
1212int atenl_nl_check_mtd(struct atenl *an)
1213{
1214 struct atenl_nl_priv nl_priv = { .an = an };
1215 struct nl_msg *msg;
1216
1217 if (unl_genl_init(&nl_priv.unl, "nl80211") < 0) {
developer5698c9c2022-05-30 16:40:23 +08001218 atenl_err("Failed to connect to nl80211\n");
developer3abe1ad2022-01-24 11:13:32 +08001219 return 2;
1220 }
1221
1222 msg = unl_genl_msg(&nl_priv.unl, NL80211_CMD_TESTMODE, true);
1223 nla_put_u32(msg, NL80211_ATTR_WIPHY, get_band_val(an, 0, phy_idx));
1224 unl_genl_request(&nl_priv.unl, msg, atenl_nl_check_mtd_cb, (void *)&nl_priv);
1225
1226 unl_free(&nl_priv.unl);
1227
1228 return 0;
1229}
1230
1231int atenl_nl_write_eeprom(struct atenl *an, u32 offset, u8 *val, int len)
1232{
1233 struct atenl_nl_priv nl_priv = {};
1234 struct nl_msg *msg;
1235 void *ptr, *a;
1236 int i;
1237
1238 if (unl_genl_init(&nl_priv.unl, "nl80211") < 0) {
developer5698c9c2022-05-30 16:40:23 +08001239 atenl_err("Failed to connect to nl80211\n");
developer3abe1ad2022-01-24 11:13:32 +08001240 return 2;
1241 }
1242
1243 if (len > 16)
1244 return -EINVAL;
1245
1246 msg = unl_genl_msg(&nl_priv.unl, NL80211_CMD_TESTMODE, false);
1247 nla_put_u32(msg, NL80211_ATTR_WIPHY, get_band_val(an, 0, phy_idx));
1248
1249 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
1250 if (!ptr)
1251 return -ENOMEM;
1252
1253 nla_put_u8(msg, MT76_TM_ATTR_EEPROM_ACTION,
1254 MT76_TM_EEPROM_ACTION_UPDATE_DATA);
1255 nla_put_u32(msg, MT76_TM_ATTR_EEPROM_OFFSET, offset);
1256
1257 a = nla_nest_start(msg, MT76_TM_ATTR_EEPROM_VAL);
1258 if (!a)
1259 return -ENOMEM;
1260
1261 for (i = 0; i < len; i++)
1262 if (nla_put_u8(msg, i, val[i]))
1263 goto out;
1264
1265 nla_nest_end(msg, a);
1266
1267 nla_nest_end(msg, ptr);
1268
1269 unl_genl_request(&nl_priv.unl, msg, NULL, NULL);
1270
1271 unl_free(&nl_priv.unl);
1272
1273out:
1274 return 0;
1275}
1276
developer9b7cdad2022-03-10 14:24:55 +08001277int atenl_nl_write_efuse_all(struct atenl *an)
developer3abe1ad2022-01-24 11:13:32 +08001278{
1279 struct atenl_nl_priv nl_priv = {};
1280 struct nl_msg *msg;
1281 void *ptr;
1282
1283 if (unl_genl_init(&nl_priv.unl, "nl80211") < 0) {
developer5698c9c2022-05-30 16:40:23 +08001284 atenl_err("Failed to connect to nl80211\n");
developer3abe1ad2022-01-24 11:13:32 +08001285 return 2;
1286 }
1287
1288 msg = unl_genl_msg(&nl_priv.unl, NL80211_CMD_TESTMODE, false);
1289 nla_put_u32(msg, NL80211_ATTR_WIPHY, get_band_val(an, 0, phy_idx));
1290
1291 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
1292 if (!ptr)
1293 return -ENOMEM;
1294
1295 nla_put_u8(msg, MT76_TM_ATTR_EEPROM_ACTION,
1296 MT76_TM_EEPROM_ACTION_WRITE_TO_EFUSE);
1297
1298 nla_nest_end(msg, ptr);
1299
1300 unl_genl_request(&nl_priv.unl, msg, NULL, NULL);
1301
1302 unl_free(&nl_priv.unl);
1303
1304 return 0;
1305}
1306
1307int atenl_nl_update_buffer_mode(struct atenl *an)
1308{
1309 struct atenl_nl_priv nl_priv = {};
1310 struct nl_msg *msg;
1311 void *ptr;
1312
1313 if (unl_genl_init(&nl_priv.unl, "nl80211") < 0) {
developer5698c9c2022-05-30 16:40:23 +08001314 atenl_err("Failed to connect to nl80211\n");
developer3abe1ad2022-01-24 11:13:32 +08001315 return 2;
1316 }
1317
1318 msg = unl_genl_msg(&nl_priv.unl, NL80211_CMD_TESTMODE, false);
1319 nla_put_u32(msg, NL80211_ATTR_WIPHY, get_band_val(an, 0, phy_idx));
1320
1321 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
1322 if (!ptr)
1323 return -ENOMEM;
1324
1325 nla_put_u8(msg, MT76_TM_ATTR_EEPROM_ACTION,
1326 MT76_TM_EEPROM_ACTION_UPDATE_BUFFER_MODE);
1327
1328 nla_nest_end(msg, ptr);
1329
1330 unl_genl_request(&nl_priv.unl, msg, NULL, NULL);
1331
1332 unl_free(&nl_priv.unl);
1333
1334 return 0;
1335}
1336
developer071927d2022-08-31 20:39:29 +08001337static int atenl_nl_precal_sync_from_driver_cb(struct nl_msg *msg, void *arg)
1338{
1339 struct atenl_nl_priv *nl_priv = (struct atenl_nl_priv *)arg;
1340 struct atenl *an = nl_priv->an;
1341 struct nlattr *tb[NUM_MT76_TM_ATTRS];
1342 struct nlattr *attr, *cur;
1343 int i, rem, prek_offset = nl_priv->attr;
1344
1345
1346 attr = unl_find_attr(&nl_priv->unl, msg, NL80211_ATTR_TESTDATA);
1347 if (!attr)
1348 return NL_SKIP;
1349
1350 nla_parse_nested(tb, MT76_TM_ATTR_MAX, attr, testdata_policy);
1351
1352 if (!tb[MT76_TM_ATTR_PRECAL_INFO] && !tb[MT76_TM_ATTR_PRECAL]) {
1353 atenl_info("No Pre cal data or info!\n");
1354 return NL_SKIP;
1355 }
1356
1357 if (tb[MT76_TM_ATTR_PRECAL_INFO]) {
1358 i = 0;
1359 nla_for_each_nested(cur, tb[MT76_TM_ATTR_PRECAL_INFO], rem) {
1360 an->cal_info[i] = (u32) nla_get_u32(cur);
1361 i++;
1362 }
1363 return NL_SKIP;
1364 }
1365
1366 if (tb[MT76_TM_ATTR_PRECAL] && an->cal) {
1367 i = prek_offset;
1368 nla_for_each_nested(cur, tb[MT76_TM_ATTR_PRECAL], rem) {
1369 an->cal[i] = (u8) nla_get_u8(cur);
1370 i++;
1371 }
1372 return NL_SKIP;
1373 }
1374 atenl_info("No data found for pre-cal!\n");
1375
1376 return NL_SKIP;
1377}
1378
1379static int
1380atenl_nl_precal_sync_partition(struct atenl_nl_priv *nl_priv, enum mt76_testmode_attr attr,
1381 int prek_type, int prek_offset)
1382{
1383 int ret;
1384 void *ptr;
1385 struct nl_msg *msg;
1386 struct atenl *an = nl_priv->an;
1387
1388 msg = unl_genl_msg(&(nl_priv->unl), NL80211_CMD_TESTMODE, true);
1389 nla_put_u32(msg, NL80211_ATTR_WIPHY, get_band_val(an, an->cur_band, phy_idx));
1390 nl_priv->msg = msg;
1391 nl_priv->attr = prek_offset;
1392
1393 ptr = nla_nest_start(msg, NL80211_ATTR_TESTDATA);
1394 if (!ptr)
1395 return -ENOMEM;
1396
1397 nla_put_flag(msg, attr);
1398 if (attr == MT76_TM_ATTR_PRECAL)
1399 nla_put_u8(msg, MT76_TM_ATTR_PRECAL_INFO, prek_type);
1400 nla_nest_end(msg, ptr);
1401
1402 ret = unl_genl_request(&(nl_priv->unl), msg, atenl_nl_precal_sync_from_driver_cb, (void *)nl_priv);
1403
1404 if (ret) {
1405 atenl_err("command process error!\n");
1406 return ret;
1407 }
1408
1409 return 0;
1410}
1411
1412int atenl_nl_precal_sync_from_driver(struct atenl *an, enum prek_ops ops)
1413{
developer11f4a0b2023-03-31 17:43:25 +08001414#define GROUP_IND_MASK BIT(0)
1415#define GROUP_IND_MASK_7996 GENMASK(2, 0)
1416#define DPD_IND_MASK GENMASK(3, 1)
1417#define DPD_IND_MASK_7996 GENMASK(5, 3)
developer071927d2022-08-31 20:39:29 +08001418 int ret;
1419 u32 i, times, group_size, dpd_size, total_size, transmit_size, offs;
developer11f4a0b2023-03-31 17:43:25 +08001420 u32 dpd_per_chan_size, dpd_chan_ratio[3], total_ratio;
1421 u32 size, base, base_idx, dpd_base_map, *size_ptr;
1422 u8 cal_indicator, group_ind_mask, dpd_ind_mask, *precal_info;
developer071927d2022-08-31 20:39:29 +08001423 struct atenl_nl_priv nl_priv = { .an = an };
1424
1425 offs = an->eeprom_prek_offs;
1426 cal_indicator = an->eeprom_data[offs];
developer11f4a0b2023-03-31 17:43:25 +08001427 group_ind_mask = is_mt7996(an) ? GROUP_IND_MASK_7996 : GROUP_IND_MASK;
1428 dpd_ind_mask = is_mt7996(an) ? DPD_IND_MASK_7996 : DPD_IND_MASK;
developer071927d2022-08-31 20:39:29 +08001429
1430 if (cal_indicator) {
1431 precal_info = an->eeprom_data + an->eeprom_size;
1432 memcpy(an->cal_info, precal_info, PRE_CAL_INFO);
1433 group_size = an->cal_info[0];
1434 dpd_size = an->cal_info[1];
1435 total_size = group_size + dpd_size;
developer11f4a0b2023-03-31 17:43:25 +08001436 dpd_chan_ratio[0] = (an->cal_info[2] >> DPD_INFO_6G_SHIFT) &
1437 DPD_INFO_MASK;
1438 dpd_chan_ratio[1] = (an->cal_info[2] >> DPD_INFO_5G_SHIFT) &
1439 DPD_INFO_MASK;
1440 dpd_chan_ratio[2] = (an->cal_info[2] >> DPD_INFO_2G_SHIFT) &
1441 DPD_INFO_MASK;
1442 dpd_per_chan_size = (an->cal_info[2] >> DPD_INFO_CH_SHIFT) &
1443 DPD_INFO_MASK;
1444 total_ratio = dpd_chan_ratio[0] + dpd_chan_ratio[1] +
1445 dpd_chan_ratio[2];
developer071927d2022-08-31 20:39:29 +08001446 }
1447
1448 switch (ops){
1449 case PREK_SYNC_ALL:
1450 size_ptr = &total_size;
1451 base_idx = 0;
developer11f4a0b2023-03-31 17:43:25 +08001452 dpd_base_map = 0;
developer071927d2022-08-31 20:39:29 +08001453 goto start;
1454 case PREK_SYNC_GROUP:
1455 size_ptr = &group_size;
1456 base_idx = 0;
developer11f4a0b2023-03-31 17:43:25 +08001457 dpd_base_map = 0;
developer071927d2022-08-31 20:39:29 +08001458 goto start;
1459 case PREK_SYNC_DPD_6G:
1460 size_ptr = &dpd_size;
1461 base_idx = 0;
developer11f4a0b2023-03-31 17:43:25 +08001462 dpd_base_map = is_mt7996(an) ? GENMASK(2, 1) : 0;
developer071927d2022-08-31 20:39:29 +08001463 goto start;
1464 case PREK_SYNC_DPD_5G:
1465 size_ptr = &dpd_size;
1466 base_idx = 1;
developer11f4a0b2023-03-31 17:43:25 +08001467 dpd_base_map = is_mt7996(an) ? BIT(2) : BIT(0);
developer071927d2022-08-31 20:39:29 +08001468 goto start;
1469 case PREK_SYNC_DPD_2G:
1470 size_ptr = &dpd_size;
1471 base_idx = 2;
developer11f4a0b2023-03-31 17:43:25 +08001472 dpd_base_map = is_mt7996(an) ? 0 : GENMASK(1, 0);
developer071927d2022-08-31 20:39:29 +08001473
1474start:
1475 if (unl_genl_init(&nl_priv.unl, "nl80211") < 0) {
1476 atenl_err("Failed to connect to nl80211\n");
1477 return 2;
1478 }
1479
1480 ret = atenl_nl_precal_sync_partition(&nl_priv, MT76_TM_ATTR_PRECAL_INFO, 0, 0);
1481 if (ret || !an->cal_info)
1482 goto out;
1483
1484 group_size = an->cal_info[0];
1485 dpd_size = an->cal_info[1];
1486 total_size = group_size + dpd_size;
developer11f4a0b2023-03-31 17:43:25 +08001487 dpd_chan_ratio[0] = (an->cal_info[2] >> DPD_INFO_6G_SHIFT) &
1488 DPD_INFO_MASK;
1489 dpd_chan_ratio[1] = (an->cal_info[2] >> DPD_INFO_5G_SHIFT) &
1490 DPD_INFO_MASK;
1491 dpd_chan_ratio[2] = (an->cal_info[2] >> DPD_INFO_2G_SHIFT) &
1492 DPD_INFO_MASK;
1493 dpd_per_chan_size = (an->cal_info[2] >> DPD_INFO_CH_SHIFT) &
1494 DPD_INFO_MASK;
1495 total_ratio = dpd_chan_ratio[0] + dpd_chan_ratio[1] +
1496 dpd_chan_ratio[2];
developer071927d2022-08-31 20:39:29 +08001497 transmit_size = an->cal_info[3];
1498
1499 size = *size_ptr;
developer11f4a0b2023-03-31 17:43:25 +08001500 if (size_ptr == &dpd_size)
1501 size = size / total_ratio * dpd_chan_ratio[base_idx];
1502
developer071927d2022-08-31 20:39:29 +08001503 base = 0;
developer11f4a0b2023-03-31 17:43:25 +08001504 for (i = 0; i < 3; i++) {
1505 if (dpd_base_map & BIT(i))
1506 base += dpd_chan_ratio[i] * dpd_per_chan_size *
1507 MT_EE_CAL_UNIT;
developer071927d2022-08-31 20:39:29 +08001508 }
1509 base += (size_ptr == &dpd_size) ? group_size : 0;
1510
1511 if (!an->cal)
1512 an->cal = (u8 *) calloc(size, sizeof(u8));
1513 times = size / transmit_size + 1;
1514 for (i = 0; i < times; i++) {
1515 ret = atenl_nl_precal_sync_partition(&nl_priv, MT76_TM_ATTR_PRECAL, ops,
1516 i * transmit_size);
1517 if (ret)
1518 goto out;
1519 }
1520
1521 ret = atenl_eeprom_update_precal(an, base, size);
1522 break;
1523 case PREK_CLEAN_GROUP:
developer11f4a0b2023-03-31 17:43:25 +08001524 if (!(cal_indicator & group_ind_mask))
developer071927d2022-08-31 20:39:29 +08001525 return 0;
developer11f4a0b2023-03-31 17:43:25 +08001526 an->cal_info[4] = cal_indicator & group_ind_mask;
developer071927d2022-08-31 20:39:29 +08001527 ret = atenl_eeprom_update_precal(an, 0, group_size);
1528 break;
1529 case PREK_CLEAN_DPD:
developer11f4a0b2023-03-31 17:43:25 +08001530 if (!(cal_indicator & dpd_ind_mask))
developer071927d2022-08-31 20:39:29 +08001531 return 0;
developer11f4a0b2023-03-31 17:43:25 +08001532 an->cal_info[4] = cal_indicator & dpd_ind_mask;
developer071927d2022-08-31 20:39:29 +08001533 ret = atenl_eeprom_update_precal(an, group_size, dpd_size);
1534 break;
1535 default:
1536 break;
1537 }
1538
1539out:
1540 unl_free(&nl_priv.unl);
1541 return ret;
1542}