blob: 0386c84e83a20a9ba4050195fdad1b8fbf1e62e4 [file] [log] [blame]
developer5f11e9e2022-03-10 15:03:47 +08001diff --git a/package/kernel/mt76/patches/1004-mt76-mt7915-add-support-for-muru_onoff-via-debugfs.patch b/package/kernel/mt76/patches/1004-mt76-mt7915-add-support-for-muru_onoff-via-debugfs.patch
developer96ba36c2021-12-21 16:46:38 +08002new file mode 100644
developer5f11e9e2022-03-10 15:03:47 +08003index 00000000..f5a1fd2c
developer96ba36c2021-12-21 16:46:38 +08004--- /dev/null
developer5f11e9e2022-03-10 15:03:47 +08005+++ b/package/kernel/mt76/patches/1004-mt76-mt7915-add-support-for-muru_onoff-via-debugfs.patch
6@@ -0,0 +1,138 @@
7+From c63fc9b1f392dcfc889bf89c410f93e823d4cec9 Mon Sep 17 00:00:00 2001
8+From: MeiChia Chiu <meichia.chiu@mediatek.com>
9+Date: Thu, 17 Feb 2022 00:28:21 +0800
10+Subject: [PATCH 1004/1006] mt76: mt7915: add support for muru_onoff via
11+ debugfs
12+
13+---
14+ .../net/wireless/mediatek/mt76/mt7915/init.c | 1 +
15+ .../net/wireless/mediatek/mt76/mt7915/mcu.c | 12 ++++---
16+ .../net/wireless/mediatek/mt76/mt7915/mcu.h | 6 ++++
17+ .../wireless/mediatek/mt76/mt7915/mt7915.h | 1 +
18+ .../mediatek/mt76/mt7915/mtk_debugfs.c | 33 +++++++++++++++++++
19+ 5 files changed, 49 insertions(+), 4 deletions(-)
20+
developer96ba36c2021-12-21 16:46:38 +080021+diff --git a/mt7915/init.c b/mt7915/init.c
developer5f11e9e2022-03-10 15:03:47 +080022+index 96a1bb4..a12b701 100644
developer96ba36c2021-12-21 16:46:38 +080023+--- a/mt7915/init.c
24++++ b/mt7915/init.c
developer5f11e9e2022-03-10 15:03:47 +080025+@@ -568,6 +568,7 @@ static void mt7915_init_work(struct work_struct *work)
developer96ba36c2021-12-21 16:46:38 +080026+ mt7915_init_txpower(dev, &dev->mphy.sband_2g.sband);
27+ mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband);
28+ mt7915_txbf_init(dev);
29++ dev->dbg.muru_onoff = OFDMA_DL | MUMIMO_UL | MUMIMO_DL;
30+ }
31+
32+ static void mt7915_wfsys_reset(struct mt7915_dev *dev)
33+diff --git a/mt7915/mcu.c b/mt7915/mcu.c
developer5f11e9e2022-03-10 15:03:47 +080034+index f6897bf..f01a2f0 100644
developer96ba36c2021-12-21 16:46:38 +080035+--- a/mt7915/mcu.c
36++++ b/mt7915/mcu.c
developer5f11e9e2022-03-10 15:03:47 +080037+@@ -939,6 +939,7 @@ mt7915_mcu_sta_muru_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
developer96ba36c2021-12-21 16:46:38 +080038+ struct ieee80211_vif *vif)
39+ {
40+ struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
41++ struct mt7915_dev *dev = mvif->phy->dev;
42+ struct ieee80211_he_cap_elem *elem = &sta->he_cap.he_cap_elem;
43+ struct sta_rec_muru *muru;
44+ struct tlv *tlv;
developer5f11e9e2022-03-10 15:03:47 +080045+@@ -951,11 +952,14 @@ mt7915_mcu_sta_muru_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
developer96ba36c2021-12-21 16:46:38 +080046+
47+ muru = (struct sta_rec_muru *)tlv;
48+
49+- muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer ||
50++ muru->cfg.mimo_dl_en = (mvif->cap.he_mu_ebfer ||
51+ mvif->cap.vht_mu_ebfer ||
52+- mvif->cap.vht_mu_ebfee;
developer5f11e9e2022-03-10 15:03:47 +080053+- muru->cfg.mimo_ul_en = true;
54+- muru->cfg.ofdma_dl_en = true;
developer96ba36c2021-12-21 16:46:38 +080055++ mvif->cap.vht_mu_ebfee) &&
56++ !!(dev->dbg.muru_onoff & MUMIMO_DL);
developer5f11e9e2022-03-10 15:03:47 +080057++
developer96ba36c2021-12-21 16:46:38 +080058++ muru->cfg.mimo_ul_en = !!(dev->dbg.muru_onoff & MUMIMO_UL);
developer96ba36c2021-12-21 16:46:38 +080059++ muru->cfg.ofdma_dl_en = !!(dev->dbg.muru_onoff & OFDMA_DL);
60++ muru->cfg.ofdma_ul_en = !!(dev->dbg.muru_onoff & OFDMA_UL);
developer5f11e9e2022-03-10 15:03:47 +080061+
62+ if (sta->vht_cap.vht_supported)
63+ muru->mimo_dl.vht_mu_bfee =
developer96ba36c2021-12-21 16:46:38 +080064+diff --git a/mt7915/mcu.h b/mt7915/mcu.h
developer5f11e9e2022-03-10 15:03:47 +080065+index 372125a..2a88bee 100644
developer96ba36c2021-12-21 16:46:38 +080066+--- a/mt7915/mcu.h
67++++ b/mt7915/mcu.h
developer5f11e9e2022-03-10 15:03:47 +080068+@@ -568,4 +568,10 @@ struct csi_data {
developer96ba36c2021-12-21 16:46:38 +080069+ };
70+ #endif
71+
72++/* MURU */
73++#define OFDMA_DL BIT(0)
74++#define OFDMA_UL BIT(1)
75++#define MUMIMO_DL BIT(2)
76++#define MUMIMO_UL BIT(3)
77++
78+ #endif
79+diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developer5f11e9e2022-03-10 15:03:47 +080080+index 85d05f7..eddcc6d 100644
developer96ba36c2021-12-21 16:46:38 +080081+--- a/mt7915/mt7915.h
82++++ b/mt7915/mt7915.h
developer5f11e9e2022-03-10 15:03:47 +080083+@@ -383,6 +383,7 @@ struct mt7915_dev {
developer96ba36c2021-12-21 16:46:38 +080084+ u32 bcn_total_cnt[2];
85+ u16 fwlog_seq;
86+ u32 token_idx;
87++ u8 muru_onoff;
88+ } dbg;
developer5f11e9e2022-03-10 15:03:47 +080089+ const struct mt7915_dbg_reg_desc *dbg_reg;
developer96ba36c2021-12-21 16:46:38 +080090+ #endif
developer96ba36c2021-12-21 16:46:38 +080091+diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c
developer5f11e9e2022-03-10 15:03:47 +080092+index 2616fbf..4ebeeb2 100644
developer96ba36c2021-12-21 16:46:38 +080093+--- a/mt7915/mtk_debugfs.c
94++++ b/mt7915/mtk_debugfs.c
developer5f11e9e2022-03-10 15:03:47 +080095+@@ -2430,6 +2430,38 @@ static int mt7915_token_txd_read(struct seq_file *s, void *data)
developer96ba36c2021-12-21 16:46:38 +080096+ return 0;
97+ }
98+
99++static int mt7915_muru_onoff_get(void *data, u64 *val)
100++{
101++ struct mt7915_dev *dev = data;
102++
103++ *val = dev->dbg.muru_onoff;
104++
105++ printk("mumimo ul:%d, mumimo dl:%d, ofdma ul:%d, ofdma dl:%d\n",
106++ !!(dev->dbg.muru_onoff & MUMIMO_UL),
107++ !!(dev->dbg.muru_onoff & MUMIMO_DL),
108++ !!(dev->dbg.muru_onoff & OFDMA_UL),
109++ !!(dev->dbg.muru_onoff & OFDMA_DL));
110++
111++ return 0;
112++}
113++
114++static int mt7915_muru_onoff_set(void *data, u64 val)
115++{
116++ struct mt7915_dev *dev = data;
117++
118++ if (val > 15) {
119++ printk("Wrong value! The value is between 0 ~ 15.\n");
120++ goto exit;
121++ }
122++
123++ dev->dbg.muru_onoff = val;
124++exit:
125++ return 0;
126++}
127++
128++DEFINE_DEBUGFS_ATTRIBUTE(fops_muru_onoff, mt7915_muru_onoff_get,
129++ mt7915_muru_onoff_set, "%llx\n");
130++
developer5f11e9e2022-03-10 15:03:47 +0800131+ static int mt7915_amsduinfo_read(struct seq_file *s, void *data)
developer96ba36c2021-12-21 16:46:38 +0800132+ {
developer5f11e9e2022-03-10 15:03:47 +0800133+ struct mt7915_dev *dev = dev_get_drvdata(s->private);
134+@@ -2807,6 +2839,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir)
135+
136+ mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
developer96ba36c2021-12-21 16:46:38 +0800137+
138++ debugfs_create_file("muru_onoff", 0600, dir, dev, &fops_muru_onoff);
developer96ba36c2021-12-21 16:46:38 +0800139+ debugfs_create_file("fw_debug_module", 0600, dir, dev,
140+ &fops_fw_debug_module);
developer5f11e9e2022-03-10 15:03:47 +0800141+ debugfs_create_file("fw_debug_level", 0600, dir, dev,
developer96ba36c2021-12-21 16:46:38 +0800142+--
developer5f11e9e2022-03-10 15:03:47 +0800143+2.25.1
developer96ba36c2021-12-21 16:46:38 +0800144+