blob: e97ff9bf21eff5d5ae2ff17ac8a7c69943f94377 [file] [log] [blame]
developer5d148cb2023-06-02 13:08:11 +08001From 64902a41254881d559a2f1e4d2966f16e4a7f98a Mon Sep 17 00:00:00 2001
2From: Sam Shih <sam.shih@mediatek.com>
3Date: Fri, 2 Jun 2023 13:06:06 +0800
4Subject: [PATCH] [slow-speed-io][999-2110-i2c-busses-add-mt7986-support.patch]
5
6---
7 drivers/i2c/busses/i2c-mt65xx.c | 14 ++++++++++++++
8 1 file changed, 14 insertions(+)
9
developer8b9f2852021-06-03 21:53:08 +080010diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
developer5d148cb2023-06-02 13:08:11 +080011index 5587e7c54..14d96c876 100644
developer8b9f2852021-06-03 21:53:08 +080012--- a/drivers/i2c/busses/i2c-mt65xx.c
13+++ b/drivers/i2c/busses/i2c-mt65xx.c
14@@ -289,6 +289,19 @@ static const struct mtk_i2c_compatible mt7622_compat = {
15 .ltiming_adjust = 0,
16 };
developer5d148cb2023-06-02 13:08:11 +080017
developer8b9f2852021-06-03 21:53:08 +080018+static const struct mtk_i2c_compatible mt7986_compat = {
19+ .quirks = &mt7622_i2c_quirks,
20+ .regs = mt_i2c_regs_v1,
21+ .pmic_i2c = 0,
22+ .dcm = 1,
23+ .auto_restart = 1,
24+ .aux_len_reg = 1,
25+ .support_33bits = 0,
26+ .timing_adjust = 0,
27+ .dma_sync = 1,
28+ .ltiming_adjust = 0,
29+};
30+
31 static const struct mtk_i2c_compatible mt8173_compat = {
32 .regs = mt_i2c_regs_v1,
33 .pmic_i2c = 0,
34@@ -319,6 +332,7 @@ static const struct of_device_id mtk_i2c_of_match[] = {
35 { .compatible = "mediatek,mt6577-i2c", .data = &mt6577_compat },
36 { .compatible = "mediatek,mt6589-i2c", .data = &mt6589_compat },
37 { .compatible = "mediatek,mt7622-i2c", .data = &mt7622_compat },
38+ { .compatible = "mediatek,mt7986-i2c", .data = &mt7986_compat },
39 { .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
40 { .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
41 {}
developer5d148cb2023-06-02 13:08:11 +080042--
432.34.1
44