developer | d80acd0 | 2024-02-20 14:28:44 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * Copyright (c) 2023 MediaTek Inc. All Rights Reserved. |
| 4 | * |
| 5 | * Author: Alvin Kuo <alvin.kuo@mediatek.com> |
| 6 | */ |
| 7 | |
| 8 | #include "tops/internal.h" |
| 9 | #include "tops/misc.h" |
| 10 | #include "tops/mbox.h" |
| 11 | #include "tops/netsys.h" |
| 12 | |
| 13 | static struct mailbox_dev offload_send_mbox_dev[CORE_OFFLOAD_NUM] = { |
| 14 | [CORE_OFFLOAD_0] = MBOX_SEND_OFFLOAD_DEV(0, MISC), |
| 15 | [CORE_OFFLOAD_1] = MBOX_SEND_OFFLOAD_DEV(1, MISC), |
| 16 | [CORE_OFFLOAD_2] = MBOX_SEND_OFFLOAD_DEV(2, MISC), |
| 17 | [CORE_OFFLOAD_3] = MBOX_SEND_OFFLOAD_DEV(3, MISC), |
| 18 | }; |
| 19 | |
| 20 | int mtk_tops_misc_set_ppe_num(void) |
| 21 | { |
| 22 | struct mailbox_msg msg = { |
| 23 | .msg1 = MISC_CMD_TYPE_SET_PPE_NUM, |
| 24 | .msg2 = mtk_tops_netsys_ppe_get_num(), |
| 25 | }; |
| 26 | enum core_id core; |
| 27 | int ret; |
| 28 | |
| 29 | for (core = CORE_OFFLOAD_0; core < CORE_OFFLOAD_NUM; core++) { |
| 30 | ret = mbox_send_msg_no_wait(&offload_send_mbox_dev[core], &msg); |
| 31 | /* TODO: error handle? */ |
| 32 | if (ret) |
| 33 | TOPS_ERR("core offload%u set PPE num failed: %d\n", |
| 34 | core, ret); |
| 35 | } |
| 36 | |
| 37 | return ret; |
| 38 | } |
| 39 | |
| 40 | int mtk_tops_misc_init(struct platform_device *pdev) |
| 41 | { |
| 42 | enum core_id core; |
| 43 | int ret; |
| 44 | |
| 45 | for (core = CORE_OFFLOAD_0; core < CORE_OFFLOAD_NUM; core++) { |
| 46 | ret = register_mbox_dev(MBOX_SEND, &offload_send_mbox_dev[core]); |
| 47 | if (ret) |
| 48 | goto err_out; |
| 49 | } |
| 50 | |
| 51 | return ret; |
| 52 | |
| 53 | err_out: |
| 54 | for (; core > 0; core--) |
| 55 | unregister_mbox_dev(MBOX_SEND, &offload_send_mbox_dev[core - 1]); |
| 56 | |
| 57 | return ret; |
| 58 | } |
| 59 | |
| 60 | void mtk_tops_misc_deinit(struct platform_device *pdev) |
| 61 | { |
| 62 | enum core_id core; |
| 63 | |
| 64 | for (core = CORE_OFFLOAD_0; core < CORE_OFFLOAD_NUM; core++) |
| 65 | unregister_mbox_dev(MBOX_SEND, &offload_send_mbox_dev[core]); |
| 66 | } |