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git01.mediatek.com / openwrt / feeds / mtk-openwrt-feeds / 26d5f41cdca7ef0bc2c21592098673029313760a / . / target / linux / mediatek / patches-5.4 / 999-2334-mtd-spinand-gigadevice-Add-support-for-GD5FxGQxUExxG-GD5FxGQxUExxH-and-GD5FxGMxUExxG-series.patch
blob: c609bd78779918c5394f40118da716dedfeece91 [file] [log] [blame]
developer5d148cb2023-06-02 13:08:11 +0800[diff] [blame]1From b8ffe42101eb8abfb6530396e0c74a85b43eed44 Mon Sep 17 00:00:00 2001
2From: Sam Shih <sam.shih@mediatek.com>
3Date: Fri, 2 Jun 2023 13:06:15 +0800
4Subject: [PATCH]
5 [spi-and-storage][999-2334-mtd-spinand-gigadevice-Add-support-for-GD5FxGQxUExxG-GD5FxGQxUExxH-and-GD5FxGMxUExxG-series.patch]
6
7---
8 drivers/mtd/nand/spi/gigadevice.c | 98 +++++++++++++++++++++++++++++--
9 1 file changed, 94 insertions(+), 4 deletions(-)
10
11diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
12index ce88f0c91..a4e89529d 100644
developera72492d2022-03-17 13:14:14 +0800[diff] [blame]13--- a/drivers/mtd/nand/spi/gigadevice.c
14+++ b/drivers/mtd/nand/spi/gigadevice.c
developer5d148cb2023-06-02 13:08:11 +0800[diff] [blame]15@@ -39,8 +39,9 @@ static SPINAND_OP_VARIANTS(read_cache_variants_f,
developera72492d2022-03-17 13:14:14 +0800[diff] [blame]16 SPINAND_PAGE_READ_FROM_CACHE_OP_3A(true, 0, 1, NULL, 0),
17 SPINAND_PAGE_READ_FROM_CACHE_OP_3A(false, 0, 0, NULL, 0));
18
19-/* Q5 devices, QUADIO: Dummy bytes only valid for 1 GBit variants */
20-static SPINAND_OP_VARIANTS(gd5f1gq5_read_cache_variants,
21+/* For Q5 devices, QUADIO use different dummy byte settings */
22+/* Q5 1Gb */
23+static SPINAND_OP_VARIANTS(dummy2_read_cache_variants,
24 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
25 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
26 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
developer5d148cb2023-06-02 13:08:11 +0800[diff] [blame]27@@ -48,6 +49,15 @@ static SPINAND_OP_VARIANTS(gd5f1gq5_read_cache_variants,
developera72492d2022-03-17 13:14:14 +0800[diff] [blame]28 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
29 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
30
31+/* Q5 2Gb & 4Gb */
32+static SPINAND_OP_VARIANTS(dummy4_read_cache_variants,
33+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 4, NULL, 0),
34+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
35+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 2, NULL, 0),
36+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
37+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
38+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
39+
40 static SPINAND_OP_VARIANTS(write_cache_variants,
41 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
42 SPINAND_PROG_LOAD(true, 0, NULL, 0));
developer5d148cb2023-06-02 13:08:11 +0800[diff] [blame]43@@ -249,7 +259,7 @@ static const struct spinand_info gigadevice_spinand_table[] = {
developera72492d2022-03-17 13:14:14 +0800[diff] [blame]44 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
45 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
46 NAND_ECCREQ(8, 512),
47- SPINAND_INFO_OP_VARIANTS(&gd5f1gq5_read_cache_variants,
48+ SPINAND_INFO_OP_VARIANTS(&dummy2_read_cache_variants,
49 &write_cache_variants,
50 &update_cache_variants),
51 0,
developer5d148cb2023-06-02 13:08:11 +0800[diff] [blame]52@@ -309,7 +319,87 @@ static const struct spinand_info gigadevice_spinand_table[] = {
developera72492d2022-03-17 13:14:14 +0800[diff] [blame]53 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x51),
54 NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
55 NAND_ECCREQ(4, 512),
56- SPINAND_INFO_OP_VARIANTS(&gd5f1gq5_read_cache_variants,
57+ SPINAND_INFO_OP_VARIANTS(&dummy2_read_cache_variants,
58+ &write_cache_variants,
59+ &update_cache_variants),
60+ SPINAND_HAS_QE_BIT,
61+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
62+ gd5fxgq5xexxg_ecc_get_status)),
63+ SPINAND_INFO("GD5F2GQ5UExxG",
64+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x52),
65+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
66+ NAND_ECCREQ(4, 512),
67+ SPINAND_INFO_OP_VARIANTS(&dummy4_read_cache_variants,
68+ &write_cache_variants,
69+ &update_cache_variants),
70+ SPINAND_HAS_QE_BIT,
71+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
72+ gd5fxgq5xexxg_ecc_get_status)),
73+ SPINAND_INFO("GD5F4GQ6UExxG",
74+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x55),
75+ NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 1, 1, 1),
76+ NAND_ECCREQ(4, 512),
77+ SPINAND_INFO_OP_VARIANTS(&dummy4_read_cache_variants,
78+ &write_cache_variants,
79+ &update_cache_variants),
80+ SPINAND_HAS_QE_BIT,
81+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
82+ gd5fxgq5xexxg_ecc_get_status)),
83+ SPINAND_INFO("GD5F1GM7UExxG",
84+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x91),
85+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
86+ NAND_ECCREQ(8, 512),
87+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
88+ &write_cache_variants,
89+ &update_cache_variants),
90+ SPINAND_HAS_QE_BIT,
91+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
92+ gd5fxgq4uexxg_ecc_get_status)),
93+ SPINAND_INFO("GD5F2GM7UExxG",
94+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x92),
95+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
96+ NAND_ECCREQ(8, 512),
97+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
98+ &write_cache_variants,
99+ &update_cache_variants),
100+ SPINAND_HAS_QE_BIT,
101+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
102+ gd5fxgq4uexxg_ecc_get_status)),
103+ SPINAND_INFO("GD5F4GM8UExxG",
104+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x95),
105+ NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 1, 1, 1),
106+ NAND_ECCREQ(8, 512),
107+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
108+ &write_cache_variants,
109+ &update_cache_variants),
110+ SPINAND_HAS_QE_BIT,
111+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
112+ gd5fxgq4uexxg_ecc_get_status)),
113+ SPINAND_INFO("GD5F1GQ5UExxH",
114+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x31),
115+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
116+ NAND_ECCREQ(4, 512),
117+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
118+ &write_cache_variants,
119+ &update_cache_variants),
120+ SPINAND_HAS_QE_BIT,
121+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
122+ gd5fxgq5xexxg_ecc_get_status)),
123+ SPINAND_INFO("GD5F2GQ5UExxH",
124+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x32),
125+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
126+ NAND_ECCREQ(4, 512),
127+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
128+ &write_cache_variants,
129+ &update_cache_variants),
130+ SPINAND_HAS_QE_BIT,
131+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
132+ gd5fxgq5xexxg_ecc_get_status)),
133+ SPINAND_INFO("GD5F4GQ6UExxH",
134+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x32),
135+ NAND_MEMORG(1, 2048, 64, 64, 4096, 80, 1, 1, 1),
136+ NAND_ECCREQ(4, 512),
137+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
138 &write_cache_variants,
139 &update_cache_variants),
140 SPINAND_HAS_QE_BIT,
developer5d148cb2023-06-02 13:08:11 +0800[diff] [blame]141--
1422.34.1
143