blob: 850afe42eb277e4e0c0363f112b34fba568735db [file] [log] [blame]
developer8cb3ac72022-07-04 10:55:14 +08001From a59cb5c770a694cb34ab179ec59e91ba5c39908b Mon Sep 17 00:00:00 2001
2From: Bo Jiao <Bo.Jiao@mediatek.com>
3Date: Mon, 27 Jun 2022 14:48:35 +0800
4Subject: [PATCH 6/8] 9995-flow-offload-add-mkhnat-dual-ppe-new-v2
5
6---
7 arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 1 +
8 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 67 ++++++++++++++-----
9 drivers/net/ethernet/mediatek/mtk_eth_soc.h | 10 ++-
10 drivers/net/ethernet/mediatek/mtk_ppe.c | 5 +-
11 drivers/net/ethernet/mediatek/mtk_ppe.h | 7 +-
12 .../net/ethernet/mediatek/mtk_ppe_debugfs.c | 27 ++++++--
13 .../net/ethernet/mediatek/mtk_ppe_offload.c | 45 ++++++++++---
14 include/linux/netdevice.h | 4 ++
15 8 files changed, 125 insertions(+), 41 deletions(-)
16 mode change 100644 => 100755 drivers/net/ethernet/mediatek/mtk_ppe_offload.c
17
18diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
19index 7f78de6b9..381136c21 100644
20--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
21+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
22@@ -479,6 +479,7 @@
23 mediatek,ethsys = <&ethsys>;
24 mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
25 mediatek,wed = <&wed0>, <&wed1>;
26+ mtketh-ppe-num = <2>;
27 #reset-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
30diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
31index 01fc1e5c0..3f67bebfe 100644
32--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
33+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
developerdca0fde2022-12-14 11:40:35 +080034@@ -1732,6 +1732,7 @@ static int mtk_poll_rx(struct napi_struc
developer8cb3ac72022-07-04 10:55:14 +080035 u8 *data, *new_data;
developerdca0fde2022-12-14 11:40:35 +080036 struct mtk_rx_dma_v2 *rxd, trxd;
developer8cb3ac72022-07-04 10:55:14 +080037 int done = 0;
38+ int i;
39
40 if (unlikely(!ring))
41 goto rx_done;
developerdca0fde2022-12-14 11:40:35 +080042@@ -1843,14 +1844,20 @@ static int mtk_poll_rx(struct napi_struc
developer8cb3ac72022-07-04 10:55:14 +080043
44 #if defined(CONFIG_MEDIATEK_NETSYS_V2)
45 reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON_V2, trxd.rxd5);
46- if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)
47- mtk_ppe_check_skb(eth->ppe, skb,
48- trxd.rxd5 & MTK_RXD5_FOE_ENTRY_V2);
49+ if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED) {
50+ for (i = 0; i < eth->ppe_num; i++) {
51+ mtk_ppe_check_skb(eth->ppe[i], skb,
52+ trxd.rxd5 & MTK_RXD5_FOE_ENTRY_V2);
53+ }
54+ }
55 #else
56 reason = FIELD_GET(MTK_RXD4_PPE_CPU_REASON, trxd.rxd4);
57- if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)
58- mtk_ppe_check_skb(eth->ppe, skb,
59- trxd.rxd4 & MTK_RXD4_FOE_ENTRY);
60+ if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED) {
61+ for (i = 0; i < eth->ppe_num; i++) {
62+ mtk_ppe_check_skb(eth->ppe[i], skb,
63+ trxd.rxd4 & MTK_RXD4_FOE_ENTRY);
64+ }
65+ }
66 #endif
67
68 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
developerdca0fde2022-12-14 11:40:35 +080069@@ -3184,8 +3191,12 @@ static int mtk_open(struct net_device *d
70 if (!phy_node && eth->xgmii->regmap_sgmii[mac->id])
71 regmap_write(eth->xgmii->regmap_sgmii[mac->id], SGMSYS_QPHY_PWR_STATE_CTRL, 0);
developer8cb3ac72022-07-04 10:55:14 +080072
developerdca0fde2022-12-14 11:40:35 +080073- if (eth->soc->offload_version && mtk_ppe_start(&eth->ppe) == 0)
developer8cb3ac72022-07-04 10:55:14 +080074- gdm_config = MTK_GDMA_TO_PPE;
developerdca0fde2022-12-14 11:40:35 +080075+ if (eth->soc->offload_version) {
developer8cb3ac72022-07-04 10:55:14 +080076+ gdm_config = MTK_GDMA_TO_PPE0;
77+
78+ for (i = 0; i < eth->ppe_num; i++)
79+ mtk_ppe_start(eth->ppe[i]);
80+ }
81
developerdca0fde2022-12-14 11:40:35 +080082 mtk_gdm_config(eth, mac->id, gdm_config);
developer8cb3ac72022-07-04 10:55:14 +080083
developerdca0fde2022-12-14 11:40:35 +080084@@ -3268,8 +3279,10 @@ static int mtk_stop(struct net_device *d
developer8cb3ac72022-07-04 10:55:14 +080085
86 mtk_dma_free(eth);
87
88- if (eth->soc->offload_version)
89- mtk_ppe_stop(eth->ppe);
90+ if (eth->soc->offload_version) {
91+ for (i = 0; i < eth->ppe_num; i++)
92+ mtk_ppe_stop(eth->ppe[i]);
93+ }
94
95 return 0;
96 }
developerdca0fde2022-12-14 11:40:35 +080097@@ -4408,15 +4421,35 @@ static int mtk_probe(struct platform_dev
developer8cb3ac72022-07-04 10:55:14 +080098 }
99
100 if (eth->soc->offload_version) {
101- eth->ppe = mtk_ppe_init(eth, eth->base + MTK_ETH_PPE_BASE, 2);
102- if (!eth->ppe) {
103- err = -ENOMEM;
104- goto err_free_dev;
105+ unsigned int val;
106+
107+ err = of_property_read_u32_index(pdev->dev.of_node, "mtketh-ppe-num", 0, &val);
108+ if (err < 0)
109+ eth->ppe_num = 1;
110+ else
111+ eth->ppe_num = val;
112+
113+ if (eth->ppe_num > MTK_MAX_PPE_NUM) {
114+ dev_warn(&pdev->dev, "%d is not a valid ppe num, please check mtketh-ppe-num in dts !", eth->ppe_num);
115+ eth->ppe_num = MTK_MAX_PPE_NUM;
116 }
117
118- err = mtk_eth_offload_init(eth);
119- if (err)
120- goto err_free_dev;
121+ dev_info(&pdev->dev, "ppe num = %d\n", eth->ppe_num);
122+
123+ for (i = 0; i < eth->ppe_num; i++) {
124+ eth->ppe[i] = mtk_ppe_init(eth,
125+ eth->base + MTK_ETH_PPE_BASE + i * 0x400, 2, i);
126+ if (!eth->ppe[i]) {
127+ err = -ENOMEM;
128+ goto err_free_dev;
129+ }
130+
131+ err = mtk_eth_offload_init(eth, i);
132+ if (err)
133+ goto err_free_dev;
134+ }
135+
136+ mtk_ppe_debugfs_init(eth);
137 }
138
139 for (i = 0; i < MTK_MAX_DEVS; i++) {
140diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
141index fce1a7172..b4de7c0c6 100644
142--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
143+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
developerdca0fde2022-12-14 11:40:35 +0800144@@ -118,7 +118,12 @@
developer8cb3ac72022-07-04 10:55:14 +0800145 #define MTK_GDMA_UCS_EN BIT(20)
developerdca0fde2022-12-14 11:40:35 +0800146 #define MTK_GDMA_STRP_CRC BIT(16)
developer8cb3ac72022-07-04 10:55:14 +0800147 #define MTK_GDMA_TO_PDMA 0x0
148-#define MTK_GDMA_TO_PPE 0x3333
developer57382532022-07-06 11:59:11 +0800149+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
developer8cb3ac72022-07-04 10:55:14 +0800150+#define MTK_GDMA_TO_PPE0 0x3333
151+#define MTK_GDMA_TO_PPE1 0x4444
developer57382532022-07-06 11:59:11 +0800152+#else
153+#define MTK_GDMA_TO_PPE0 0x4444
154+#endif
developer8cb3ac72022-07-04 10:55:14 +0800155 #define MTK_GDMA_DROP_ALL 0x7777
156
developerdca0fde2022-12-14 11:40:35 +0800157 /* GDM Egress Control Register */
158@@ -1612,7 +1617,8 @@ struct mtk_eth {
developer8cb3ac72022-07-04 10:55:14 +0800159 spinlock_t syscfg0_lock;
160 struct timer_list mtk_dma_monitor_timer;
161
162- struct mtk_ppe *ppe;
163+ u8 ppe_num;
164+ struct mtk_ppe *ppe[MTK_MAX_PPE_NUM];
165 struct rhashtable flow_table;
166 };
167
developer1fb19c92023-03-07 23:45:23 +0800168@@ -1668,8 +1674,10 @@ int mtk_gmac_usxgmii_path_setup(struct m
169 void mtk_usxgmii_reset(struct mtk_xgmii *ss, int mac_id);
170 int mtk_dump_usxgmii(struct regmap *pmap, char *name, u32 offset, u32 range);
developer8cb3ac72022-07-04 10:55:14 +0800171
172-int mtk_eth_offload_init(struct mtk_eth *eth);
173+int mtk_eth_offload_init(struct mtk_eth *eth, int id);
174 int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type,
175 void *type_data);
176 void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev);
developer8cb3ac72022-07-04 10:55:14 +0800177+
developer1fb19c92023-03-07 23:45:23 +0800178+int mtk_ppe_debugfs_init(struct mtk_eth *eth);
179 #endif /* MTK_ETH_H */
developer8cb3ac72022-07-04 10:55:14 +0800180diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.c b/drivers/net/ethernet/mediatek/mtk_ppe.c
181index d46e91178..3d6ff30ba 100755
182--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
183+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
184@@ -677,7 +677,7 @@ int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry)
185 }
186
187 struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base,
188- int version)
189+ int version, int id)
190 {
191 struct device *dev = eth->dev;
192 struct mtk_foe_entry *foe;
193@@ -696,6 +696,7 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base,
194 ppe->eth = eth;
195 ppe->dev = dev;
196 ppe->version = version;
197+ ppe->id = id;
198
199 foe = dmam_alloc_coherent(ppe->dev, MTK_PPE_ENTRIES * sizeof(*foe),
200 &ppe->foe_phys, GFP_KERNEL);
201@@ -704,8 +705,6 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base,
202
203 ppe->foe_table = foe;
204
205- mtk_ppe_debugfs_init(ppe);
206-
207 return ppe;
208 }
209
210diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.h b/drivers/net/ethernet/mediatek/mtk_ppe.h
211index a76f4b0ac..21cc55145 100644
212--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
213+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
developer7c939fe2022-08-22 13:16:56 +0800214@@ -8,10 +8,12 @@
developer8cb3ac72022-07-04 10:55:14 +0800215 #include <linux/bitfield.h>
216 #include <linux/rhashtable.h>
217
developer7c939fe2022-08-22 13:16:56 +0800218 #if defined(CONFIG_MEDIATEK_NETSYS_V2)
developer8cb3ac72022-07-04 10:55:14 +0800219+#define MTK_MAX_PPE_NUM 2
developer8cb3ac72022-07-04 10:55:14 +0800220 #define MTK_ETH_PPE_BASE 0x2000
developer7c939fe2022-08-22 13:16:56 +0800221 #else
222+#define MTK_MAX_PPE_NUM 1
223 #define MTK_ETH_PPE_BASE 0xc00
224 #endif
developer8cb3ac72022-07-04 10:55:14 +0800225
226 #define MTK_PPE_ENTRIES_SHIFT 3
227@@ -253,6 +255,7 @@ struct mtk_flow_entry {
228 };
229 };
230 u8 type;
231+ s8 ppe_index;
232 s8 wed_index;
233 u16 hash;
234 union {
235@@ -272,6 +275,7 @@ struct mtk_ppe {
236 struct device *dev;
237 void __iomem *base;
238 int version;
239+ int id;
240
241 struct mtk_foe_entry *foe_table;
242 dma_addr_t foe_phys;
243@@ -284,7 +288,7 @@ struct mtk_ppe {
244 void *acct_table;
245 };
246
247-struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base, int version);
248+struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base, int version, int id);
249 int mtk_ppe_start(struct mtk_ppe *ppe);
250 int mtk_ppe_stop(struct mtk_ppe *ppe);
251
252@@ -335,6 +339,5 @@ int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq,
253 int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
254 void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
255 int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
256-int mtk_ppe_debugfs_init(struct mtk_ppe *ppe);
257
258 #endif
259diff --git a/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c b/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c
260index a591ab1fd..f4ebe5944 100644
261--- a/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c
262+++ b/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c
263@@ -73,9 +73,8 @@ mtk_print_addr_info(struct seq_file *m, struct mtk_flow_addr_info *ai)
264 }
265
266 static int
267-mtk_ppe_debugfs_foe_show(struct seq_file *m, void *private, bool bind)
268+mtk_ppe_debugfs_foe_show(struct seq_file *m, struct mtk_ppe *ppe, bool bind)
269 {
270- struct mtk_ppe *ppe = m->private;
271 int i;
272
273 for (i = 0; i < MTK_PPE_ENTRIES; i++) {
274@@ -122,6 +121,8 @@ mtk_ppe_debugfs_foe_show(struct seq_file *m, void *private, bool bind)
275 break;
276 }
277
278+ seq_printf(m, " ppe=%d", ppe->id);
279+
280 seq_printf(m, " orig=");
281 mtk_print_addr_info(m, &ai);
282
283@@ -164,13 +165,25 @@ mtk_ppe_debugfs_foe_show(struct seq_file *m, void *private, bool bind)
284 static int
285 mtk_ppe_debugfs_foe_show_all(struct seq_file *m, void *private)
286 {
287- return mtk_ppe_debugfs_foe_show(m, private, false);
288+ struct mtk_eth *eth = m->private;
289+ int i;
290+
291+ for (i = 0; i < eth->ppe_num; i++)
292+ mtk_ppe_debugfs_foe_show(m, eth->ppe[i], false);
293+
294+ return 0;
295 }
296
297 static int
298 mtk_ppe_debugfs_foe_show_bind(struct seq_file *m, void *private)
299 {
300- return mtk_ppe_debugfs_foe_show(m, private, true);
301+ struct mtk_eth *eth = m->private;
302+ int i;
303+
304+ for (i = 0; i < eth->ppe_num; i++)
305+ mtk_ppe_debugfs_foe_show(m, eth->ppe[i], true);
306+
307+ return 0;
308 }
309
310 static int
311@@ -187,7 +200,7 @@ mtk_ppe_debugfs_foe_open_bind(struct inode *inode, struct file *file)
312 inode->i_private);
313 }
314
315-int mtk_ppe_debugfs_init(struct mtk_ppe *ppe)
316+int mtk_ppe_debugfs_init(struct mtk_eth *eth)
317 {
318 static const struct file_operations fops_all = {
319 .open = mtk_ppe_debugfs_foe_open_all,
320@@ -209,8 +222,8 @@ int mtk_ppe_debugfs_init(struct mtk_ppe *ppe)
321 if (!root)
322 return -ENOMEM;
323
324- debugfs_create_file("entries", S_IRUGO, root, ppe, &fops_all);
325- debugfs_create_file("bind", S_IRUGO, root, ppe, &fops_bind);
326+ debugfs_create_file("entries", S_IRUGO, root, eth, &fops_all);
327+ debugfs_create_file("bind", S_IRUGO, root, eth, &fops_bind);
328
329 return 0;
330 }
331diff --git a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
332old mode 100644
333new mode 100755
334index 5a4201447..2f7d76d3b
335--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
336+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
337@@ -226,8 +226,10 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f)
338 struct flow_action_entry *act;
339 struct mtk_flow_data data = {};
340 struct mtk_foe_entry foe;
341- struct net_device *odev = NULL;
342+ struct net_device *idev = NULL, *odev = NULL;
343 struct mtk_flow_entry *entry;
344+ struct net_device_path_ctx ctx = {};
345+ struct net_device_path path = {};
346 int offload_type = 0;
347 int wed_index = -1;
348 u16 addr_type = 0;
349@@ -242,6 +244,10 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f)
350 struct flow_match_meta match;
351
352 flow_rule_match_meta(rule, &match);
353+ idev = __dev_get_by_index(&init_net, match.key->ingress_ifindex);
354+
355+ if (!idev)
356+ pr_info("[%s] idev doesn't exist !\n", __func__);
357 } else {
358 return -EOPNOTSUPP;
359 }
developer7c939fe2022-08-22 13:16:56 +0800360@@ -435,11 +441,27 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f)
developer8cb3ac72022-07-04 10:55:14 +0800361 if (!entry)
362 return -ENOMEM;
363
364+ i = 0;
developer7c939fe2022-08-22 13:16:56 +0800365+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
developer8cb3ac72022-07-04 10:55:14 +0800366+ if (idev && idev->netdev_ops->ndo_fill_receive_path) {
367+ ctx.dev = idev;
368+ idev->netdev_ops->ndo_fill_receive_path(&ctx, &path);
369+ i = path.mtk_wdma.wdma_idx;
370+ if (i >= eth->ppe_num) {
371+ if (printk_ratelimit())
372+ pr_info("[%s] PPE%d doesn't exist, please check mtketh-ppe-num in dts !\n", __func__, i);
373+
374+ return -EINVAL;
375+ }
376+ }
developer7c939fe2022-08-22 13:16:56 +0800377+#endif
developer8cb3ac72022-07-04 10:55:14 +0800378+
379 entry->cookie = f->cookie;
380 memcpy(&entry->data, &foe, sizeof(entry->data));
381+ entry->ppe_index = i;
382 entry->wed_index = wed_index;
383
384- if (mtk_foe_entry_commit(eth->ppe, entry) < 0)
385+ if (mtk_foe_entry_commit(eth->ppe[i], entry) < 0)
386 goto free;
387
388 err = rhashtable_insert_fast(&eth->flow_table, &entry->node,
389@@ -450,7 +470,7 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f)
390 return 0;
391
392 clear:
393- mtk_foe_entry_clear(eth->ppe, entry);
394+ mtk_foe_entry_clear(eth->ppe[i], entry);
395 free:
396 kfree(entry);
397 if (wed_index >= 0)
398@@ -462,13 +482,15 @@ static int
399 mtk_flow_offload_destroy(struct mtk_eth *eth, struct flow_cls_offload *f)
400 {
401 struct mtk_flow_entry *entry;
402+ int i;
403
404 entry = rhashtable_lookup(&eth->flow_table, &f->cookie,
405 mtk_flow_ht_params);
406 if (!entry)
407 return -ENOENT;
408
409- mtk_foe_entry_clear(eth->ppe, entry);
410+ i = entry->ppe_index;
411+ mtk_foe_entry_clear(eth->ppe[i], entry);
412 rhashtable_remove_fast(&eth->flow_table, &entry->node,
413 mtk_flow_ht_params);
414 if (entry->wed_index >= 0)
415@@ -483,13 +505,15 @@ mtk_flow_offload_stats(struct mtk_eth *eth, struct flow_cls_offload *f)
416 {
417 struct mtk_flow_entry *entry;
418 u32 idle;
419+ int i;
420
421 entry = rhashtable_lookup(&eth->flow_table, &f->cookie,
422 mtk_flow_ht_params);
423 if (!entry)
424 return -ENOENT;
425
426- idle = mtk_foe_entry_idle_time(eth->ppe, entry);
427+ i = entry->ppe_index;
428+ idle = mtk_foe_entry_idle_time(eth->ppe[i], entry);
429 f->stats.lastused = jiffies - idle * HZ;
430
431 return 0;
developer207b39d2022-10-07 15:57:16 +0800432@@ -540,12 +564,14 @@ mtk_eth_setup_tc_block(struct net_device *dev, struct flow_block_offload *f)
developer8cb3ac72022-07-04 10:55:14 +0800433 static LIST_HEAD(block_cb_list);
434 struct flow_block_cb *block_cb;
435 flow_setup_cb_t *cb;
developer207b39d2022-10-07 15:57:16 +0800436- int err = 0;
437+ int i, err = 0;
438
439 flowtable = container_of(f->block, struct nf_flowtable, flow_block);
developer8cb3ac72022-07-04 10:55:14 +0800440
441- if (!eth->ppe || !eth->ppe->foe_table)
442- return -EOPNOTSUPP;
443+ for (i = 0; i < eth->ppe_num; i++) {
444+ if (!eth->ppe[i] || !eth->ppe[i]->foe_table)
445+ return -EOPNOTSUPP;
446+ }
447
448 if (f->binder_type != FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
449 return -EOPNOTSUPP;
450@@ -591,9 +618,9 @@ int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type,
451 }
452 }
453
454-int mtk_eth_offload_init(struct mtk_eth *eth)
455+int mtk_eth_offload_init(struct mtk_eth *eth, int id)
456 {
457- if (!eth->ppe || !eth->ppe->foe_table)
458+ if (!eth->ppe[id] || !eth->ppe[id]->foe_table)
459 return 0;
460
461 return rhashtable_init(&eth->flow_table, &mtk_flow_ht_params);
462diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
463index 35998b1a7..0ada2461b 100644
464--- a/include/linux/netdevice.h
465+++ b/include/linux/netdevice.h
466@@ -1302,6 +1302,8 @@ struct tlsdev_ops;
467 * rtnl_lock is not held.
468 * int (*ndo_fill_forward_path)(struct net_device_path_ctx *ctx, struct net_device_path *path);
469 * Get the forwarding path to reach the real device from the HW destination address
470+ * int (*ndo_fill_receive_path)(struct net_device_path_ctx *ctx, struct net_device_path *path);
471+ * Get the receiving path to reach the real device from the HW source address
472 */
473 struct net_device_ops {
474 int (*ndo_init)(struct net_device *dev);
475@@ -1501,6 +1503,8 @@ struct net_device_ops {
476 struct devlink_port * (*ndo_get_devlink_port)(struct net_device *dev);
477 int (*ndo_fill_forward_path)(struct net_device_path_ctx *ctx,
478 struct net_device_path *path);
479+ int (*ndo_fill_receive_path)(struct net_device_path_ctx *ctx,
480+ struct net_device_path *path);
481 };
482
483 /**
484--
4852.18.0
486