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git01.mediatek.com / openwrt / feeds / mtk-openwrt-feeds / 1346ce50c939930a4ae6056ae7fb462e513c0a52 / . / autobuild_mac80211_release / package / kernel / mt76 / patches / 1116-mt76-testmode-add-iBF-eBF-cal-and-cert-commands-with.patch
blob: db7105329fbe985b3a314e0168568d984cd0f625 [file] [log] [blame]
developer1346ce52022-12-15 21:36:14 +0800[diff] [blame^]1From e2c7b902b076265245b45e60d9554a6ec9432e28 Mon Sep 17 00:00:00 2001
2From: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
3Date: Thu, 15 Dec 2022 19:45:18 +0800
4Subject: [PATCH 1116/1131] mt76: testmode: add iBF/eBF cal and cert commands
5 with golden
6
7Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
8---
9 mt76.h | 4 +
10 mt76_connac_mcu.c | 3 +
11 mt7915/mac.c | 4 +-
12 mt7915/main.c | 54 ++---
13 mt7915/mcu.c | 29 ++-
14 mt7915/mcu.h | 172 ++++++++++++++++
15 mt7915/mmio.c | 2 +
16 mt7915/mt7915.h | 14 +-
17 mt7915/mtk_debugfs.c | 35 ++++
18 mt7915/mtk_mcu.c | 246 ++++++++++++++++++++++-
19 mt7915/regs.h | 4 +
20 mt7915/testmode.c | 458 ++++++++++++++++++++++++++++---------------
21 mt7915/testmode.h | 134 +------------
22 testmode.c | 1 +
23 testmode.h | 9 +
24 tools/fields.c | 9 +
25 16 files changed, 855 insertions(+), 323 deletions(-)
26
27diff --git a/mt76.h b/mt76.h
28index 2bacc1b..c6aefbf 100644
29--- a/mt76.h
30+++ b/mt76.h
31@@ -681,6 +681,7 @@ struct mt76_testmode_data {
32
33 struct list_head tm_entry_list;
34 struct mt76_wcid *cur_entry;
35+ struct ieee80211_vif *second_vif;
36 u8 entry_num;
37 union {
38 struct mt76_testmode_entry_data ed;
39@@ -709,6 +710,9 @@ struct mt76_testmode_data {
40
41 u8 txbf_act;
42 u16 txbf_param[8];
43+ bool is_txbf_dut;
44+ bool bf_en;
45+ bool ebf;
46
47 u32 tx_pending;
48 u32 tx_queued;
49diff --git a/mt76_connac_mcu.c b/mt76_connac_mcu.c
50index 291a7c1..14ce09e 100644
51--- a/mt76_connac_mcu.c
52+++ b/mt76_connac_mcu.c
53@@ -2756,6 +2756,7 @@ int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb,
54 u32 type = vif->p2p ? NETWORK_P2P : NETWORK_INFRA;
55 struct bss_info_basic *bss;
56 struct tlv *tlv;
57+ struct mt76_testmode_data *td = &phy->test;
58
59 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss));
60 bss = (struct bss_info_basic *)tlv;
61@@ -2815,6 +2816,8 @@ int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb,
62 bss->dtim_period = vif->bss_conf.dtim_period;
63 bss->phy_mode = mt76_connac_get_phy_mode(phy, vif,
64 chandef->chan->band, NULL);
65+ } else if (td->bf_en) {
66+ memcpy(bss->bssid, vif->addr, ETH_ALEN);
67 } else {
68 memcpy(bss->bssid, phy->macaddr, ETH_ALEN);
69 }
70diff --git a/mt7915/mac.c b/mt7915/mac.c
71index 0746e4b..013dfbd 100644
72--- a/mt7915/mac.c
73+++ b/mt7915/mac.c
74@@ -753,8 +753,10 @@ mt7915_mac_write_txwi_tm(struct mt7915_phy *phy, __le32 *txwi,
75 val |= MT_TXD6_LDPC;
76
77 txwi[3] &= ~cpu_to_le32(MT_TXD3_SN_VALID);
78- if (phy->test.bf_en)
79+ if (td->bf_en && !td->ebf)
80 val |= MT_TXD6_TX_IBF | MT_TXD6_TX_EBF;
81+ else if (td->bf_en && td->ebf)
82+ val |= MT_TXD6_TX_EBF;
83
84 txwi[6] |= cpu_to_le32(val);
85 #endif
86diff --git a/mt7915/main.c b/mt7915/main.c
87index 4c3d822..a347e77 100644
88--- a/mt7915/main.c
89+++ b/mt7915/main.c
90@@ -205,46 +205,37 @@ static void mt7915_init_bitrate_mask(struct ieee80211_vif *vif)
91 }
92 }
93
94-static int mt7915_add_interface(struct ieee80211_hw *hw,
95- struct ieee80211_vif *vif)
96+int mt7915_init_vif(struct mt7915_phy *phy, struct ieee80211_vif *vif, bool bf_en)
97 {
98 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
99- struct mt7915_dev *dev = mt7915_hw_dev(hw);
100- struct mt7915_phy *phy = mt7915_hw_phy(hw);
101+ struct mt7915_dev *dev = phy->dev;
102 struct mt76_txq *mtxq;
103 bool ext_phy = phy != &dev->phy;
104 int idx, ret = 0;
105
106- mutex_lock(&dev->mt76.mutex);
107-
108- mt76_testmode_reset(phy->mt76, true);
109-
110- if (vif->type == NL80211_IFTYPE_MONITOR &&
111- is_zero_ether_addr(vif->addr))
112- phy->monitor_vif = vif;
113+ /* To differentiate the mac address of TXD and TXCMD interface */
114+ vif->addr[0] |= bf_en;
115
116 mvif->mt76.idx = __ffs64(~dev->mt76.vif_mask);
117- if (mvif->mt76.idx >= (MT7915_MAX_INTERFACES << dev->dbdc_support)) {
118- ret = -ENOSPC;
119- goto out;
120- }
121+ if (mvif->mt76.idx >= (MT7915_MAX_INTERFACES << dev->dbdc_support))
122+ return -ENOSPC;
123
124 idx = get_omac_idx(vif->type, phy->omac_mask);
125- if (idx < 0) {
126- ret = -ENOSPC;
127- goto out;
128- }
129+ if (idx < 0)
130+ return -ENOSPC;
131+
132 mvif->mt76.omac_idx = idx;
133 mvif->phy = phy;
134 mvif->mt76.band_idx = phy->mt76->band_idx;
135
136- mvif->mt76.wmm_idx = (vif->type != NL80211_IFTYPE_AP && vif->type != NL80211_IFTYPE_MONITOR);
137+ mvif->mt76.wmm_idx = (vif->type != NL80211_IFTYPE_AP &&
138+ vif->type != NL80211_IFTYPE_MONITOR) || bf_en;
139 if (ext_phy)
140 mvif->mt76.wmm_idx += 2;
141
142 ret = mt7915_mcu_add_dev_info(phy, vif, true);
143 if (ret)
144- goto out;
145+ return ret;
146
147 dev->mt76.vif_mask |= BIT_ULL(mvif->mt76.idx);
148 phy->omac_mask |= BIT_ULL(mvif->mt76.omac_idx);
149@@ -279,7 +270,26 @@ static int mt7915_add_interface(struct ieee80211_hw *hw,
150 mt7915_mcu_add_sta(dev, vif, NULL, true);
151 rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid);
152
153-out:
154+ return ret;
155+}
156+
157+static int mt7915_add_interface(struct ieee80211_hw *hw,
158+ struct ieee80211_vif *vif)
159+{
160+ struct mt7915_dev *dev = mt7915_hw_dev(hw);
161+ struct mt7915_phy *phy = mt7915_hw_phy(hw);
162+ int ret = 0;
163+
164+ mutex_lock(&dev->mt76.mutex);
165+
166+ mt76_testmode_reset(phy->mt76, true);
167+
168+ if (vif->type == NL80211_IFTYPE_MONITOR &&
169+ is_zero_ether_addr(vif->addr))
170+ phy->monitor_vif = vif;
171+
172+ ret = mt7915_init_vif(phy, vif, false);
173+
174 mutex_unlock(&dev->mt76.mutex);
175
176 return ret;
177diff --git a/mt7915/mcu.c b/mt7915/mcu.c
178index b8243e1..5d41ebf 100644
179--- a/mt7915/mcu.c
180+++ b/mt7915/mcu.c
181@@ -193,6 +193,7 @@ mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
182 int ret;
183
184 ret = mt76_connac2_mcu_fill_message(mdev, skb, cmd, wait_seq);
185+
186 if (ret)
187 return ret;
188
189@@ -383,10 +384,12 @@ mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb)
190 case MCU_EXT_EVENT_BCC_NOTIFY:
191 mt7915_mcu_rx_bcc_notify(dev, skb);
192 break;
193-#ifdef CONFIG_NL80211_TESTMODE
194+#if defined CONFIG_NL80211_TESTMODE || defined MTK_DEBUG
195 case MCU_EXT_EVENT_BF_STATUS_READ:
196- mt7915_tm_txbf_status_read(dev, skb);
197+ mt7915_mcu_txbf_status_read(dev, skb);
198 break;
199+#endif
200+#ifdef CONFIG_NL80211_TESTMODE
201 case MCU_EXT_EVENT_RF_TEST:
202 mt7915_tm_rf_test_event(dev, skb);
203 break;
204@@ -673,11 +676,22 @@ int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
205 if (enable)
206 mt76_connac_mcu_bss_omac_tlv(skb, vif);
207
208- mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76,
209- mvif->sta.wcid.idx, enable);
210+ if (vif->type == NL80211_IFTYPE_MONITOR) {
211+ struct mt76_testmode_data *td = &phy->mt76->test;
212+ struct mt76_wcid *wcid;
213+
214+ if (!td->aid || list_empty(&td->tm_entry_list))
215+ wcid = &mvif->sta.wcid;
216+ else
217+ wcid = list_first_entry(&td->tm_entry_list, struct mt76_wcid, list);
218
219- if (vif->type == NL80211_IFTYPE_MONITOR)
220+ mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76,
221+ wcid->idx, enable);
222 goto out;
223+ }
224+
225+ mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76,
226+ mvif->sta.wcid.idx, enable);
227
228 if (enable) {
229 mt7915_mcu_bss_rfch_tlv(skb, vif, phy);
230@@ -3403,6 +3417,7 @@ int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band)
231
232 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action)
233 {
234+#define MT_BF_PROCESSING 4
235 struct {
236 u8 action;
237 union {
238@@ -3429,7 +3444,6 @@ int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action)
239 .action = action,
240 };
241
242-#define MT_BF_PROCESSING 4
243 switch (action) {
244 case MT_BF_SOUNDING_ON:
245 req.snd.snd_mode = MT_BF_PROCESSING;
246@@ -4347,6 +4361,9 @@ int mt7915_mcu_set_txbf_sound_info(struct mt7915_phy *phy, u8 action,
247 req.he_opt = v2;
248 req.glo_opt = v3;
249 break;
250+ case BF_SND_CFG_INF:
251+ req.inf = v1;
252+ break;
253 default:
254 return -EINVAL;
255 }
256diff --git a/mt7915/mcu.h b/mt7915/mcu.h
257index 9a48524..a30f52d 100644
258--- a/mt7915/mcu.h
259+++ b/mt7915/mcu.h
260@@ -475,10 +475,12 @@ enum {
261 };
262
263 enum {
264+ MT_BF_SOUNDING_OFF = 0,
265 MT_BF_SOUNDING_ON = 1,
266 MT_BF_DATA_PACKET_APPLY = 2,
267 MT_BF_PFMU_TAG_READ = 5,
268 MT_BF_PFMU_TAG_WRITE = 6,
269+ MT_BF_STA_REC_READ = 13,
270 MT_BF_PHASE_CAL = 14,
271 MT_BF_IBF_PHASE_COMP = 15,
272 MT_BF_PROFILE_WRITE_ALL = 17,
273@@ -486,6 +488,176 @@ enum {
274 MT_BF_MODULE_UPDATE = 25
275 };
276
277+#if defined CONFIG_NL80211_TESTMODE || defined MTK_DEBUG
278+struct mt7915_pfmu_tag1 {
279+ __le32 pfmu_idx:10;
280+ __le32 ebf:1;
281+ __le32 data_bw:2;
282+ __le32 lm:2;
283+ __le32 is_mu:1;
284+ __le32 nr:3, nc:3;
285+ __le32 codebook:2;
286+ __le32 ngroup:2;
287+ __le32 _rsv:2;
288+ __le32 invalid_prof:1;
289+ __le32 rmsd:3;
290+
291+ __le32 col_id1:6, row_id1:10;
292+ __le32 col_id2:6, row_id2:10;
293+ __le32 col_id3:6, row_id3:10;
294+ __le32 col_id4:6, row_id4:10;
295+
296+ __le32 ru_start_id:7;
297+ __le32 _rsv1:1;
298+ __le32 ru_end_id:7;
299+ __le32 _rsv2:1;
300+ __le32 mob_cal_en:1;
301+ __le32 _rsv3:15;
302+
303+ __le32 snr_sts0:8, snr_sts1:8, snr_sts2:8, snr_sts3:8;
304+ __le32 snr_sts4:8, snr_sts5:8, snr_sts6:8, snr_sts7:8;
305+
306+ __le32 _rsv4;
307+} __packed;
308+
309+struct mt7915_pfmu_tag2 {
310+ __le32 smart_ant:24;
311+ __le32 se_idx:5;
312+ __le32 _rsv:3;
313+
314+ __le32 _rsv1:8;
315+ __le32 rmsd_thres:3;
316+ __le32 _rsv2:5;
317+ __le32 ibf_timeout:8;
318+ __le32 _rsv3:8;
319+
320+ __le32 _rsv4:16;
321+ __le32 ibf_data_bw:2;
322+ __le32 ibf_nc:3;
323+ __le32 ibf_nr:3;
324+ __le32 ibf_ru:8;
325+
326+ __le32 mob_delta_t:8;
327+ __le32 mob_lq_result:7;
328+ __le32 _rsv5:1;
329+ __le32 _rsv6:16;
330+
331+ __le32 _rsv7;
332+} __packed;
333+
334+struct mt7915_pfmu_tag {
335+ struct mt7915_pfmu_tag1 t1;
336+ struct mt7915_pfmu_tag2 t2;
337+};
338+
339+struct mt7915_bf_status_hdr {
340+ u8 format_id;
341+ u8 bw;
342+ u16 subcarrier_idx;
343+ bool bfer;
344+ u8 rsv[3];
345+} __packed;
346+
347+struct mt7915_bf_status {
348+ struct mt7915_bf_status_hdr hdr;
349+ u8 buf[1000];
350+} __packed;
351+
352+struct mt7915_txbf_phase_out {
353+ u8 c0_l;
354+ u8 c1_l;
355+ u8 c2_l;
356+ u8 c3_l;
357+ u8 c0_m;
358+ u8 c1_m;
359+ u8 c2_m;
360+ u8 c3_m;
361+ u8 c0_h;
362+ u8 c1_h;
363+ u8 c2_h;
364+ u8 c3_h;
365+ u8 c0_uh;
366+ u8 c1_uh;
367+ u8 c2_uh;
368+ u8 c3_uh;
369+};
370+
371+struct mt7915_txbf_phase {
372+ u8 status;
373+ struct {
374+ u8 r0_uh;
375+ u8 r0_h;
376+ u8 r0_m;
377+ u8 r0_l;
378+ u8 r0_ul;
379+ u8 r1_uh;
380+ u8 r1_h;
381+ u8 r1_m;
382+ u8 r1_l;
383+ u8 r1_ul;
384+ u8 r2_uh;
385+ u8 r2_h;
386+ u8 r2_m;
387+ u8 r2_l;
388+ u8 r2_ul;
389+ u8 r3_uh;
390+ u8 r3_h;
391+ u8 r3_m;
392+ u8 r3_l;
393+ u8 r3_ul;
394+ u8 r2_uh_sx2;
395+ u8 r2_h_sx2;
396+ u8 r2_m_sx2;
397+ u8 r2_l_sx2;
398+ u8 r2_ul_sx2;
399+ u8 r3_uh_sx2;
400+ u8 r3_h_sx2;
401+ u8 r3_m_sx2;
402+ u8 r3_l_sx2;
403+ u8 r3_ul_sx2;
404+ u8 m_t0_h;
405+ u8 m_t1_h;
406+ u8 m_t2_h;
407+ u8 m_t2_h_sx2;
408+ u8 r0_reserved;
409+ u8 r1_reserved;
410+ u8 r2_reserved;
411+ u8 r3_reserved;
412+ u8 r2_sx2_reserved;
413+ u8 r3_sx2_reserved;
414+ } phase;
415+};
416+
417+struct mt7915_pfmu_data {
418+ __le16 subc_idx;
419+ __le16 phi11;
420+ __le16 phi21;
421+ __le16 phi31;
422+};
423+
424+struct mt7915_ibf_cal_info {
425+ u8 format_id;
426+ u8 group_l_m_n;
427+ u8 group;
428+ bool sx2;
429+ u8 status;
430+ u8 cal_type;
431+ u8 _rsv[2];
432+ u8 buf[1000];
433+} __packed;
434+
435+enum {
436+ IBF_PHASE_CAL_UNSPEC,
437+ IBF_PHASE_CAL_NORMAL,
438+ IBF_PHASE_CAL_VERIFY,
439+ IBF_PHASE_CAL_NORMAL_INSTRUMENT,
440+ IBF_PHASE_CAL_VERIFY_INSTRUMENT,
441+};
442+
443+#define MT7915_TXBF_SUBCAR_NUM 64
444+
445+#endif
446+
447 enum {
448 MURU_SET_ARB_OP_MODE = 14,
449 MURU_SET_PLATFORM_TYPE = 25,
450diff --git a/mt7915/mmio.c b/mt7915/mmio.c
451index 26881fd..c1b421d 100644
452--- a/mt7915/mmio.c
453+++ b/mt7915/mmio.c
454@@ -131,6 +131,7 @@ static const u32 mt7915_offs[] = {
455 [MDP_BNRCFR1] = 0x074,
456 [ARB_DRNGR0] = 0x194,
457 [ARB_SCR] = 0x080,
458+ [ARB_TQSAXM0] = 0x030,
459 [RMAC_MIB_AIRTIME14] = 0x3b8,
460 [AGG_AALCR0] = 0x048,
461 [AGG_AWSCR0] = 0x05c,
462@@ -207,6 +208,7 @@ static const u32 mt7916_offs[] = {
463 [MDP_BNRCFR1] = 0x094,
464 [ARB_DRNGR0] = 0x1e0,
465 [ARB_SCR] = 0x000,
466+ [ARB_TQSAXM0] = 0x180,
467 [RMAC_MIB_AIRTIME14] = 0x0398,
468 [AGG_AALCR0] = 0x028,
469 [AGG_AWSCR0] = 0x030,
470diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
471index d845206..ab1efe6 100644
472--- a/mt7915/mt7915.h
473+++ b/mt7915/mt7915.h
474@@ -322,7 +322,6 @@ struct mt7915_phy {
475
476 u8 spe_idx;
477
478- bool bf_en;
479 bool bf_ever_en;
480 } test;
481 #endif
482@@ -427,7 +426,7 @@ struct mt7915_dev {
483 void __iomem *dcm;
484 void __iomem *sku;
485
486-#ifdef CONFIG_NL80211_TESTMODE
487+#if defined CONFIG_NL80211_TESTMODE || defined MTK_DEBUG
488 struct {
489 void *txbf_phase_cal;
490 void *txbf_pfmu_data;
491@@ -566,6 +565,7 @@ void mt7915_dma_prefetch(struct mt7915_dev *dev);
492 void mt7915_dma_cleanup(struct mt7915_dev *dev);
493 int mt7915_dma_reset(struct mt7915_dev *dev, bool force);
494 int mt7915_txbf_init(struct mt7915_dev *dev);
495+int mt7915_init_vif(struct mt7915_phy *phy, struct ieee80211_vif *vif, bool bf_en);
496 void mt7915_init_txpower(struct mt7915_dev *dev,
497 struct ieee80211_supported_band *sband);
498 void mt7915_reset(struct mt7915_dev *dev);
499@@ -644,8 +644,10 @@ int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl);
500 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level);
501 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb);
502 void mt7915_mcu_exit(struct mt7915_dev *dev);
503-int mt7915_tm_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb);
504+
505+#ifdef CONFIG_NL80211_TESTMODE
506 void mt7915_tm_rf_test_event(struct mt7915_dev *dev, struct sk_buff *skb);
507+#endif
508
509 static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev)
510 {
511@@ -782,4 +784,10 @@ enum {
512
513 #endif
514
515+#if defined CONFIG_NL80211_TESTMODE || defined MTK_DEBUG
516+int mt7915_mcu_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb);
517+int mt7915_mcu_txbf_profile_tag_read(struct mt7915_phy *phy, u8 pfmu_idx, bool bfer);
518+int mt7915_mcu_txbf_sta_rec_read(struct mt7915_dev *dev, u16 wlan_idx);
519+#endif
520+
521 #endif
522diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c
523index 583bc19..a2ceb6f 100644
524--- a/mt7915/mtk_debugfs.c
525+++ b/mt7915/mtk_debugfs.c
526@@ -2831,6 +2831,36 @@ mt7915_txpower_level_set(void *data, u64 val)
527 DEFINE_DEBUGFS_ATTRIBUTE(fops_txpower_level, NULL,
528 mt7915_txpower_level_set, "%lld\n");
529
530+static int
531+mt7915_txbf_pfmu_tag_read(void *data, u64 val)
532+{
533+ struct mt7915_phy *phy = data;
534+ u8 pfmu_idx = (u8)val;
535+
536+ pr_info("%s: %d pfmu_tag cmd sent out ---\n", __func__, __LINE__);
537+ mt7915_mcu_txbf_profile_tag_read(phy, pfmu_idx, true);
538+
539+ return 0;
540+}
541+
542+DEFINE_DEBUGFS_ATTRIBUTE(fops_txbf_pfmu_tag_idx, NULL,
543+ mt7915_txbf_pfmu_tag_read, "%llx\n");
544+
545+static int
546+mt7915_txbf_sta_rec_read(void *data, u64 val)
547+{
548+ struct mt7915_dev *dev = data;
549+ u16 wlan_idx = (u16)val;
550+
551+ pr_info("%s: %d sta_rec cmd sent out ---\n", __func__, __LINE__);
552+ mt7915_mcu_txbf_sta_rec_read(dev, wlan_idx);
553+
554+ return 0;
555+}
556+
557+DEFINE_DEBUGFS_ATTRIBUTE(fops_txbf_sta_rec, NULL,
558+ mt7915_txbf_sta_rec_read, "%llx\n");
559+
560 /* usage: echo 0x[arg3][arg2][arg1] > fw_wa_set */
561 static int
562 mt7915_wa_set(void *data, u64 val)
563@@ -2969,6 +2999,11 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir)
564 debugfs_create_file("txpower_level", 0400, dir, dev,
565 &fops_txpower_level);
566
567+ debugfs_create_file("txbf_pfmu_tag_idx", 0600, dir, phy,
568+ &fops_txbf_pfmu_tag_idx);
569+ debugfs_create_file("txbf_sta_rec", 0600, dir, dev,
570+ &fops_txbf_sta_rec);
571+
572 debugfs_create_u8("sku_disable", 0600, dir, &dev->dbg.sku_disable);
573
574 debugfs_create_devm_seqfile(dev->mt76.dev, "fw_version", dir,
575diff --git a/mt7915/mtk_mcu.c b/mt7915/mtk_mcu.c
576index 143dae2..906c872 100644
577--- a/mt7915/mtk_mcu.c
578+++ b/mt7915/mtk_mcu.c
579@@ -1,9 +1,10 @@
580 #include <linux/firmware.h>
581 #include <linux/fs.h>
582-#include<linux/inet.h>
583+#include <linux/inet.h>
584 #include "mt7915.h"
585 #include "mcu.h"
586 #include "mac.h"
587+#include "testmode.h"
588
589 int mt7915_mcu_set_txpower_level(struct mt7915_phy *phy, u8 drop_level)
590 {
591@@ -49,3 +50,246 @@ int mt7915_mcu_set_txpower_level(struct mt7915_phy *phy, u8 drop_level)
592 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
593 sizeof(req), true);
594 }
595+
596+#if defined CONFIG_NL80211_TESTMODE || defined MTK_DEBUG
597+static void mt7915_txbf_dump_pfmu_tag(struct mt7915_dev *dev, struct mt7915_pfmu_tag *tag)
598+{
599+ u32 *raw_t1 = (u32 *)&tag->t1;
600+ u32 *raw_t2 = (u32 *)&tag->t2;
601+
602+ dev_info(dev->mt76.dev, "=================== TXBf Profile Tag1 Info ==================\n");
603+ dev_info(dev->mt76.dev,
604+ "DW0 = 0x%08x, DW1 = 0x%08x, DW2 = 0x%08x\n",
605+ raw_t1[0], raw_t1[1], raw_t1[2]);
606+ dev_info(dev->mt76.dev,
607+ "DW4 = 0x%08x, DW5 = 0x%08x, DW6 = 0x%08x\n\n",
608+ raw_t1[3], raw_t1[4], raw_t1[5]);
609+ dev_info(dev->mt76.dev, "PFMU ID = %d Invalid status = %d\n",
610+ tag->t1.pfmu_idx, tag->t1.invalid_prof);
611+ dev_info(dev->mt76.dev, "iBf/eBf = %d\n\n", tag->t1.ebf);
612+ dev_info(dev->mt76.dev, "DBW = %d\n", tag->t1.data_bw);
613+ dev_info(dev->mt76.dev, "SU/MU = %d\n", tag->t1.is_mu);
614+ dev_info(dev->mt76.dev, "RMSD = %d\n", tag->t1.rmsd);
615+ dev_info(dev->mt76.dev,
616+ "nrow = %d, ncol = %d, ng = %d, LM = %d, CodeBook = %d MobCalEn = %d\n",
617+ tag->t1.nr, tag->t1.nc, tag->t1.ngroup, tag->t1.lm, tag->t1.codebook,
618+ tag->t1.mob_cal_en);
619+ dev_info(dev->mt76.dev, "RU start = %d, RU end = %d\n",
620+ tag->t1.ru_start_id, tag->t1.ru_end_id);
621+ dev_info(dev->mt76.dev, "Mem Col1 = %d, Mem Row1 = %d, Mem Col2 = %d, Mem Row2 = %d\n",
622+ tag->t1.col_id1, tag->t1.row_id1, tag->t1.col_id2, tag->t1.row_id2);
623+ dev_info(dev->mt76.dev, "Mem Col3 = %d, Mem Row3 = %d, Mem Col4 = %d, Mem Row4 = %d\n\n",
624+ tag->t1.col_id3, tag->t1.row_id3, tag->t1.col_id4, tag->t1.row_id4);
625+ dev_info(dev->mt76.dev,
626+ "STS0_SNR = 0x%02x, STS1_SNR = 0x%02x, STS2_SNR = 0x%02x, STS3_SNR = 0x%02x\n",
627+ tag->t1.snr_sts0, tag->t1.snr_sts1, tag->t1.snr_sts2, tag->t1.snr_sts3);
628+ dev_info(dev->mt76.dev,
629+ "STS4_SNR = 0x%02x, STS5_SNR = 0x%02x, STS6_SNR = 0x%02x, STS7_SNR = 0x%02x\n",
630+ tag->t1.snr_sts4, tag->t1.snr_sts5, tag->t1.snr_sts6, tag->t1.snr_sts7);
631+ dev_info(dev->mt76.dev, "=============================================================\n");
632+
633+ dev_info(dev->mt76.dev, "=================== TXBf Profile Tag2 Info ==================\n");
634+ dev_info(dev->mt76.dev,
635+ "DW0 = 0x%08x, DW1 = 0x%08x, DW2 = 0x%08x\n",
636+ raw_t2[0], raw_t2[1], raw_t2[2]);
637+ dev_info(dev->mt76.dev,
638+ "DW3 = 0x%08x, DW4 = 0x%08x, DW5 = 0x%08x\n\n",
639+ raw_t2[3], raw_t2[4], raw_t2[5]);
640+ dev_info(dev->mt76.dev, "Smart antenna ID = 0x%x, SE index = %d\n",
641+ tag->t2.smart_ant, tag->t2.se_idx);
642+ dev_info(dev->mt76.dev, "RMSD threshold = %d\n", tag->t2.rmsd_thres);
643+ dev_info(dev->mt76.dev, "Timeout = 0x%x\n", tag->t2.ibf_timeout);
644+ dev_info(dev->mt76.dev, "Desired BW = %d, Desired Ncol = %d, Desired Nrow = %d\n",
645+ tag->t2.ibf_data_bw, tag->t2.ibf_nc, tag->t2.ibf_nr);
646+ dev_info(dev->mt76.dev, "Desired RU Allocation = %d\n", tag->t2.ibf_ru);
647+ dev_info(dev->mt76.dev, "Mobility DeltaT = %d, Mobility LQ = %d\n",
648+ tag->t2.mob_delta_t, tag->t2.mob_lq_result);
649+ dev_info(dev->mt76.dev, "=============================================================\n");
650+}
651+
652+static void mt7915_txbf_dump_sta_rec(struct mt7915_dev *dev, struct sta_rec_bf *sta_info)
653+{
654+ dev_info(dev->mt76.dev, "===================== BF Station Record =====================\n");
655+ dev_info(dev->mt76.dev, "pfmu = %d\n", sta_info->pfmu);
656+ dev_info(dev->mt76.dev, "su_mu = %d\n", sta_info->su_mu);
657+ dev_info(dev->mt76.dev, "bf_cap = %d\n", sta_info->bf_cap);
658+ dev_info(dev->mt76.dev, "sounding_phy = %d\n", sta_info->sounding_phy);
659+ dev_info(dev->mt76.dev, "ndpa_rate = %d\n", sta_info->ndpa_rate);
660+ dev_info(dev->mt76.dev, "ndp_rate = %d\n", sta_info->ndp_rate);
661+ dev_info(dev->mt76.dev, "rept_poll_rate = %d\n", sta_info->rept_poll_rate);
662+ dev_info(dev->mt76.dev, "tx_mode = %d\n", sta_info->tx_mode);
663+ dev_info(dev->mt76.dev, "ncol = %d\n", sta_info->ncol);
664+ dev_info(dev->mt76.dev, "nrow = %d\n", sta_info->nrow);
665+ dev_info(dev->mt76.dev, "bw = %d\n", sta_info->bw);
666+ dev_info(dev->mt76.dev, "mem_total = %d\n", sta_info->mem_total);
667+ dev_info(dev->mt76.dev, "mem_20m = %d\n", sta_info->mem_20m);
668+ dev_info(dev->mt76.dev, "mem_row0 = %d\n", sta_info->mem[0].row);
669+ dev_info(dev->mt76.dev, "mem_col0 = %d\n", sta_info->mem[0].col);
670+ dev_info(dev->mt76.dev, "mem_row1 = %d\n", sta_info->mem[1].row);
671+ dev_info(dev->mt76.dev, "mem_col1 = %d\n", sta_info->mem[1].col);
672+ dev_info(dev->mt76.dev, "mem_row2 = %d\n", sta_info->mem[2].row);
673+ dev_info(dev->mt76.dev, "mem_col2 = %d\n", sta_info->mem[2].col);
674+ dev_info(dev->mt76.dev, "mem_row3 = %d\n", sta_info->mem[3].row);
675+ dev_info(dev->mt76.dev, "mem_col3 = %d\n", sta_info->mem[3].col);
676+ dev_info(dev->mt76.dev, "smart_ant = 0x%x\n", sta_info->smart_ant);
677+ dev_info(dev->mt76.dev, "se_idx = %d\n", sta_info->se_idx);
678+ dev_info(dev->mt76.dev, "auto_sounding = %d\n", sta_info->auto_sounding);
679+ dev_info(dev->mt76.dev, "ibf_timeout = 0x%x\n", sta_info->ibf_timeout);
680+ dev_info(dev->mt76.dev, "ibf_dbw = %d\n", sta_info->ibf_dbw);
681+ dev_info(dev->mt76.dev, "ibf_ncol = %d\n", sta_info->ibf_ncol);
682+ dev_info(dev->mt76.dev, "ibf_nrow = %d\n", sta_info->ibf_nrow);
683+ dev_info(dev->mt76.dev, "nrow_gt_bw80 = %d\n", sta_info->nrow_gt_bw80);
684+ dev_info(dev->mt76.dev, "ncol_gt_bw80 = %d\n", sta_info->ncol_gt_bw80);
685+ dev_info(dev->mt76.dev, "ru_start_idx = %d\n", sta_info->ru_start_idx);
686+ dev_info(dev->mt76.dev, "trigger_su = %d\n", sta_info->trigger_su);
687+ dev_info(dev->mt76.dev, "trigger_mu = %d\n", sta_info->trigger_mu);
688+ dev_info(dev->mt76.dev, "ng16_su = %d\n", sta_info->ng16_su);
689+ dev_info(dev->mt76.dev, "ng16_mu = %d\n", sta_info->ng16_mu);
690+ dev_info(dev->mt76.dev, "codebook42_su = %d\n", sta_info->codebook42_su);
691+ dev_info(dev->mt76.dev, "codebook75_mu = %d\n", sta_info->codebook75_mu);
692+ dev_info(dev->mt76.dev, "he_ltf = %d\n", sta_info->he_ltf);
693+ dev_info(dev->mt76.dev, "=============================================================\n");
694+}
695+
696+static void mt7915_txbf_dump_cal_phase(struct mt7915_dev *dev,
697+ struct mt7915_txbf_phase *phase, int group)
698+{
699+ dev_info(dev->mt76.dev, "Group %d and Group M\n", group);
700+ dev_info(dev->mt76.dev, "m_t0_h = %d\n", phase->phase.m_t0_h);
701+ dev_info(dev->mt76.dev, "m_t1_h = %d\n", phase->phase.m_t1_h);
702+ dev_info(dev->mt76.dev, "m_t2_h = %d\n", phase->phase.m_t2_h);
703+
704+ dev_info(dev->mt76.dev, "r0_uh = %d\n", phase->phase.r0_uh);
705+ dev_info(dev->mt76.dev, "r0_h = %d\n", phase->phase.r0_h);
706+ dev_info(dev->mt76.dev, "r0_m = %d\n", phase->phase.r0_m);
707+ dev_info(dev->mt76.dev, "r0_l = %d\n", phase->phase.r0_l);
708+
709+ dev_info(dev->mt76.dev, "r1_uh = %d\n", phase->phase.r1_uh);
710+ dev_info(dev->mt76.dev, "r1_h = %d\n", phase->phase.r1_h);
711+ dev_info(dev->mt76.dev, "r1_m = %d\n", phase->phase.r1_m);
712+ dev_info(dev->mt76.dev, "r1_l = %d\n", phase->phase.r1_l);
713+
714+ dev_info(dev->mt76.dev, "r2_uh = %d\n", phase->phase.r2_uh);
715+ dev_info(dev->mt76.dev, "r2_h = %d\n", phase->phase.r2_h);
716+ dev_info(dev->mt76.dev, "r2_m = %d\n", phase->phase.r2_m);
717+ dev_info(dev->mt76.dev, "r2_l = %d\n", phase->phase.r2_l);
718+
719+ dev_info(dev->mt76.dev, "r3_uh = %d\n", phase->phase.r3_uh);
720+ dev_info(dev->mt76.dev, "r3_h = %d\n", phase->phase.r3_h);
721+ dev_info(dev->mt76.dev, "r3_m = %d\n", phase->phase.r3_m);
722+ dev_info(dev->mt76.dev, "r3_l = %d\n", phase->phase.r3_l);
723+ dev_info(dev->mt76.dev, "r3_ul = %d\n", phase->phase.r3_ul);
724+}
725+
726+int mt7915_mcu_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb)
727+{
728+#define BF_PFMU_TAG 16
729+#define BF_STA_REC 20
730+#define BF_CAL_PHASE 21
731+#define GROUP_M 1
732+ u8 format_id;
733+
734+ skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd));
735+ format_id = *(u8 *)skb->data;
736+
737+ if (format_id == BF_PFMU_TAG) {
738+ struct mt7915_pfmu_tag *pfmu_tag;
739+
740+ skb_pull(skb, 8);
741+ pfmu_tag = (struct mt7915_pfmu_tag *)skb->data;
742+ mt7915_txbf_dump_pfmu_tag(dev, pfmu_tag);
743+ if (dev->test.txbf_pfmu_tag)
744+ memcpy(dev->test.txbf_pfmu_tag, pfmu_tag, sizeof(struct mt7915_pfmu_tag));
745+ } else if (format_id == BF_STA_REC) {
746+ struct sta_rec_bf *sta_rec;
747+
748+ skb_pull(skb, sizeof(struct mt7915_bf_status_hdr));
749+ /* padding 4 byte since bf_status->buf does not contain tag & len */
750+ skb_push(skb, 4);
751+ sta_rec = (struct sta_rec_bf *)skb->data;
752+
753+ mt7915_txbf_dump_sta_rec(dev, sta_rec);
754+ } else if (format_id == BF_CAL_PHASE) {
755+ u8 phase_out_len = sizeof(struct mt7915_txbf_phase_out);
756+ struct mt7915_ibf_cal_info *cal;
757+ struct mt7915_txbf_phase_out phase_out;
758+ struct mt7915_txbf_phase *phase =
759+ (struct mt7915_txbf_phase *)dev->test.txbf_phase_cal;
760+
761+ cal = (struct mt7915_ibf_cal_info *)skb->data;
762+ memcpy(&phase_out, cal->buf, phase_out_len);
763+ switch (cal->cal_type) {
764+ case IBF_PHASE_CAL_NORMAL:
765+ case IBF_PHASE_CAL_NORMAL_INSTRUMENT:
766+ /* Only calibrate group M */
767+ if (cal->group_l_m_n != GROUP_M)
768+ break;
769+ phase = &phase[cal->group];
770+ memcpy(&phase->phase, cal->buf + phase_out_len, sizeof(phase->phase));
771+ phase->status = cal->status;
772+
773+ dev_info(dev->mt76.dev, "Calibrated result = %d\n", phase->status);
774+ mt7915_txbf_dump_cal_phase(dev, phase, cal->group);
775+ break;
776+ case IBF_PHASE_CAL_VERIFY:
777+ case IBF_PHASE_CAL_VERIFY_INSTRUMENT:
778+ dev_info(dev->mt76.dev, "Verification result = %d\n", cal->status);
779+ break;
780+ default:
781+ break;
782+ }
783+
784+ dev_info(dev->mt76.dev, "c0_h = %d, c1_h = %d, c2_h = %d\n",
785+ phase_out.c0_h, phase_out.c1_h, phase_out.c2_h);
786+ dev_info(dev->mt76.dev, "c0_m = %d, c1_m = %d, c2_m = %d\n",
787+ phase_out.c0_m, phase_out.c1_m, phase_out.c2_m);
788+ dev_info(dev->mt76.dev, "c0_l = %d, c1_l = %d, c2_l = %d\n",
789+ phase_out.c0_l, phase_out.c1_l, phase_out.c2_l);
790+ dev_info(dev->mt76.dev, "c3_m = %d, c3_h = %d\n", phase_out.c3_m, phase_out.c3_h);
791+ }
792+
793+ wake_up(&dev->mt76.tx_wait);
794+
795+ return 0;
796+}
797+
798+int mt7915_mcu_txbf_profile_tag_read(struct mt7915_phy *phy, u8 pfmu_idx, bool bfer)
799+{
800+ struct mt7915_dev *dev = phy->dev;
801+ struct {
802+ u8 format_id;
803+ u8 pfmu_idx;
804+ bool bfer;
805+ u8 dbdc_idx;
806+ } __packed req = {
807+ .format_id = MT_BF_PFMU_TAG_READ,
808+ .pfmu_idx = pfmu_idx,
809+ .bfer = bfer,
810+ .dbdc_idx = phy->mt76->band_idx,
811+ };
812+ struct mt7915_pfmu_tag *tag = phy->dev->test.txbf_pfmu_tag;
813+
814+ /* Reset to 0 for mt7915_tm_txbf_profile_tag_write wait_event */
815+ tag->t1.pfmu_idx = 0;
816+
817+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req,
818+ sizeof(req), true);
819+}
820+
821+int mt7915_mcu_txbf_sta_rec_read(struct mt7915_dev *dev, u16 wlan_idx)
822+{
823+ struct {
824+ u8 action;
825+ u8 wlan_idx_lo;
826+ u8 wlan_idx_hi;
827+ u8 rsv[5];
828+ } __packed req = {
829+ .action = MT_BF_STA_REC_READ,
830+ .wlan_idx_lo = to_wcid_lo(wlan_idx),
831+ .wlan_idx_hi = to_wcid_hi(wlan_idx),
832+ };
833+
834+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req,
835+ sizeof(req), true);
836+}
837+#endif
838diff --git a/mt7915/regs.h b/mt7915/regs.h
839index f4b5709..007fd4d 100644
840--- a/mt7915/regs.h
841+++ b/mt7915/regs.h
842@@ -61,6 +61,7 @@ enum offs_rev {
843 MDP_BNRCFR1,
844 ARB_DRNGR0,
845 ARB_SCR,
846+ ARB_TQSAXM0,
847 RMAC_MIB_AIRTIME14,
848 AGG_AALCR0,
849 AGG_AWSCR0,
850@@ -530,6 +531,9 @@ enum offs_rev {
851 #define MT_ARB_DRNGR0(_band, _n) MT_WF_ARB(_band, (__OFFS(ARB_DRNGR0) + \
852 (_n) * 4))
853
854+#define MT_ARB_TQSAXM0(_band) MT_WF_ARB(_band, __OFFS(ARB_TQSAXM0))
855+#define MT_ARB_TQSAXM_ALTX_START_MASK GENMASK(12, 8)
856+
857 /* RMAC: band 0(0x820e5000), band 1(0x820f5000) */
858 #define MT_WF_RMAC_BASE(_band) ((_band) ? 0x820f5000 : 0x820e5000)
859 #define MT_WF_RMAC(_band, ofs) (MT_WF_RMAC_BASE(_band) + (ofs))
860diff --git a/mt7915/testmode.c b/mt7915/testmode.c
861index 2ae6c07..70382b9 100644
862--- a/mt7915/testmode.c
863+++ b/mt7915/testmode.c
864@@ -53,6 +53,8 @@ struct reg_band {
865 static struct reg_band reg_backup_list[TM_REG_MAX_ID];
866
867 static void mt7915_tm_update_entry(struct mt7915_phy *phy);
868+static int mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode, bool bf_sounding);
869+static int mt7915_tm_txbf_set_rate(struct mt7915_phy *phy, struct mt76_wcid *wcid);
870
871 static u8 mt7915_tm_chan_bw(enum nl80211_chan_width width)
872 {
873@@ -73,6 +75,25 @@ static u8 mt7915_tm_chan_bw(enum nl80211_chan_width width)
874 return width_to_bw[width];
875 }
876
877+static u8 mt7915_tm_rate_to_phy(u8 tx_rate_mode)
878+{
879+ static const u8 rate_to_phy[] = {
880+ [MT76_TM_TX_MODE_CCK] = MT_PHY_TYPE_CCK,
881+ [MT76_TM_TX_MODE_OFDM] = MT_PHY_TYPE_OFDM,
882+ [MT76_TM_TX_MODE_HT] = MT_PHY_TYPE_HT,
883+ [MT76_TM_TX_MODE_VHT] = MT_PHY_TYPE_VHT,
884+ [MT76_TM_TX_MODE_HE_SU] = MT_PHY_TYPE_HE_SU,
885+ [MT76_TM_TX_MODE_HE_EXT_SU] = MT_PHY_TYPE_HE_EXT_SU,
886+ [MT76_TM_TX_MODE_HE_TB] = MT_PHY_TYPE_HE_TB,
887+ [MT76_TM_TX_MODE_HE_MU] = MT_PHY_TYPE_HE_MU,
888+ };
889+
890+ if (tx_rate_mode > MT76_TM_TX_MODE_MAX)
891+ return -EINVAL;
892+
893+ return rate_to_phy[tx_rate_mode];
894+}
895+
896 static void
897 mt7915_tm_update_channel(struct mt7915_phy *phy)
898 {
899@@ -273,17 +294,33 @@ mt7915_tm_add_txbf(struct mt7915_phy *phy, struct ieee80211_vif *vif,
900 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
901 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
902 struct mt7915_dev *dev = phy->dev;
903+ struct mt76_testmode_data *td = &phy->mt76->test;
904 struct sk_buff *skb;
905 struct sta_rec_bf *bf;
906 struct tlv *tlv;
907- u8 ndp_rate;
908+ u8 ndp_rate, ndpa_rate, rept_poll_rate, bf_bw;
909+
910+ if (td->tx_rate_mode == MT76_TM_TX_MODE_HE_SU) {
911+ rept_poll_rate = 0x49;
912+ ndpa_rate = 0x49;
913+ ndp_rate = 0;
914+ } else if (td->tx_rate_mode == MT76_TM_TX_MODE_VHT) {
915+ rept_poll_rate = 0x9;
916+ ndpa_rate = 0x9;
917+ ndp_rate = 0;
918+ } else {
919+ rept_poll_rate = 0;
920+ ndpa_rate = 0;
921+ if (nr == 1)
922+ ndp_rate = 8;
923+ else if (nr == 2)
924+ ndp_rate = 16;
925+ else
926+ ndp_rate = 24;
927+ }
928
929- if (nr == 1)
930- ndp_rate = 8;
931- else if (nr == 2)
932- ndp_rate = 16;
933- else
934- ndp_rate = 24;
935+ /* TODO: check 160Hz */
936+ bf_bw = mt7915_tm_chan_bw(phy->mt76->chandef.width);
937
938 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
939 &msta->wcid);
940@@ -299,8 +336,11 @@ mt7915_tm_add_txbf(struct mt7915_phy *phy, struct ieee80211_vif *vif,
941 bf->ncol = nc;
942 bf->nrow = nr;
943 bf->ndp_rate = ndp_rate;
944+ bf->ndpa_rate = ndpa_rate;
945+ bf->rept_poll_rate = rept_poll_rate;
946+ bf->bw = bf_bw;
947 bf->ibf_timeout = 0xff;
948- bf->tx_mode = MT_PHY_TYPE_HT;
949+ bf->tx_mode = mt7915_tm_rate_to_phy(td->tx_rate_mode);
950
951 if (ebf) {
952 bf->mem[0].row = 0;
953@@ -353,11 +393,8 @@ mt7915_tm_entry_add(struct mt7915_phy *phy, u8 aid)
954 }
955
956 memcpy(sta->addr, ed->addr[0], ETH_ALEN);
957- if (phy->test.bf_en) {
958- u8 addr[ETH_ALEN] = {0x00, 0x11, 0x11, 0x11, 0x11, 0x11};
959-
960- memcpy(sta->addr, addr, ETH_ALEN);
961- }
962+ if (td->bf_en)
963+ memcpy(sta->addr, td->addr[0], ETH_ALEN);
964
965 if (td->tx_rate_mode >= MT76_TM_TX_MODE_HT)
966 memcpy(&sta->deflink.ht_cap, &sband->ht_cap, sizeof(sta->deflink.ht_cap));
967@@ -382,6 +419,14 @@ mt7915_tm_entry_add(struct mt7915_phy *phy, u8 aid)
968 list_add_tail(&msta->wcid.list, &td->tm_entry_list);
969 td->entry_num++;
970
971+ mt7915_mcu_add_bss_info(phy, phy->monitor_vif, true);
972+
973+ if (td->bf_en) {
974+ mt7915_tm_set_ipg_params(phy, td->tx_ipg, td->tx_rate_mode, true);
975+ mt7915_tm_set_tam_arb(phy, td->bf_en, 0);
976+ mt7915_tm_txbf_set_rate(phy, &msta->wcid);
977+ }
978+
979 return 0;
980 }
981
982@@ -451,7 +496,7 @@ mt7915_tm_update_entry(struct mt7915_phy *phy)
983 struct mt76_testmode_entry_data *ed, tmp;
984 struct mt76_wcid *wcid, *last;
985
986- if (!td->aid || phy->test.bf_en)
987+ if (!td->aid || td->bf_en)
988 return;
989
990 memcpy(&tmp, &td->ed, sizeof(tmp));
991@@ -472,20 +517,30 @@ mt7915_tm_update_entry(struct mt7915_phy *phy)
992 static int
993 mt7915_tm_txbf_init(struct mt7915_phy *phy, u16 *val)
994 {
995+#define EBF_BBP_RX_OFFSET 0x10280
996+#define EBF_BBP_RX_ENABLE (BIT(0) | BIT(15))
997+#define WF1 BIT(1)
998+#define WF2 BIT(2)
999 struct mt76_testmode_data *td = &phy->mt76->test;
1000 struct mt7915_dev *dev = phy->dev;
1001+ struct mt76_phy *mphy = phy->mt76;
1002 bool enable = val[0];
1003 void *phase_cal, *pfmu_data, *pfmu_tag;
1004- u8 addr[ETH_ALEN] = {0x00, 0x22, 0x22, 0x22, 0x22, 0x22};
1005+ u8 sub_addr = td->is_txbf_dut ? TXBF_DUT_MAC_SUBADDR : TXBF_GOLDEN_MAC_SUBADDR;
1006+ u8 peer_addr = td->is_txbf_dut ? TXBF_GOLDEN_MAC_SUBADDR : TXBF_DUT_MAC_SUBADDR;
1007+ u8 bss_addr = TXBF_DUT_MAC_SUBADDR;
1008+ u8 addr[ETH_ALEN] = {0x00, sub_addr, sub_addr, sub_addr, sub_addr, sub_addr};
1009+ u8 bssid[ETH_ALEN] = {0x00, bss_addr, bss_addr, bss_addr, bss_addr, bss_addr};
1010+ u8 peer_addrs[ETH_ALEN] = {0x00, peer_addr, peer_addr, peer_addr, peer_addr, peer_addr};
1011
1012 if (!enable) {
1013- phy->test.bf_en = 0;
1014+ td->bf_en = 0;
1015 return 0;
1016 }
1017
1018 if (!dev->test.txbf_phase_cal) {
1019 phase_cal = devm_kzalloc(dev->mt76.dev,
1020- sizeof(struct mt7915_tm_txbf_phase) *
1021+ sizeof(struct mt7915_txbf_phase) *
1022 MAX_PHASE_GROUP_NUM,
1023 GFP_KERNEL);
1024 if (!phase_cal)
1025@@ -495,7 +550,10 @@ mt7915_tm_txbf_init(struct mt7915_phy *phy, u16 *val)
1026 }
1027
1028 if (!dev->test.txbf_pfmu_data) {
1029- pfmu_data = devm_kzalloc(dev->mt76.dev, 512, GFP_KERNEL);
1030+ pfmu_data = devm_kzalloc(dev->mt76.dev,
1031+ sizeof(struct mt7915_pfmu_data) *
1032+ MT7915_TXBF_SUBCAR_NUM,
1033+ GFP_KERNEL);
1034 if (!pfmu_data)
1035 return -ENOMEM;
1036
1037@@ -504,21 +562,77 @@ mt7915_tm_txbf_init(struct mt7915_phy *phy, u16 *val)
1038
1039 if (!dev->test.txbf_pfmu_tag) {
1040 pfmu_tag = devm_kzalloc(dev->mt76.dev,
1041- sizeof(struct mt7915_tm_pfmu_tag), GFP_KERNEL);
1042+ sizeof(struct mt7915_pfmu_tag), GFP_KERNEL);
1043 if (!pfmu_tag)
1044 return -ENOMEM;
1045
1046 dev->test.txbf_pfmu_tag = pfmu_tag;
1047 }
1048
1049+ td->bf_en = 1;
1050+ memcpy(td->addr[0], peer_addrs, ETH_ALEN);
1051+ memcpy(td->addr[1], addr, ETH_ALEN);
1052+ memcpy(td->addr[2], bssid, ETH_ALEN);
1053 memcpy(phy->monitor_vif->addr, addr, ETH_ALEN);
1054 mt7915_mcu_add_dev_info(phy, phy->monitor_vif, true);
1055
1056- td->tx_rate_mode = MT76_TM_TX_MODE_HT;
1057- td->tx_mpdu_len = 1024;
1058- td->tx_rate_sgi = 0;
1059- td->tx_ipg = 100;
1060- phy->test.bf_en = 1;
1061+ /* Add second interface in wtbl for using TXCMD to transmit sounding */
1062+ td->second_vif = kzalloc(sizeof(*td->second_vif) + sizeof(struct mt7915_vif), GFP_KERNEL);
1063+ memcpy(td->second_vif, phy->monitor_vif, sizeof(*td->second_vif));
1064+ mt7915_init_vif(phy, td->second_vif, td->bf_en);
1065+
1066+ if (td->ebf && !td->is_txbf_dut) {
1067+ bool is_160hz = val[1];
1068+
1069+ /* Turn On BBP CR for RX */
1070+ mt76_set(dev, EBF_BBP_RX_OFFSET, EBF_BBP_RX_ENABLE);
1071+ dev_info(dev->mt76.dev, "Set BBP RX CR = %x\n", mt76_rr(dev, EBF_BBP_RX_OFFSET));
1072+
1073+ /* Set TX antenna mask of golden: default use WF0 only */
1074+ td->tx_antenna_mask = 1;
1075+ if (is_mt7915(&dev->mt76)) {
1076+ /* Add WF1/WF2 for dbdc/single band in BW 160 */
1077+ td->tx_antenna_mask |= is_160hz & (dev->dbdc_support ? WF1 : WF2);
1078+ /* Shift to WF2/WF3 for dbdc band 1 */
1079+ td->tx_antenna_mask <<= 2 * phy->mt76->band_idx;
1080+ }
1081+ } else if (td->ebf && td->is_txbf_dut) {
1082+ /* Enable ETxBF Capability */
1083+ dev->ibf = false;
1084+ mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE);
1085+ /* Set TX antenna mask of DUT */
1086+ td->tx_antenna_mask = mphy->chainmask >> (dev->chainshift * phy->mt76->band_idx);
1087+ td->tx_spe_idx = phy->mt76->band_idx ? 25 : 24;
1088+ /* Shift to WF2/WF3 for dbdc band 1, Nss = 2 */
1089+ if ((hweight8(td->tx_antenna_mask) == 2) && phy->mt76->band_idx)
1090+ td->tx_antenna_mask <<= 2;
1091+ } else {
1092+ if (td->is_txbf_dut) {
1093+ int nss;
1094+
1095+ /* Enable ITxBF Capability */
1096+ dev->ibf = true;
1097+ mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE);
1098+ td->tx_antenna_mask = mphy->chainmask >> (dev->chainshift *
1099+ phy->mt76->band_idx);
1100+ nss = hweight8(td->tx_antenna_mask);
1101+ if (nss > 1 && nss <= 4)
1102+ td->tx_rate_idx = 15 + 8 * (nss - 2);
1103+ else
1104+ td->tx_rate_idx = 31;
1105+ } else {
1106+ td->tx_antenna_mask = 1;
1107+ mt76_set(dev, EBF_BBP_RX_OFFSET, EBF_BBP_RX_ENABLE);
1108+ dev_info(dev->mt76.dev, "Set BBP RX CR = %x\n",
1109+ mt76_rr(dev, EBF_BBP_RX_OFFSET));
1110+ }
1111+ td->tx_rate_mode = MT76_TM_TX_MODE_HT;
1112+ td->tx_mpdu_len = 1024;
1113+ td->tx_rate_sgi = 0;
1114+ td->tx_ipg = 100;
1115+ }
1116+
1117+ mt7915_mcu_add_bss_info(phy, phy->monitor_vif, true);
1118
1119 return mt7915_tm_set_trx(phy, TM_MAC_TX, true);
1120 }
1121@@ -545,8 +659,7 @@ mt7915_tm_txbf_phase_comp(struct mt7915_phy *phy, u16 *val)
1122 .read_from_e2p = val[3],
1123 .disable = val[4],
1124 };
1125- struct mt7915_tm_txbf_phase *phase =
1126- (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal;
1127+ struct mt7915_txbf_phase *phase = (struct mt7915_txbf_phase *)dev->test.txbf_phase_cal;
1128
1129 wait_event_timeout(dev->mt76.tx_wait, phase[val[2]].status != 0, HZ);
1130 memcpy(req.buf, &phase[val[2]].phase, sizeof(req.buf));
1131@@ -559,32 +672,9 @@ mt7915_tm_txbf_phase_comp(struct mt7915_phy *phy, u16 *val)
1132 sizeof(req), true);
1133 }
1134
1135-static int
1136-mt7915_tm_txbf_profile_tag_read(struct mt7915_phy *phy, u8 pfmu_idx)
1137-{
1138- struct mt7915_dev *dev = phy->dev;
1139- struct {
1140- u8 format_id;
1141- u8 pfmu_idx;
1142- bool bfer;
1143- u8 dbdc_idx;
1144- } __packed req = {
1145- .format_id = MT_BF_PFMU_TAG_READ,
1146- .pfmu_idx = pfmu_idx,
1147- .bfer = 1,
1148- .dbdc_idx = phy != &dev->phy,
1149- };
1150- struct mt7915_tm_pfmu_tag *tag = phy->dev->test.txbf_pfmu_tag;
1151-
1152- tag->t1.pfmu_idx = 0;
1153-
1154- return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req,
1155- sizeof(req), true);
1156-}
1157-
1158 static int
1159 mt7915_tm_txbf_profile_tag_write(struct mt7915_phy *phy, u8 pfmu_idx,
1160- struct mt7915_tm_pfmu_tag *tag)
1161+ struct mt7915_pfmu_tag *tag)
1162 {
1163 struct mt7915_dev *dev = phy->dev;
1164 struct {
1165@@ -611,8 +701,6 @@ static int
1166 mt7915_tm_txbf_apply_tx(struct mt7915_phy *phy, u16 wlan_idx, bool ebf,
1167 bool ibf, bool phase_cal)
1168 {
1169-#define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id)
1170-#define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id)
1171 struct mt7915_dev *dev = phy->dev;
1172 struct {
1173 u8 category;
1174@@ -641,14 +729,15 @@ static int mt7915_tm_txbf_set_rate(struct mt7915_phy *phy,
1175 {
1176 struct mt7915_dev *dev = phy->dev;
1177 struct mt76_testmode_entry_data *ed = mt76_testmode_entry_data(phy->mt76, wcid);
1178+ struct mt76_testmode_data *td = &phy->mt76->test;
1179 struct ieee80211_sta *sta = wcid_to_sta(wcid);
1180 struct sta_phy rate = {};
1181
1182 if (!sta)
1183 return 0;
1184
1185- rate.type = MT_PHY_TYPE_HT;
1186- rate.bw = mt7915_tm_chan_bw(phy->mt76->chandef.width);
1187+ rate.type = mt7915_tm_rate_to_phy(td->tx_rate_mode);
1188+ rate.bw = mt7915_tm_chan_bw(phy->mt76->chandef.width); /* TODO: check 160Hz */
1189 rate.nss = ed->tx_rate_nss;
1190 rate.mcs = ed->tx_rate_idx;
1191 rate.ldpc = (rate.bw || ed->tx_rate_ldpc) * GENMASK(2, 0);
1192@@ -662,13 +751,14 @@ mt7915_tm_txbf_set_tx(struct mt7915_phy *phy, u16 *val)
1193 {
1194 bool bf_on = val[0], update = val[3];
1195 /* u16 wlan_idx = val[2]; */
1196- struct mt7915_tm_pfmu_tag *tag = phy->dev->test.txbf_pfmu_tag;
1197+ struct mt7915_dev *dev = phy->dev;
1198+ struct mt7915_pfmu_tag *tag = dev->test.txbf_pfmu_tag;
1199 struct mt76_testmode_data *td = &phy->mt76->test;
1200 struct mt76_wcid *wcid;
1201
1202 if (bf_on) {
1203 mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, false);
1204- mt7915_tm_txbf_profile_tag_read(phy, 2);
1205+ mt7915_mcu_txbf_profile_tag_read(phy, 2, true);
1206 tag->t1.invalid_prof = false;
1207 mt7915_tm_txbf_profile_tag_write(phy, 2, tag);
1208
1209@@ -683,7 +773,7 @@ mt7915_tm_txbf_set_tx(struct mt7915_phy *phy, u16 *val)
1210 } else {
1211 phy->test.bf_ever_en = false;
1212
1213- mt7915_tm_txbf_profile_tag_read(phy, 2);
1214+ mt7915_mcu_txbf_profile_tag_read(phy, 2, true);
1215 tag->t1.invalid_prof = true;
1216 mt7915_tm_txbf_profile_tag_write(phy, 2, tag);
1217 }
1218@@ -698,6 +788,7 @@ mt7915_tm_txbf_set_tx(struct mt7915_phy *phy, u16 *val)
1219 static int
1220 mt7915_tm_txbf_profile_update(struct mt7915_phy *phy, u16 *val, bool ebf)
1221 {
1222+#define MT_ARB_IBF_ENABLE (BIT(0) | GENMASK(9, 8))
1223 static const u8 mode_to_lm[] = {
1224 [MT76_TM_TX_MODE_CCK] = 0,
1225 [MT76_TM_TX_MODE_OFDM] = 0,
1226@@ -711,7 +802,8 @@ mt7915_tm_txbf_profile_update(struct mt7915_phy *phy, u16 *val, bool ebf)
1227 struct mt76_testmode_data *td = &phy->mt76->test;
1228 struct mt76_wcid *wcid;
1229 struct ieee80211_vif *vif = phy->monitor_vif;
1230- struct mt7915_tm_pfmu_tag *tag = phy->dev->test.txbf_pfmu_tag;
1231+ struct mt7915_dev *dev = phy->dev;
1232+ struct mt7915_pfmu_tag *tag = dev->test.txbf_pfmu_tag;
1233 u8 pfmu_idx = val[0], nc = val[2], nr;
1234 bool is_atenl = val[6];
1235 int ret;
1236@@ -729,11 +821,15 @@ mt7915_tm_txbf_profile_update(struct mt7915_phy *phy, u16 *val, bool ebf)
1237 tag->t1.nr = nr;
1238 tag->t1.nc = nc;
1239 tag->t1.invalid_prof = true;
1240-
1241- tag->t1.snr_sts4 = 0xc0;
1242- tag->t1.snr_sts5 = 0xff;
1243- tag->t1.snr_sts6 = 0xff;
1244- tag->t1.snr_sts7 = 0xff;
1245+ tag->t1.data_bw = mt7915_tm_chan_bw(phy->mt76->chandef.width); /* TODO: check 160Hz */
1246+ tag->t2.se_idx = td->tx_spe_idx;
1247+
1248+ if (is_atenl) {
1249+ tag->t1.snr_sts4 = 0xc0;
1250+ tag->t1.snr_sts5 = 0xff;
1251+ tag->t1.snr_sts6 = 0xff;
1252+ tag->t1.snr_sts7 = 0xff;
1253+ }
1254
1255 if (ebf) {
1256 tag->t1.row_id1 = 0;
1257@@ -761,6 +857,19 @@ mt7915_tm_txbf_profile_update(struct mt7915_phy *phy, u16 *val, bool ebf)
1258 if (ret)
1259 return ret;
1260
1261+ if (td->ebf) {
1262+ mt76_set(dev, MT_ARB_TQSAXM0(phy->mt76->band_idx), MT_ARB_TQSAXM_ALTX_START_MASK);
1263+ dev_info(dev->mt76.dev, "Set TX queue start CR for AX management (0x%x) = 0x%x\n",
1264+ MT_ARB_TQSAXM0(phy->mt76->band_idx),
1265+ mt76_rr(dev, MT_ARB_TQSAXM0(phy->mt76->band_idx)));
1266+ } else if (!td->ebf && ebf) {
1267+ /* iBF's ebf profile update */
1268+ mt76_set(dev, MT_ARB_TQSAXM0(phy->mt76->band_idx), MT_ARB_IBF_ENABLE);
1269+ dev_info(dev->mt76.dev, "Set TX queue start CR for AX management (0x%x) = 0x%x\n",
1270+ MT_ARB_TQSAXM0(phy->mt76->band_idx),
1271+ mt76_rr(dev, MT_ARB_TQSAXM0(phy->mt76->band_idx)));
1272+ }
1273+
1274 if (!ebf && is_atenl)
1275 return mt7915_tm_txbf_apply_tx(phy, 1, false, true, true);
1276
1277@@ -778,7 +887,7 @@ mt7915_tm_txbf_phase_cal(struct mt7915_phy *phy, u16 *val)
1278 u8 category;
1279 u8 group_l_m_n;
1280 u8 group;
1281- bool sx2;
1282+ bool dbdc_idx;
1283 u8 cal_type;
1284 u8 lna_gain_level;
1285 u8 _rsv[2];
1286@@ -786,12 +895,12 @@ mt7915_tm_txbf_phase_cal(struct mt7915_phy *phy, u16 *val)
1287 .category = MT_BF_PHASE_CAL,
1288 .group = val[0],
1289 .group_l_m_n = val[1],
1290- .sx2 = val[2],
1291+ .dbdc_idx = phy->mt76->band_idx,
1292 .cal_type = val[3],
1293 .lna_gain_level = val[4],
1294 };
1295- struct mt7915_tm_txbf_phase *phase =
1296- (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal;
1297+ struct mt7915_txbf_phase *phase =
1298+ (struct mt7915_txbf_phase *)dev->test.txbf_phase_cal;
1299
1300 phase[req.group].status = 0;
1301
1302@@ -799,53 +908,10 @@ mt7915_tm_txbf_phase_cal(struct mt7915_phy *phy, u16 *val)
1303 sizeof(req), true);
1304 }
1305
1306-int mt7915_tm_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb)
1307-{
1308-#define BF_PFMU_TAG 16
1309-#define BF_CAL_PHASE 21
1310- u8 format_id;
1311-
1312- skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd));
1313- format_id = *(u8 *)skb->data;
1314-
1315- if (format_id == BF_PFMU_TAG) {
1316- struct mt7915_tm_pfmu_tag *tag = dev->test.txbf_pfmu_tag;
1317-
1318- skb_pull(skb, 8);
1319- memcpy(tag, skb->data, sizeof(struct mt7915_tm_pfmu_tag));
1320- } else if (format_id == BF_CAL_PHASE) {
1321- struct mt7915_tm_ibf_cal_info *cal;
1322- struct mt7915_tm_txbf_phase *phase =
1323- (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal;
1324-
1325- cal = (struct mt7915_tm_ibf_cal_info *)skb->data;
1326- switch (cal->cal_type) {
1327- case IBF_PHASE_CAL_NORMAL:
1328- case IBF_PHASE_CAL_NORMAL_INSTRUMENT:
1329- if (cal->group_l_m_n != GROUP_M)
1330- break;
1331- phase = &phase[cal->group];
1332- memcpy(&phase->phase, cal->buf + 16, sizeof(phase->phase));
1333- phase->status = cal->status;
1334- /* for passing iTest script */
1335- dev_info(dev->mt76.dev, "Calibrated result = %d\n", phase->status);
1336- break;
1337- case IBF_PHASE_CAL_VERIFY:
1338- case IBF_PHASE_CAL_VERIFY_INSTRUMENT:
1339- break;
1340- default:
1341- break;
1342- }
1343- }
1344-
1345- wake_up(&dev->mt76.tx_wait);
1346-
1347- return 0;
1348-}
1349-
1350 static int
1351 mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val)
1352 {
1353+#define MT7915_TXBF_PFMU_DATA_LEN (MT7915_TXBF_SUBCAR_NUM * sizeof(struct mt7915_pfmu_data))
1354 struct mt76_testmode_data *td = &phy->mt76->test;
1355 u16 pfmu_idx = val[0];
1356 u16 subc_id = val[1];
1357@@ -854,9 +920,9 @@ mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val)
1358 u16 angle31 = val[4];
1359 u16 angle41 = val[5];
1360 s16 phi11 = 0, phi21 = 0, phi31 = 0;
1361- struct mt7915_tm_pfmu_data *pfmu_data;
1362+ struct mt7915_pfmu_data *pfmu_data;
1363
1364- if (subc_id > 63)
1365+ if (subc_id > MT7915_TXBF_SUBCAR_NUM - 1)
1366 return -EINVAL;
1367
1368 if (td->tx_antenna_mask == 2) {
1369@@ -870,7 +936,7 @@ mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val)
1370 phi31 = (s16)(angle41 - angle31);
1371 }
1372
1373- pfmu_data = (struct mt7915_tm_pfmu_data *)phy->dev->test.txbf_pfmu_data;
1374+ pfmu_data = (struct mt7915_pfmu_data *)phy->dev->test.txbf_pfmu_data;
1375 pfmu_data = &pfmu_data[subc_id];
1376
1377 if (subc_id < 32)
1378@@ -880,21 +946,21 @@ mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val)
1379 pfmu_data->phi11 = cpu_to_le16(phi11);
1380 pfmu_data->phi21 = cpu_to_le16(phi21);
1381 pfmu_data->phi31 = cpu_to_le16(phi31);
1382- if (subc_id == 63) {
1383+ if (subc_id == MT7915_TXBF_SUBCAR_NUM - 1) {
1384 struct mt7915_dev *dev = phy->dev;
1385 struct {
1386 u8 format_id;
1387 u8 pfmu_idx;
1388 u8 dbdc_idx;
1389 u8 _rsv;
1390- u8 buf[512];
1391+ u8 buf[MT7915_TXBF_PFMU_DATA_LEN];
1392 } __packed req = {
1393 .format_id = MT_BF_PROFILE_WRITE_ALL,
1394 .pfmu_idx = pfmu_idx,
1395 .dbdc_idx = phy != &dev->phy,
1396 };
1397
1398- memcpy(req.buf, dev->test.txbf_pfmu_data, 512);
1399+ memcpy(req.buf, dev->test.txbf_pfmu_data, MT7915_TXBF_PFMU_DATA_LEN);
1400
1401 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION),
1402 &req, sizeof(req), true);
1403@@ -906,7 +972,7 @@ mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val)
1404 static int
1405 mt7915_tm_txbf_e2p_update(struct mt7915_phy *phy)
1406 {
1407- struct mt7915_tm_txbf_phase *phase, *p;
1408+ struct mt7915_txbf_phase *phase, *p;
1409 struct mt7915_dev *dev = phy->dev;
1410 u8 *eeprom = dev->mt76.eeprom.data;
1411 u16 offset;
1412@@ -916,7 +982,7 @@ mt7915_tm_txbf_e2p_update(struct mt7915_phy *phy)
1413 is_7976 = mt7915_check_adie(dev, false) || is_mt7916(&dev->mt76);
1414 offset = is_7976 ? 0x60a : 0x651;
1415
1416- phase = (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal;
1417+ phase = (struct mt7915_txbf_phase *)dev->test.txbf_phase_cal;
1418 for (i = 0; i < MAX_PHASE_GROUP_NUM; i++) {
1419 p = &phase[i];
1420
1421@@ -931,17 +997,75 @@ mt7915_tm_txbf_e2p_update(struct mt7915_phy *phy)
1422 return 0;
1423 }
1424
1425+static int
1426+mt7915_tm_trigger_sounding(struct mt7915_phy *phy, u16 *val, bool en)
1427+{
1428+ struct mt7915_dev *dev = phy->dev;
1429+ u8 sounding_mode = val[0];
1430+ u8 MU_num = val[1];
1431+ u32 sounding_interval = (u32)val[2] << 2; /* input unit: 4ms */
1432+ enum sounding_mode {
1433+ SU_SOUNDING,
1434+ MU_SOUNDING,
1435+ SU_PERIODIC_SOUNDING,
1436+ MU_PERIODIC_SOUNDING,
1437+ BF_PROCESSING,
1438+ TXCMD_NONTB_SU_SOUNDING,
1439+ TXCMD_VHT_MU_SOUNDING,
1440+ TXCMD_TB_PER_BRP_SOUNDING,
1441+ TXCMD_TB_SOUNDING,
1442+
1443+ /* keep last */
1444+ NUM_SOUNDING_MODE,
1445+ SOUNDING_MODE_MAX = NUM_SOUNDING_MODE - 1,
1446+ };
1447+ struct {
1448+ u8 cmd_category_id;
1449+ u8 sounding_mode;
1450+ u8 MU_num;
1451+ u8 rsv;
1452+ u8 wlan_idx[4];
1453+ u32 sounding_interval; /* unit: ms */
1454+ } __packed req = {
1455+ .cmd_category_id = en ? MT_BF_SOUNDING_ON : MT_BF_SOUNDING_OFF,
1456+ .sounding_mode = sounding_mode,
1457+ .MU_num = MU_num,
1458+ .sounding_interval = cpu_to_le32(sounding_interval),
1459+ .wlan_idx[0] = val[3],
1460+ .wlan_idx[1] = val[4],
1461+ .wlan_idx[2] = val[5],
1462+ .wlan_idx[3] = val[6],
1463+ };
1464+
1465+ if (sounding_mode > SOUNDING_MODE_MAX)
1466+ return -EINVAL;
1467+
1468+ /* Enable Tx MAC HW before trigger sounding */
1469+ if (en)
1470+ mt7915_tm_set_trx(phy, TM_MAC_TX, true);
1471+
1472+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION),
1473+ &req, sizeof(req), true);
1474+}
1475+
1476 static int
1477 mt7915_tm_set_txbf(struct mt7915_phy *phy)
1478 {
1479+#define TXBF_IS_DUT_MASK BIT(0)
1480+#define TXBF_EBF_MASK BIT(1)
1481 struct mt76_testmode_data *td = &phy->mt76->test;
1482 u16 *val = td->txbf_param;
1483
1484- pr_info("ibf cal process: act = %u, val = %u, %u, %u, %u, %u, %u\n",
1485- td->txbf_act, val[0], val[1], val[2], val[3], val[4], val[5]);
1486+ dev_info(phy->dev->mt76.dev, "ibf cal process: act = %u, val = %u, %u, %u, %u, %u, %u\n",
1487+ td->txbf_act, val[0], val[1], val[2], val[3], val[4], val[5], val[6]);
1488
1489 switch (td->txbf_act) {
1490+ case MT76_TM_TXBF_ACT_GOLDEN_INIT:
1491 case MT76_TM_TXBF_ACT_INIT:
1492+ case MT76_TM_TX_EBF_ACT_GOLDEN_INIT:
1493+ case MT76_TM_TX_EBF_ACT_INIT:
1494+ td->ebf = !!u32_get_bits(td->txbf_act, TXBF_EBF_MASK);
1495+ td->is_txbf_dut = !!u32_get_bits(td->txbf_act, TXBF_IS_DUT_MASK);
1496 return mt7915_tm_txbf_init(phy, val);
1497 case MT76_TM_TXBF_ACT_UPDATE_CH:
1498 mt7915_tm_update_channel(phy);
1499@@ -967,6 +1091,36 @@ mt7915_tm_set_txbf(struct mt7915_phy *phy)
1500
1501 return mt7915_tm_txbf_apply_tx(phy, wlan_idx, ebf, ibf, phase_cal);
1502 }
1503+ case MT76_TM_TXBF_ACT_TRIGGER_SOUNDING:
1504+ return mt7915_tm_trigger_sounding(phy, val, true);
1505+ case MT76_TM_TXBF_ACT_STOP_SOUNDING:
1506+ memset(val, 0, sizeof(td->txbf_param));
1507+ return mt7915_tm_trigger_sounding(phy, val, false);
1508+ case MT76_TM_TXBF_ACT_PROFILE_TAG_READ:
1509+ case MT76_TM_TXBF_ACT_PROFILE_TAG_WRITE:
1510+ case MT76_TM_TXBF_ACT_PROFILE_TAG_INVALID: {
1511+ u8 pfmu_idx = val[0];
1512+ bool bfer = !!val[1];
1513+ struct mt7915_dev *dev = phy->dev;
1514+ struct mt7915_pfmu_tag *tag = dev->test.txbf_pfmu_tag;
1515+
1516+ if (!tag) {
1517+ dev_err(dev->mt76.dev,
1518+ "pfmu tag is not initialized!\n");
1519+ return 0;
1520+ }
1521+
1522+ if (td->txbf_act == MT76_TM_TXBF_ACT_PROFILE_TAG_WRITE)
1523+ return mt7915_tm_txbf_profile_tag_write(phy, pfmu_idx, tag);
1524+ else if (td->txbf_act == MT76_TM_TXBF_ACT_PROFILE_TAG_READ)
1525+ return mt7915_mcu_txbf_profile_tag_read(phy, pfmu_idx, bfer);
1526+
1527+ tag->t1.invalid_prof = !!val[0];
1528+
1529+ return 0;
1530+ }
1531+ case MT76_TM_TXBF_ACT_STA_REC_READ:
1532+ return mt7915_mcu_txbf_sta_rec_read(phy->dev, val[0]);
1533 default:
1534 break;
1535 };
1536@@ -1186,9 +1340,10 @@ mt7915_tm_set_ipi(struct mt7915_phy *phy)
1537
1538 static int
1539 mt7915_tm_set_wmm_qid(struct mt7915_phy *phy, u8 qid, u8 aifs, u8 cw_min,
1540- u16 cw_max, u16 txop, u8 tx_cmd)
1541+ u16 cw_max, u16 txop, u8 tx_cmd, bool bf_sounding)
1542 {
1543- struct mt7915_vif *mvif = (struct mt7915_vif *)phy->monitor_vif->drv_priv;
1544+ struct mt76_testmode_data *td = &phy->mt76->test;
1545+ struct mt7915_vif *mvif;
1546 struct mt7915_mcu_tx req = {
1547 .valid = true,
1548 .mode = tx_cmd,
1549@@ -1196,6 +1351,9 @@ mt7915_tm_set_wmm_qid(struct mt7915_phy *phy, u8 qid, u8 aifs, u8 cw_min,
1550 };
1551 struct edca *e = &req.edca[0];
1552
1553+ mvif = bf_sounding ? (struct mt7915_vif *)td->second_vif->drv_priv :
1554+ (struct mt7915_vif *)phy->monitor_vif->drv_priv;
1555+
1556 e->queue = qid + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS;
1557 e->set = WMM_PARAM_SET;
1558
1559@@ -1208,17 +1366,19 @@ mt7915_tm_set_wmm_qid(struct mt7915_phy *phy, u8 qid, u8 aifs, u8 cw_min,
1560 }
1561
1562 static int
1563-mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode)
1564+mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode, bool bf_sounding)
1565 {
1566 #define TM_DEFAULT_SIFS 10
1567 #define TM_MAX_SIFS 127
1568 #define TM_MAX_AIFSN 0xf
1569 #define TM_MIN_AIFSN 0x1
1570 #define BBP_PROC_TIME 1500
1571+#define TM_DEFAULT_CW 1
1572 struct mt7915_dev *dev = phy->dev;
1573 u8 sig_ext = (mode == MT76_TM_TX_MODE_CCK) ? 0 : 6;
1574 u8 slot_time = 9, sifs = TM_DEFAULT_SIFS;
1575 u8 aifsn = TM_MIN_AIFSN;
1576+ bool tx_cmd;
1577 u8 band = phy->mt76->band_idx;
1578 u32 i2t_time, tr2t_time, txv_time;
1579 u16 cw = 0;
1580@@ -1232,6 +1392,7 @@ mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode)
1581 ipg -= sig_ext;
1582
1583 if (ipg <= (TM_MAX_SIFS + slot_time)) {
1584+ cw = TM_DEFAULT_CW;
1585 sifs = ipg - slot_time;
1586 } else {
1587 u32 val = (ipg + slot_time) / slot_time;
1588@@ -1267,10 +1428,12 @@ done:
1589
1590 mt7915_tm_set_slot_time(phy, slot_time, sifs);
1591
1592+ /* HE MU data and iBF/eBF sounding packet use TXCMD */
1593+ tx_cmd = (mode == MT76_TM_TX_MODE_HE_MU) || bf_sounding;
1594+
1595 return mt7915_tm_set_wmm_qid(phy,
1596 mt76_connac_lmac_mapping(IEEE80211_AC_BE),
1597- aifsn, cw, cw, 0,
1598- mode == MT76_TM_TX_MODE_HE_MU);
1599+ aifsn, cw, cw, 0, tx_cmd, bf_sounding);
1600 }
1601
1602 static int
1603@@ -1469,7 +1632,7 @@ mt7915_tm_init(struct mt7915_phy *phy, bool en)
1604
1605 phy->mt76->test.aid = 0;
1606 phy->mt76->test.tx_mpdu_len = 0;
1607- phy->test.bf_en = 0;
1608+ phy->mt76->test.bf_en = 0;
1609 mt7915_tm_set_entry(phy);
1610 } else {
1611 INIT_DELAYED_WORK(&phy->ipi_work, mt7915_tm_ipi_work);
1612@@ -1654,7 +1817,7 @@ mt7915_tm_set_tx_frames(struct mt7915_phy *phy, bool en)
1613 u32 tx_time = td->tx_time, ipg = td->tx_ipg;
1614 u8 duty_cycle = td->tx_duty_cycle;
1615
1616- if (!phy->test.bf_en)
1617+ if (!td->bf_en)
1618 mt7915_tm_update_channel(phy);
1619
1620 if (td->tx_spe_idx)
1621@@ -1669,7 +1832,7 @@ mt7915_tm_set_tx_frames(struct mt7915_phy *phy, bool en)
1622 if (duty_cycle < 100)
1623 tx_time = duty_cycle * ipg / (100 - duty_cycle);
1624 }
1625- mt7915_tm_set_ipg_params(phy, ipg, td->tx_rate_mode);
1626+ mt7915_tm_set_ipg_params(phy, ipg, td->tx_rate_mode, false);
1627 mt7915_tm_set_tx_len(phy, tx_time);
1628
1629 if (ipg)
1630@@ -1688,6 +1851,9 @@ mt7915_tm_set_tx_frames(struct mt7915_phy *phy, bool en)
1631 mt7915_tm_tx_frames_mu(phy, en);
1632
1633 mt7915_tm_set_trx(phy, TM_MAC_TX, en);
1634+
1635+ if (td->bf_en)
1636+ mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, en);
1637 }
1638
1639 static int
1640@@ -1779,7 +1945,7 @@ mt7915_tm_set_rx_frames(struct mt7915_phy *phy, bool en)
1641 mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, false);
1642
1643 if (en) {
1644- if (!phy->test.bf_en)
1645+ if (!td->bf_en || !td->is_txbf_dut)
1646 mt7915_tm_update_channel(phy);
1647 if (td->aid)
1648 mt7915_tm_set_rx_user_idx(phy, td->aid);
1649@@ -1796,6 +1962,9 @@ mt7915_tm_set_rx_frames(struct mt7915_phy *phy, bool en)
1650 mt7915_tm_set_muru_aid(phy, en ? td->aid : 0xf800);
1651
1652 mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, en);
1653+
1654+ if (td->bf_en)
1655+ mt7915_tm_set_trx(phy, TM_MAC_TX, en);
1656 }
1657
1658 static int
1659@@ -1855,34 +2024,7 @@ mt7915_tm_set_tx_cont(struct mt7915_phy *phy, bool en)
1660 rate_idx = sband->bitrates[idx].hw_value & 0xff;
1661 }
1662
1663- switch (td->tx_rate_mode) {
1664- case MT76_TM_TX_MODE_CCK:
1665- mode = MT_PHY_TYPE_CCK;
1666- break;
1667- case MT76_TM_TX_MODE_OFDM:
1668- mode = MT_PHY_TYPE_OFDM;
1669- break;
1670- case MT76_TM_TX_MODE_HT:
1671- mode = MT_PHY_TYPE_HT;
1672- break;
1673- case MT76_TM_TX_MODE_VHT:
1674- mode = MT_PHY_TYPE_VHT;
1675- break;
1676- case MT76_TM_TX_MODE_HE_SU:
1677- mode = MT_PHY_TYPE_HE_SU;
1678- break;
1679- case MT76_TM_TX_MODE_HE_EXT_SU:
1680- mode = MT_PHY_TYPE_HE_EXT_SU;
1681- break;
1682- case MT76_TM_TX_MODE_HE_TB:
1683- mode = MT_PHY_TYPE_HE_TB;
1684- break;
1685- case MT76_TM_TX_MODE_HE_MU:
1686- mode = MT_PHY_TYPE_HE_MU;
1687- break;
1688- default:
1689- return -EINVAL;
1690- }
1691+ mode = mt7915_tm_rate_to_phy(td->tx_rate_mode);
1692
1693 rateval = mode << 6 | rate_idx;
1694 tx_cont->rateval = cpu_to_le16(rateval);
1695diff --git a/mt7915/testmode.h b/mt7915/testmode.h
1696index d500987..1982369 100644
1697--- a/mt7915/testmode.h
1698+++ b/mt7915/testmode.h
1699@@ -311,137 +311,7 @@ struct mt7915_tm_muru {
1700
1701 #define MAX_PHASE_GROUP_NUM 9
1702
1703-struct mt7915_tm_txbf_phase {
1704- u8 status;
1705- struct {
1706- u8 r0_uh;
1707- u8 r0_h;
1708- u8 r0_m;
1709- u8 r0_l;
1710- u8 r0_ul;
1711- u8 r1_uh;
1712- u8 r1_h;
1713- u8 r1_m;
1714- u8 r1_l;
1715- u8 r1_ul;
1716- u8 r2_uh;
1717- u8 r2_h;
1718- u8 r2_m;
1719- u8 r2_l;
1720- u8 r2_ul;
1721- u8 r3_uh;
1722- u8 r3_h;
1723- u8 r3_m;
1724- u8 r3_l;
1725- u8 r3_ul;
1726- u8 r2_uh_sx2;
1727- u8 r2_h_sx2;
1728- u8 r2_m_sx2;
1729- u8 r2_l_sx2;
1730- u8 r2_ul_sx2;
1731- u8 r3_uh_sx2;
1732- u8 r3_h_sx2;
1733- u8 r3_m_sx2;
1734- u8 r3_l_sx2;
1735- u8 r3_ul_sx2;
1736- u8 m_t0_h;
1737- u8 m_t1_h;
1738- u8 m_t2_h;
1739- u8 m_t2_h_sx2;
1740- u8 r0_reserved;
1741- u8 r1_reserved;
1742- u8 r2_reserved;
1743- u8 r3_reserved;
1744- u8 r2_sx2_reserved;
1745- u8 r3_sx2_reserved;
1746- } phase;
1747-};
1748-
1749-struct mt7915_tm_pfmu_tag1 {
1750- __le32 pfmu_idx:10;
1751- __le32 ebf:1;
1752- __le32 data_bw:2;
1753- __le32 lm:2;
1754- __le32 is_mu:1;
1755- __le32 nr:3, nc:3;
1756- __le32 codebook:2;
1757- __le32 ngroup:2;
1758- __le32 _rsv:2;
1759- __le32 invalid_prof:1;
1760- __le32 rmsd:3;
1761-
1762- __le32 col_id1:6, row_id1:10;
1763- __le32 col_id2:6, row_id2:10;
1764- __le32 col_id3:6, row_id3:10;
1765- __le32 col_id4:6, row_id4:10;
1766-
1767- __le32 ru_start_id:7;
1768- __le32 _rsv1:1;
1769- __le32 ru_end_id:7;
1770- __le32 _rsv2:1;
1771- __le32 mob_cal_en:1;
1772- __le32 _rsv3:15;
1773-
1774- __le32 snr_sts0:8, snr_sts1:8, snr_sts2:8, snr_sts3:8;
1775- __le32 snr_sts4:8, snr_sts5:8, snr_sts6:8, snr_sts7:8;
1776-
1777- __le32 _rsv4;
1778-} __packed;
1779-
1780-struct mt7915_tm_pfmu_tag2 {
1781- __le32 smart_ant:24;
1782- __le32 se_idx:5;
1783- __le32 _rsv:3;
1784-
1785- __le32 _rsv1:8;
1786- __le32 rmsd_thres:3;
1787- __le32 _rsv2:5;
1788- __le32 ibf_timeout:8;
1789- __le32 _rsv3:8;
1790-
1791- __le32 _rsv4:16;
1792- __le32 ibf_data_bw:2;
1793- __le32 ibf_nc:3;
1794- __le32 ibf_nr:3;
1795- __le32 ibf_ru:8;
1796-
1797- __le32 mob_delta_t:8;
1798- __le32 mob_lq_result:7;
1799- __le32 _rsv5:1;
1800- __le32 _rsv6:16;
1801-
1802- __le32 _rsv7;
1803-} __packed;
1804-
1805-struct mt7915_tm_pfmu_tag {
1806- struct mt7915_tm_pfmu_tag1 t1;
1807- struct mt7915_tm_pfmu_tag2 t2;
1808-};
1809-
1810-struct mt7915_tm_pfmu_data {
1811- __le16 subc_idx;
1812- __le16 phi11;
1813- __le16 phi21;
1814- __le16 phi31;
1815-};
1816-
1817-struct mt7915_tm_ibf_cal_info {
1818- u8 format_id;
1819- u8 group_l_m_n;
1820- u8 group;
1821- bool sx2;
1822- u8 status;
1823- u8 cal_type;
1824- u8 _rsv[2];
1825- u8 buf[1000];
1826-} __packed;
1827-
1828-enum {
1829- IBF_PHASE_CAL_UNSPEC,
1830- IBF_PHASE_CAL_NORMAL,
1831- IBF_PHASE_CAL_VERIFY,
1832- IBF_PHASE_CAL_NORMAL_INSTRUMENT,
1833- IBF_PHASE_CAL_VERIFY_INSTRUMENT,
1834-};
1835+#define TXBF_DUT_MAC_SUBADDR 0x22
1836+#define TXBF_GOLDEN_MAC_SUBADDR 0x11
1837
1838 #endif
1839diff --git a/testmode.c b/testmode.c
1840index b19b872..ed5ceee 100644
1841--- a/testmode.c
1842+++ b/testmode.c
1843@@ -191,6 +191,7 @@ mt76_testmode_alloc_skb(struct mt76_phy *phy, u32 len,
1844
1845 hdr = __skb_put_zero(head, sizeof(*hdr));
1846 hdr->frame_control = cpu_to_le16(fc);
1847+
1848 memcpy(hdr->addr1, addr[0], ETH_ALEN);
1849 memcpy(hdr->addr2, addr[1], ETH_ALEN);
1850 memcpy(hdr->addr3, addr[2], ETH_ALEN);
1851diff --git a/testmode.h b/testmode.h
1852index 27a0095..e1ebbd5 100644
1853--- a/testmode.h
1854+++ b/testmode.h
1855@@ -299,7 +299,10 @@ enum mt76_testmode_cfg {
1856 };
1857
1858 enum mt76_testmode_txbf_act {
1859+ MT76_TM_TXBF_ACT_GOLDEN_INIT,
1860 MT76_TM_TXBF_ACT_INIT,
1861+ MT76_TM_TX_EBF_ACT_GOLDEN_INIT,
1862+ MT76_TM_TX_EBF_ACT_INIT,
1863 MT76_TM_TXBF_ACT_UPDATE_CH,
1864 MT76_TM_TXBF_ACT_PHASE_COMP,
1865 MT76_TM_TXBF_ACT_TX_PREP,
1866@@ -310,6 +313,12 @@ enum mt76_testmode_txbf_act {
1867 MT76_TM_TXBF_ACT_PROF_UPDATE_ALL,
1868 MT76_TM_TXBF_ACT_PROF_UPDATE_ALL_CMD,
1869 MT76_TM_TXBF_ACT_E2P_UPDATE,
1870+ MT76_TM_TXBF_ACT_TRIGGER_SOUNDING,
1871+ MT76_TM_TXBF_ACT_STOP_SOUNDING,
1872+ MT76_TM_TXBF_ACT_PROFILE_TAG_READ,
1873+ MT76_TM_TXBF_ACT_PROFILE_TAG_WRITE,
1874+ MT76_TM_TXBF_ACT_PROFILE_TAG_INVALID,
1875+ MT76_TM_TXBF_ACT_STA_REC_READ,
1876
1877 /* keep last */
1878 NUM_MT76_TM_TXBF_ACT,
1879diff --git a/tools/fields.c b/tools/fields.c
1880index 6f07eed..7211ec5 100644
1881--- a/tools/fields.c
1882+++ b/tools/fields.c
1883@@ -33,7 +33,10 @@ static const char * const testmode_tx_mode[] = {
1884 };
1885
1886 static const char * const testmode_txbf_act[] = {
1887+ [MT76_TM_TXBF_ACT_GOLDEN_INIT] = "golden_init",
1888 [MT76_TM_TXBF_ACT_INIT] = "init",
1889+ [MT76_TM_TX_EBF_ACT_GOLDEN_INIT] = "ebf_golden_init",
1890+ [MT76_TM_TX_EBF_ACT_INIT] = "ebf_init",
1891 [MT76_TM_TXBF_ACT_UPDATE_CH] = "update_ch",
1892 [MT76_TM_TXBF_ACT_PHASE_COMP] = "phase_comp",
1893 [MT76_TM_TXBF_ACT_TX_PREP] = "tx_prep",
1894@@ -44,6 +47,12 @@ static const char * const testmode_txbf_act[] = {
1895 [MT76_TM_TXBF_ACT_PROF_UPDATE_ALL] = "prof_update",
1896 [MT76_TM_TXBF_ACT_PROF_UPDATE_ALL_CMD] = "prof_update_all",
1897 [MT76_TM_TXBF_ACT_E2P_UPDATE] = "e2p_update",
1898+ [MT76_TM_TXBF_ACT_TRIGGER_SOUNDING] = "trigger_sounding",
1899+ [MT76_TM_TXBF_ACT_STOP_SOUNDING] = "stop_sounding",
1900+ [MT76_TM_TXBF_ACT_PROFILE_TAG_READ] = "pfmu_tag_read",
1901+ [MT76_TM_TXBF_ACT_PROFILE_TAG_WRITE] = "pfmu_tag_write",
1902+ [MT76_TM_TXBF_ACT_PROFILE_TAG_INVALID] = "set_invalid_prof",
1903+ [MT76_TM_TXBF_ACT_STA_REC_READ] = "sta_rec_read",
1904 };
1905
1906 static const char * const testmode_offchan_bw[] = {
1907--
19082.18.0
1909