developer | d82d9fc | 2022-06-23 19:03:51 +0800 | [diff] [blame] | 1 | From b242e30661dac5c1c127999600029cd5b3f6b458 Mon Sep 17 00:00:00 2001 |
| 2 | From: "SkyLake.Huang" <skylake.huang@mediatek.com> |
| 3 | Date: Thu, 23 Jun 2022 18:40:59 +0800 |
| 4 | Subject: [PATCH] drivers: mtd: spi-nor: Add calibration support for spi-nor |
| 5 | |
| 6 | Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> |
| 7 | --- |
| 8 | drivers/mtd/spi-nor/spi-nor.c | 17 +++++++++++++++++ |
| 9 | 1 file changed, 17 insertions(+) |
| 10 | |
| 11 | diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c |
| 12 | index 945833cbb..38a8948b3 100644 |
| 13 | --- a/drivers/mtd/spi-nor/spi-nor.c |
| 14 | +++ b/drivers/mtd/spi-nor/spi-nor.c |
| 15 | @@ -4893,6 +4893,20 @@ static void spi_nor_debugfs_init(struct spi_nor *nor, |
| 16 | info->id_len, info->id); |
| 17 | } |
| 18 | |
| 19 | +static int spi_nor_cal_read(void *priv, u32 *addr, int addrlen, u8 *buf, int readlen) |
| 20 | +{ |
| 21 | + int ret; |
| 22 | + struct spi_nor *nor = (struct spi_nor *)priv; |
| 23 | + |
| 24 | + nor->reg_proto = SNOR_PROTO_1_1_1; |
| 25 | + nor->read_proto = SNOR_PROTO_1_1_1; |
| 26 | + nor->read_opcode = SPINOR_OP_READ; |
| 27 | + nor->addr_width = 3; |
| 28 | + nor->read_dummy = 0; |
| 29 | + |
| 30 | + return spi_nor_read_raw(nor, *addr, readlen, buf); |
| 31 | +} |
| 32 | + |
| 33 | static const struct flash_info *spi_nor_get_flash_info(struct spi_nor *nor, |
| 34 | const char *name) |
| 35 | { |
| 36 | @@ -4967,6 +4981,9 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, |
| 37 | if (!nor->bouncebuf) |
| 38 | return -ENOMEM; |
| 39 | |
| 40 | + if(nor->spimem) |
| 41 | + spi_mem_do_calibration(nor->spimem, spi_nor_cal_read, nor); |
| 42 | + |
| 43 | info = spi_nor_get_flash_info(nor, name); |
| 44 | if (IS_ERR(info)) |
| 45 | return PTR_ERR(info); |
| 46 | -- |
| 47 | 2.18.0 |
| 48 | |