blob: d70b2149686d24ed7f94dbe35471d593bd8f19f5 [file] [log] [blame]
developer0aaf79d2023-08-21 14:10:16 +08001From 108924394ac7634ddae0a87c9108e0cadcd7c9df Mon Sep 17 00:00:00 2001
2From: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
3Date: Wed, 23 Aug 2023 13:46:31 +0800
4Subject: [PATCH] 999-3017-ethernet-update-ppe-from-mt7986-to-mt7988
5
6---
7 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 14 ++++---
8 drivers/net/ethernet/mediatek/mtk_eth_soc.h | 3 +-
9 drivers/net/ethernet/mediatek/mtk_ppe.c | 18 ++++++---
10 drivers/net/ethernet/mediatek/mtk_ppe.h | 40 +++++++++++++++----
11 .../net/ethernet/mediatek/mtk_ppe_offload.c | 6 ++-
12 5 files changed, 61 insertions(+), 20 deletions(-)
13
developeree39bcf2023-06-16 08:03:30 +080014diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
developer0aaf79d2023-08-21 14:10:16 +080015index 1dcdd17..a1b4c80 100644
developeree39bcf2023-06-16 08:03:30 +080016--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
17+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
developer0aaf79d2023-08-21 14:10:16 +080018@@ -2198,17 +2198,17 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,
developeree39bcf2023-06-16 08:03:30 +080019 skb_checksum_none_assert(skb);
20 skb->protocol = eth_type_trans(skb, netdev);
21
22-#if defined(CONFIG_MEDIATEK_NETSYS_RX_V2)
23- hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY_V2;
24+#if defined(CONFIG_MEDIATEK_NETSYS_RX_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
25+ hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY_V2;
26 #else
27- hash = trxd.rxd4 & MTK_RXD4_FOE_ENTRY;
28+ hash = trxd.rxd4 & MTK_RXD4_FOE_ENTRY;
29 #endif
30 if (hash != MTK_RXD4_FOE_ENTRY) {
31 hash = jhash_1word(hash, 0);
32 skb_set_hash(skb, hash, PKT_HASH_TYPE_L4);
33 }
34
35-#if defined(CONFIG_MEDIATEK_NETSYS_RX_V2)
36+#if defined(CONFIG_MEDIATEK_NETSYS_RX_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
37 reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON_V2, trxd.rxd5);
38 if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED) {
39 for (i = 0; i < eth->ppe_num; i++) {
developer0aaf79d2023-08-21 14:10:16 +080040@@ -5000,7 +5000,8 @@ static int mtk_probe(struct platform_device *pdev)
developeree39bcf2023-06-16 08:03:30 +080041
42 for (i = 0; i < eth->ppe_num; i++) {
43 eth->ppe[i] = mtk_ppe_init(eth,
44- eth->base + MTK_ETH_PPE_BASE + i * 0x400,
45+ eth->base + MTK_ETH_PPE_BASE +
46+ (i == 2 ? 0xC00 : i * 0x400),
47 2, eth->soc->hash_way, i,
48 eth->soc->has_accounting);
49 if (!eth->ppe[i]) {
developer0aaf79d2023-08-21 14:10:16 +080050@@ -5267,6 +5268,9 @@ static const struct mtk_soc_data mt7988_data = {
developeree39bcf2023-06-16 08:03:30 +080051 .required_clks = MT7988_CLKS_BITMAP,
52 .required_pctl = false,
53 .has_sram = true,
54+ .has_accounting = true,
55+ .hash_way = 4,
56+ .offload_version = 2,
developer0aaf79d2023-08-21 14:10:16 +080057 .rss_num = 4,
developeree39bcf2023-06-16 08:03:30 +080058 .txrx = {
59 .txd_size = sizeof(struct mtk_tx_dma_v2),
developeree39bcf2023-06-16 08:03:30 +080060diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
developer0aaf79d2023-08-21 14:10:16 +080061index 83a5fec..443120f 100644
developeree39bcf2023-06-16 08:03:30 +080062--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
63+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
developer0aaf79d2023-08-21 14:10:16 +080064@@ -130,9 +130,10 @@
developeree39bcf2023-06-16 08:03:30 +080065 #define MTK_GDMA_UCS_EN BIT(20)
66 #define MTK_GDMA_STRP_CRC BIT(16)
67 #define MTK_GDMA_TO_PDMA 0x0
68-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
69+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
70 #define MTK_GDMA_TO_PPE0 0x3333
71 #define MTK_GDMA_TO_PPE1 0x4444
72+#define MTK_GMAC_TO_PPE2 0xcccc
73 #else
developer0aaf79d2023-08-21 14:10:16 +080074 #define MTK_GDMA_TO_PPE0 0x4444
75 #endif
developeree39bcf2023-06-16 08:03:30 +080076diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.c b/drivers/net/ethernet/mediatek/mtk_ppe.c
developer0aaf79d2023-08-21 14:10:16 +080077index ed677e1..4c17a4e 100755
developeree39bcf2023-06-16 08:03:30 +080078--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
79+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
80@@ -211,7 +211,7 @@ int mtk_foe_entry_prepare(struct mtk_foe_entry *entry, int type, int l4proto,
81 MTK_FOE_IB1_BIND_CACHE;
82 entry->ib1 = val;
83
84-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
85+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
86 val = FIELD_PREP(MTK_FOE_IB2_PORT_AG, 0xf) |
87 #else
88 val = FIELD_PREP(MTK_FOE_IB2_PORT_MG, 0x3f) |
89@@ -403,7 +403,7 @@ int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq,
90
91 *ib2 &= ~MTK_FOE_IB2_PORT_MG;
92 *ib2 |= MTK_FOE_IB2_WDMA_WINFO;
93-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
94+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
95 *ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq);
96
97 l2->winfo = FIELD_PREP(MTK_FOE_WINFO_WCID, wcid) |
98@@ -422,11 +422,16 @@ int mtk_foe_entry_set_wdma(struct mtk_foe_entry *entry, int wdma_idx, int txq,
99
100 int mtk_foe_entry_set_qid(struct mtk_foe_entry *entry, int qid)
101 {
102+ struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(entry);
103 u32 *ib2 = mtk_foe_entry_ib2(entry);
104
105 *ib2 &= ~MTK_FOE_IB2_QID;
106 *ib2 |= FIELD_PREP(MTK_FOE_IB2_QID, qid);
107+#if defined(CONFIG_MEDIATEK_NETSYS_V3)
108+ l2->tport_id = 1;
109+#else
110 *ib2 |= MTK_FOE_IB2_PSE_QOS;
111+#endif
112
113 return 0;
114 }
developer0aaf79d2023-08-21 14:10:16 +0800115@@ -902,13 +907,16 @@ int mtk_ppe_start(struct mtk_ppe *ppe)
developeree39bcf2023-06-16 08:03:30 +0800116 mtk_ppe_init_foe_table(ppe);
117 ppe_w32(ppe, MTK_PPE_TB_BASE, ppe->foe_phys);
118
119- val = MTK_PPE_TB_CFG_ENTRY_80B |
120+ val =
121+#if !defined(CONFIG_MEDIATEK_NETSYS_V3)
122+ MTK_PPE_TB_CFG_ENTRY_80B |
123+#endif
124 MTK_PPE_TB_CFG_AGE_NON_L4 |
125 MTK_PPE_TB_CFG_AGE_UNBIND |
126 MTK_PPE_TB_CFG_AGE_TCP |
127 MTK_PPE_TB_CFG_AGE_UDP |
128 MTK_PPE_TB_CFG_AGE_TCP_FIN |
129-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
130+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
131 MTK_PPE_TB_CFG_INFO_SEL |
132 #endif
133 FIELD_PREP(MTK_PPE_TB_CFG_SEARCH_MISS,
developer0aaf79d2023-08-21 14:10:16 +0800134@@ -972,7 +980,7 @@ int mtk_ppe_start(struct mtk_ppe *ppe)
developeree39bcf2023-06-16 08:03:30 +0800135
136 ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT, 0);
137
138-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
139+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
140 ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT1, 0xcb777);
141 ppe_w32(ppe, MTK_PPE_SBW_CTRL, 0x7f);
142 #endif
143diff --git a/drivers/net/ethernet/mediatek/mtk_ppe.h b/drivers/net/ethernet/mediatek/mtk_ppe.h
developer0aaf79d2023-08-21 14:10:16 +0800144index e954e73..4abed85 100644
developeree39bcf2023-06-16 08:03:30 +0800145--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
146+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
147@@ -8,7 +8,10 @@
148 #include <linux/bitfield.h>
149 #include <linux/rhashtable.h>
150
151-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
152+#if defined(CONFIG_MEDIATEK_NETSYS_V3)
153+#define MTK_MAX_PPE_NUM 3
154+#define MTK_ETH_PPE_BASE 0x2000
155+#elif defined(CONFIG_MEDIATEK_NETSYS_V2)
156 #define MTK_MAX_PPE_NUM 2
157 #define MTK_ETH_PPE_BASE 0x2000
158 #else
developer0aaf79d2023-08-21 14:10:16 +0800159@@ -22,7 +25,7 @@
developeree39bcf2023-06-16 08:03:30 +0800160 #define MTK_PPE_WAIT_TIMEOUT_US 1000000
161
162 #define MTK_FOE_IB1_UNBIND_TIMESTAMP GENMASK(7, 0)
163-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
164+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
165 #define MTK_FOE_IB1_UNBIND_SRC_PORT GENMASK(11, 8)
166 #define MTK_FOE_IB1_UNBIND_PACKETS GENMASK(19, 12)
167 #define MTK_FOE_IB1_UNBIND_PREBIND BIT(22)
developer0aaf79d2023-08-21 14:10:16 +0800168@@ -70,7 +73,7 @@ enum {
developeree39bcf2023-06-16 08:03:30 +0800169 MTK_PPE_PKT_TYPE_IPV6_6RD = 7,
170 };
171
172-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
173+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
174 #define MTK_FOE_IB2_QID GENMASK(6, 0)
175 #define MTK_FOE_IB2_PORT_MG BIT(7)
176 #define MTK_FOE_IB2_PSE_QOS BIT(8)
developer0aaf79d2023-08-21 14:10:16 +0800177@@ -98,7 +101,18 @@ enum {
developeree39bcf2023-06-16 08:03:30 +0800178
179 #define MTK_FOE_IB2_DSCP GENMASK(31, 24)
180
181-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
182+#if defined(CONFIG_MEDIATEK_NETSYS_V3)
183+#define MTK_FOE_WINFO_WCID GENMASK(15, 0)
184+#define MTK_FOE_WINFO_BSS GENMASK(23, 16)
185+
186+#define MTK_FOE_WINFO_PAO_USR_INFO GENMASK(15, 0)
187+#define MTK_FOE_WINFO_PAO_TID GENMASK(19, 16)
188+#define MTK_FOE_WINFO_PAO_IS_FIXEDRATE BIT(20)
189+#define MTK_FOE_WINFO_PAO_IS_PRIOR BIT(21)
190+#define MTK_FOE_WINFO_PAO_IS_SP BIT(22)
191+#define MTK_FOE_WINFO_PAO_HF BIT(23)
192+#define MTK_FOE_WINFO_PAO_AMSDU_EN BIT(24)
193+#elif defined(CONFIG_MEDIATEK_NETSYS_V2)
194 #define MTK_FOE_WINFO_BSS GENMASK(5, 0)
195 #define MTK_FOE_WINFO_WCID GENMASK(15, 6)
196 #else
developer0aaf79d2023-08-21 14:10:16 +0800197@@ -128,7 +142,17 @@ struct mtk_foe_mac_info {
developeree39bcf2023-06-16 08:03:30 +0800198 u16 pppoe_id;
199 u16 src_mac_lo;
200
201-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
202+#if defined(CONFIG_MEDIATEK_NETSYS_V3)
203+ u16 minfo;
204+ u16 resv1;
205+ u32 winfo;
206+ u32 winfo_pao;
207+ u16 cdrt_id:8;
208+ u16 tops_entry:6;
209+ u16 resv3:2;
210+ u16 tport_id:4;
211+ u16 resv4:12;
212+#elif defined(CONFIG_MEDIATEK_NETSYS_V2)
213 u16 minfo;
214 u16 winfo;
215 #endif
developer0aaf79d2023-08-21 14:10:16 +0800216@@ -249,7 +273,9 @@ struct mtk_foe_entry {
developeree39bcf2023-06-16 08:03:30 +0800217 struct mtk_foe_ipv4_dslite dslite;
218 struct mtk_foe_ipv6 ipv6;
219 struct mtk_foe_ipv6_6rd ipv6_6rd;
220-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
221+#if defined(CONFIG_MEDIATEK_NETSYS_V3)
222+ u32 data[31];
223+#elif defined(CONFIG_MEDIATEK_NETSYS_V2)
224 u32 data[23];
225 #else
226 u32 data[19];
developer0aaf79d2023-08-21 14:10:16 +0800227@@ -411,7 +437,7 @@ int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
228 struct mtk_foe_accounting *mtk_foe_entry_get_mib(struct mtk_ppe *ppe, u32 index, struct mtk_foe_accounting *diff);
229 u32 mtk_ppe_hash_entry(struct mtk_ppe *ppe, struct mtk_foe_entry *e);
230
231-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
232+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
233 static inline int
234 mtk_foe_entry_set_sp(struct mtk_ppe *ppe, struct mtk_foe_entry *entry)
235 {
developeree39bcf2023-06-16 08:03:30 +0800236diff --git a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
developer0aaf79d2023-08-21 14:10:16 +0800237index 1d56e2c..8cd8dc7 100755
developeree39bcf2023-06-16 08:03:30 +0800238--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
239+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
240@@ -195,7 +195,7 @@ mtk_flow_set_output_device(struct mtk_eth *eth, struct mtk_foe_entry *foe,
241 mtk_foe_entry_set_wdma(foe, info.wdma_idx, info.queue, info.bss,
242 info.wcid);
243 pse_port = PSE_PPE0_PORT;
244-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
245+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
246 if (info.wdma_idx == 0)
247 pse_port = PSE_WDMA0_PORT;
248 else if (info.wdma_idx == 1)
developer0aaf79d2023-08-21 14:10:16 +0800249@@ -218,6 +218,8 @@ mtk_flow_set_output_device(struct mtk_eth *eth, struct mtk_foe_entry *foe,
developeree39bcf2023-06-16 08:03:30 +0800250 pse_port = PSE_GDM1_PORT;
251 else if (dev == eth->netdev[1])
252 pse_port = PSE_GDM2_PORT;
253+ else if (dev == eth->netdev[2])
254+ pse_port = PSE_GDM3_PORT;
255 else
256 return -EOPNOTSUPP;
257
developer0aaf79d2023-08-21 14:10:16 +0800258@@ -376,7 +378,7 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f)
259 if (err)
260 return err;
developeree39bcf2023-06-16 08:03:30 +0800261
developeree39bcf2023-06-16 08:03:30 +0800262-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
263+#if defined(CONFIG_MEDIATEK_NETSYS_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)
264 if (idev && idev->netdev_ops->ndo_fill_receive_path) {
265 ctx.dev = idev;
266 idev->netdev_ops->ndo_fill_receive_path(&ctx, &path);
developer0aaf79d2023-08-21 14:10:16 +0800267--
2682.18.0
269