developer | 064da3c | 2023-06-13 15:57:26 +0800 | [diff] [blame] | 1 | From 20c8d7bfeb91be51129e7e98213db441a62d6d95 Mon Sep 17 00:00:00 2001 |
| 2 | From: Peter Chiu <chui-hao.chiu@mediatek.com> |
| 3 | Date: Wed, 31 May 2023 18:31:41 +0800 |
| 4 | Subject: [PATCH 03/11] wifi: mt76: connac: add support for dsp firmware |
| 5 | download |
| 6 | |
| 7 | Add FW_START_WORKING_PDA_DSP for the indication of starting DSP |
| 8 | firmware download, which is for phy-related control. |
| 9 | The firmware is transparent to the driver, but it's necessary for the |
| 10 | firmware download process. |
| 11 | |
| 12 | Reviewed-by: Shayne Chen <shayne.chen@mediatek.com> |
| 13 | Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com> |
| 14 | Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> |
| 15 | Change-Id: I35666504cfe7bf213c8f8f0c0223b3089372f2ab |
| 16 | --- |
| 17 | v2: |
| 18 | - merge two commits |
| 19 | - move main load ram code to a regular function |
| 20 | v3: |
| 21 | - remove all macros to directly call __mt7996_load_ram() |
| 22 | - add back missing code which records fw_version to wiphy |
| 23 | --- |
| 24 | mt76_connac_mcu.h | 1 + |
| 25 | mt7996/mcu.c | 67 +++++++++++++++++++++++------------------------ |
| 26 | mt7996/mt7996.h | 7 +++++ |
| 27 | mt7996/pci.c | 1 + |
| 28 | 4 files changed, 42 insertions(+), 34 deletions(-) |
| 29 | |
| 30 | diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h |
| 31 | index 91d98eff..d2a3d56b 100644 |
| 32 | --- a/mt76_connac_mcu.h |
| 33 | +++ b/mt76_connac_mcu.h |
| 34 | @@ -22,6 +22,7 @@ |
| 35 | |
| 36 | #define FW_START_OVERRIDE BIT(0) |
| 37 | #define FW_START_WORKING_PDA_CR4 BIT(2) |
| 38 | +#define FW_START_WORKING_PDA_DSP BIT(3) |
| 39 | |
| 40 | #define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0) |
| 41 | #define PATCH_SEC_TYPE_MASK GENMASK(15, 0) |
| 42 | diff --git a/mt7996/mcu.c b/mt7996/mcu.c |
| 43 | index 88e2f9d0..545cc987 100644 |
| 44 | --- a/mt7996/mcu.c |
| 45 | +++ b/mt7996/mcu.c |
| 46 | @@ -2155,7 +2155,7 @@ out: |
| 47 | static int |
| 48 | mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev, |
| 49 | const struct mt7996_fw_trailer *hdr, |
| 50 | - const u8 *data, bool is_wa) |
| 51 | + const u8 *data, enum mt7996_ram_type type) |
| 52 | { |
| 53 | int i, offset = 0; |
| 54 | u32 override = 0, option = 0; |
| 55 | @@ -2167,8 +2167,10 @@ mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev, |
| 56 | |
| 57 | region = (const struct mt7996_fw_region *)((const u8 *)hdr - |
| 58 | (hdr->n_region - i) * sizeof(*region)); |
| 59 | + /* DSP and WA use same mode */ |
| 60 | mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, |
| 61 | - region->feature_set, is_wa); |
| 62 | + region->feature_set, |
| 63 | + type != MT7996_RAM_TYPE_WM); |
| 64 | len = le32_to_cpu(region->len); |
| 65 | addr = le32_to_cpu(region->addr); |
| 66 | |
| 67 | @@ -2195,19 +2197,22 @@ mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev, |
| 68 | if (override) |
| 69 | option |= FW_START_OVERRIDE; |
| 70 | |
| 71 | - if (is_wa) |
| 72 | + if (type == MT7996_RAM_TYPE_WA) |
| 73 | option |= FW_START_WORKING_PDA_CR4; |
| 74 | + else if (type == MT7996_RAM_TYPE_DSP) |
| 75 | + option |= FW_START_WORKING_PDA_DSP; |
| 76 | |
| 77 | return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); |
| 78 | } |
| 79 | |
| 80 | -static int mt7996_load_ram(struct mt7996_dev *dev) |
| 81 | +static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type, |
| 82 | + const char *fw_file, enum mt7996_ram_type ram_type) |
| 83 | { |
| 84 | const struct mt7996_fw_trailer *hdr; |
| 85 | const struct firmware *fw; |
| 86 | int ret; |
| 87 | |
| 88 | - ret = request_firmware(&fw, MT7996_FIRMWARE_WM, dev->mt76.dev); |
| 89 | + ret = request_firmware(&fw, fw_file, dev->mt76.dev); |
| 90 | if (ret) |
| 91 | return ret; |
| 92 | |
| 93 | @@ -2217,37 +2222,13 @@ static int mt7996_load_ram(struct mt7996_dev *dev) |
| 94 | goto out; |
| 95 | } |
| 96 | |
| 97 | - hdr = (const struct mt7996_fw_trailer *)(fw->data + fw->size - sizeof(*hdr)); |
| 98 | - |
| 99 | - dev_info(dev->mt76.dev, "WM Firmware Version: %.10s, Build Time: %.15s\n", |
| 100 | - hdr->fw_ver, hdr->build_date); |
| 101 | + hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); |
| 102 | + dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n", |
| 103 | + fw_type, hdr->fw_ver, hdr->build_date); |
| 104 | |
| 105 | - ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, false); |
| 106 | + ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type); |
| 107 | if (ret) { |
| 108 | - dev_err(dev->mt76.dev, "Failed to start WM firmware\n"); |
| 109 | - goto out; |
| 110 | - } |
| 111 | - |
| 112 | - release_firmware(fw); |
| 113 | - |
| 114 | - ret = request_firmware(&fw, MT7996_FIRMWARE_WA, dev->mt76.dev); |
| 115 | - if (ret) |
| 116 | - return ret; |
| 117 | - |
| 118 | - if (!fw || !fw->data || fw->size < sizeof(*hdr)) { |
| 119 | - dev_err(dev->mt76.dev, "Invalid firmware\n"); |
| 120 | - ret = -EINVAL; |
| 121 | - goto out; |
| 122 | - } |
| 123 | - |
| 124 | - hdr = (const struct mt7996_fw_trailer *)(fw->data + fw->size - sizeof(*hdr)); |
| 125 | - |
| 126 | - dev_info(dev->mt76.dev, "WA Firmware Version: %.10s, Build Time: %.15s\n", |
| 127 | - hdr->fw_ver, hdr->build_date); |
| 128 | - |
| 129 | - ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, true); |
| 130 | - if (ret) { |
| 131 | - dev_err(dev->mt76.dev, "Failed to start WA firmware\n"); |
| 132 | + dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type); |
| 133 | goto out; |
| 134 | } |
| 135 | |
| 136 | @@ -2261,6 +2242,24 @@ out: |
| 137 | return ret; |
| 138 | } |
| 139 | |
| 140 | +static int mt7996_load_ram(struct mt7996_dev *dev) |
| 141 | +{ |
| 142 | + int ret; |
| 143 | + |
| 144 | + ret = __mt7996_load_ram(dev, "WM", MT7996_FIRMWARE_WM, |
| 145 | + MT7996_RAM_TYPE_WM); |
| 146 | + if (ret) |
| 147 | + return ret; |
| 148 | + |
| 149 | + ret = __mt7996_load_ram(dev, "DSP", MT7996_FIRMWARE_DSP, |
| 150 | + MT7996_RAM_TYPE_DSP); |
| 151 | + if (ret) |
| 152 | + return ret; |
| 153 | + |
| 154 | + return __mt7996_load_ram(dev, "WA", MT7996_FIRMWARE_WA, |
| 155 | + MT7996_RAM_TYPE_WA); |
| 156 | +} |
| 157 | + |
| 158 | static int |
| 159 | mt7996_firmware_state(struct mt7996_dev *dev, bool wa) |
| 160 | { |
| 161 | diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h |
| 162 | index 4d7dcb95..7dfdc738 100644 |
| 163 | --- a/mt7996/mt7996.h |
| 164 | +++ b/mt7996/mt7996.h |
| 165 | @@ -29,6 +29,7 @@ |
| 166 | |
| 167 | #define MT7996_FIRMWARE_WA "mediatek/mt7996/mt7996_wa.bin" |
| 168 | #define MT7996_FIRMWARE_WM "mediatek/mt7996/mt7996_wm.bin" |
| 169 | +#define MT7996_FIRMWARE_DSP "mediatek/mt7996/mt7996_dsp.bin" |
| 170 | #define MT7996_ROM_PATCH "mediatek/mt7996/mt7996_rom_patch.bin" |
| 171 | |
| 172 | #define MT7996_EEPROM_DEFAULT "mediatek/mt7996/mt7996_eeprom.bin" |
| 173 | @@ -52,6 +53,12 @@ struct mt7996_sta; |
| 174 | struct mt7996_dfs_pulse; |
| 175 | struct mt7996_dfs_pattern; |
| 176 | |
| 177 | +enum mt7996_ram_type { |
| 178 | + MT7996_RAM_TYPE_WM, |
| 179 | + MT7996_RAM_TYPE_WA, |
| 180 | + MT7996_RAM_TYPE_DSP, |
| 181 | +}; |
| 182 | + |
| 183 | enum mt7996_txq_id { |
| 184 | MT7996_TXQ_FWDL = 16, |
| 185 | MT7996_TXQ_MCU_WM, |
| 186 | diff --git a/mt7996/pci.c b/mt7996/pci.c |
| 187 | index 64aee3fb..c5301050 100644 |
| 188 | --- a/mt7996/pci.c |
| 189 | +++ b/mt7996/pci.c |
| 190 | @@ -219,4 +219,5 @@ MODULE_DEVICE_TABLE(pci, mt7996_pci_device_table); |
| 191 | MODULE_DEVICE_TABLE(pci, mt7996_hif_device_table); |
| 192 | MODULE_FIRMWARE(MT7996_FIRMWARE_WA); |
| 193 | MODULE_FIRMWARE(MT7996_FIRMWARE_WM); |
| 194 | +MODULE_FIRMWARE(MT7996_FIRMWARE_DSP); |
| 195 | MODULE_FIRMWARE(MT7996_ROM_PATCH); |
| 196 | -- |
| 197 | 2.39.2 |
| 198 | |