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developer0443cd32023-09-19 14:11:49 +08001From 5b47f914de6c0fb2d4a8494bb4c05a6f7d729135 Mon Sep 17 00:00:00 2001
developerbbd45e12023-05-19 08:22:06 +08002From: Evelyn Tsai <evelyn.tsai@mediatek.com>
3Date: Thu, 18 May 2023 18:11:37 +0800
developer0443cd32023-09-19 14:11:49 +08004Subject: [PATCH 1/7] wifi: mt76: fix incorrect HE TX GI report
developer1557f6c2023-04-13 18:48:23 +08005
6Change GI reporting source from static capability to rate-tuning module.
7
8Signed-off-by: Benjamin Lin <benjamin-jw.lin@mediatek.com>
9---
10 mt76.h | 4 ++
11 mt7915/init.c | 4 ++
developer2157bf82023-06-26 02:27:49 +080012 mt7915/mac.c | 64 ++++++++++++-------
developer22eedcc2023-05-03 22:59:35 +080013 mt7915/main.c | 7 +++
14 mt7915/mcu.c | 161 ++++++++++++++++++++++++++++++++++++++++++++++++
15 mt7915/mcu.h | 58 +++++++++++++++++
developer663dccd2023-04-28 11:35:16 +080016 mt7915/mt7915.h | 6 ++
developer2157bf82023-06-26 02:27:49 +080017 7 files changed, 282 insertions(+), 22 deletions(-)
developer1557f6c2023-04-13 18:48:23 +080018
19diff --git a/mt76.h b/mt76.h
developer0443cd32023-09-19 14:11:49 +080020index a238216..0609b4a 100644
developer1557f6c2023-04-13 18:48:23 +080021--- a/mt76.h
22+++ b/mt76.h
23@@ -254,12 +254,16 @@ struct mt76_queue_ops {
24 void (*reset_q)(struct mt76_dev *dev, struct mt76_queue *q);
25 };
26
27+#define MT_PHY_TYPE_LEGACY GENMASK(2, 0)
28+#define MT_PHY_TYPE_EXT GENMASK(7, 3)
29+
30 enum mt76_phy_type {
31 MT_PHY_TYPE_CCK,
32 MT_PHY_TYPE_OFDM,
33 MT_PHY_TYPE_HT,
34 MT_PHY_TYPE_HT_GF,
35 MT_PHY_TYPE_VHT,
36+ MT_PHY_TYPE_HE_REMAP,
37 MT_PHY_TYPE_HE_SU = 8,
38 MT_PHY_TYPE_HE_EXT_SU,
39 MT_PHY_TYPE_HE_TB,
40diff --git a/mt7915/init.c b/mt7915/init.c
developer0443cd32023-09-19 14:11:49 +080041index 9312c35..c1f234e 100644
developer1557f6c2023-04-13 18:48:23 +080042--- a/mt7915/init.c
43+++ b/mt7915/init.c
developer0443cd32023-09-19 14:11:49 +080044@@ -660,6 +660,8 @@ mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy)
developer1557f6c2023-04-13 18:48:23 +080045 struct mt76_phy *mphy = phy->mt76;
46 int ret;
47
48+ INIT_LIST_HEAD(&phy->stats_list);
49+ spin_lock_init(&phy->stats_lock);
50 INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work);
51
52 mt7915_eeprom_parse_hw_cap(dev, phy);
developer0443cd32023-09-19 14:11:49 +080053@@ -1192,6 +1194,8 @@ int mt7915_register_device(struct mt7915_dev *dev)
developer1557f6c2023-04-13 18:48:23 +080054 dev->phy.dev = dev;
55 dev->phy.mt76 = &dev->mt76.phy;
56 dev->mt76.phy.priv = &dev->phy;
57+ INIT_LIST_HEAD(&dev->phy.stats_list);
58+ spin_lock_init(&dev->phy.stats_lock);
59 INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work);
60 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work);
61 INIT_LIST_HEAD(&dev->sta_rc_list);
62diff --git a/mt7915/mac.c b/mt7915/mac.c
developer0443cd32023-09-19 14:11:49 +080063index 2222fb9..99a770e 100644
developer1557f6c2023-04-13 18:48:23 +080064--- a/mt7915/mac.c
65+++ b/mt7915/mac.c
developerbbd45e12023-05-19 08:22:06 +080066@@ -173,15 +173,7 @@ static void mt7915_mac_sta_poll(struct mt7915_dev *dev)
developer1557f6c2023-04-13 18:48:23 +080067 rx_cur);
68 }
69
70- /*
71- * We don't support reading GI info from txs packets.
72- * For accurate tx status reporting and AQL improvement,
73- * we need to make sure that flags match so polling GI
74- * from per-sta counters directly.
75- */
76 rate = &msta->wcid.rate;
77- addr = mt7915_mac_wtbl_lmac_addr(dev, idx, 7);
78- val = mt76_rr(dev, addr);
79
80 switch (rate->bw) {
81 case RATE_INFO_BW_160:
developerbbd45e12023-05-19 08:22:06 +080082@@ -198,18 +190,6 @@ static void mt7915_mac_sta_poll(struct mt7915_dev *dev)
developer1557f6c2023-04-13 18:48:23 +080083 break;
84 }
85
86- if (rate->flags & RATE_INFO_FLAGS_HE_MCS) {
87- u8 offs = 24 + 2 * bw;
88-
89- rate->he_gi = (val & (0x3 << offs)) >> offs;
90- } else if (rate->flags &
91- (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) {
92- if (val & BIT(12 + bw))
93- rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
94- else
95- rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI;
96- }
97-
98 /* get signal strength of resp frames (CTS/BA/ACK) */
99 addr = mt7915_mac_wtbl_lmac_addr(dev, idx, 30);
100 val = mt76_rr(dev, addr);
developer2157bf82023-06-26 02:27:49 +0800101@@ -911,6 +891,7 @@ mt7915_mac_tx_free(struct mt7915_dev *dev, void *data, int len)
102 info = le32_to_cpu(*cur_info);
developer1557f6c2023-04-13 18:48:23 +0800103 if (info & MT_TX_FREE_PAIR) {
104 struct mt7915_sta *msta;
developer1557f6c2023-04-13 18:48:23 +0800105+ struct mt7915_phy *phy;
106 u16 idx;
107
108 idx = FIELD_GET(MT_TX_FREE_WLAN_ID, info);
developer2157bf82023-06-26 02:27:49 +0800109@@ -920,11 +901,18 @@ mt7915_mac_tx_free(struct mt7915_dev *dev, void *data, int len)
developer1557f6c2023-04-13 18:48:23 +0800110 continue;
111
112 msta = container_of(wcid, struct mt7915_sta, wcid);
developer2157bf82023-06-26 02:27:49 +0800113- spin_lock_bh(&mdev->sta_poll_lock);
developer1557f6c2023-04-13 18:48:23 +0800114+ phy = msta->vif->phy;
developer2157bf82023-06-26 02:27:49 +0800115+ spin_lock_bh(&dev->mt76.sta_poll_lock);
116 if (list_empty(&msta->wcid.poll_list))
117 list_add_tail(&msta->wcid.poll_list,
118 &mdev->sta_poll_list);
119- spin_unlock_bh(&mdev->sta_poll_lock);
120+ spin_unlock_bh(&dev->mt76.sta_poll_lock);
developer1557f6c2023-04-13 18:48:23 +0800121+
122+ spin_lock_bh(&phy->stats_lock);
123+ if (list_empty(&msta->stats_list))
124+ list_add_tail(&msta->stats_list, &phy->stats_list);
125+ spin_unlock_bh(&phy->stats_lock);
126+
127 continue;
128 }
129
developer2157bf82023-06-26 02:27:49 +0800130@@ -1003,6 +991,7 @@ mt7915_mac_tx_free_v0(struct mt7915_dev *dev, void *data, int len)
developer663dccd2023-04-28 11:35:16 +0800131 static void mt7915_mac_add_txs(struct mt7915_dev *dev, void *data)
132 {
133 struct mt7915_sta *msta = NULL;
134+ struct mt7915_phy *phy;
135 struct mt76_wcid *wcid;
136 __le32 *txs_data = data;
137 u16 wcidx;
developer2157bf82023-06-26 02:27:49 +0800138@@ -1038,6 +1027,11 @@ static void mt7915_mac_add_txs(struct mt7915_dev *dev, void *data)
139 list_add_tail(&msta->wcid.poll_list, &dev->mt76.sta_poll_list);
140 spin_unlock_bh(&dev->mt76.sta_poll_lock);
developer663dccd2023-04-28 11:35:16 +0800141
142+ phy = msta->vif->phy;
143+ spin_lock_bh(&phy->stats_lock);
144+ if (list_empty(&msta->stats_list))
145+ list_add_tail(&msta->stats_list, &phy->stats_list);
146+ spin_unlock_bh(&phy->stats_lock);
147 out:
148 rcu_read_unlock();
149 }
developer2157bf82023-06-26 02:27:49 +0800150@@ -1950,6 +1944,27 @@ static void mt7915_mac_severe_check(struct mt7915_phy *phy)
developer1557f6c2023-04-13 18:48:23 +0800151 phy->trb_ts = trb;
152 }
153
154+static void mt7915_mac_sta_stats_work(struct mt7915_phy *phy)
155+{
156+ struct mt7915_sta *sta;
157+ LIST_HEAD(list);
158+
159+ spin_lock_bh(&phy->stats_lock);
160+ list_splice_init(&phy->stats_list, &list);
161+
162+ while (!list_empty(&list)) {
163+ sta = list_first_entry(&list, struct mt7915_sta, stats_list);
164+ list_del_init(&sta->stats_list);
165+ spin_unlock_bh(&phy->stats_lock);
166+
167+ mt7915_mcu_get_tx_rate(phy, sta->wcid.idx);
168+
169+ spin_lock_bh(&phy->stats_lock);
170+ }
171+
172+ spin_unlock_bh(&phy->stats_lock);
173+}
174+
175 void mt7915_mac_sta_rc_work(struct work_struct *work)
176 {
177 struct mt7915_dev *dev = container_of(work, struct mt7915_dev, rc_work);
developer2157bf82023-06-26 02:27:49 +0800178@@ -2008,6 +2023,11 @@ void mt7915_mac_work(struct work_struct *work)
179 mt7915_mcu_muru_debug_get(phy);
developer1557f6c2023-04-13 18:48:23 +0800180 }
181
182+ if (++phy->stats_work_count == 10) {
183+ phy->stats_work_count = 0;
184+ mt7915_mac_sta_stats_work(phy);
185+ }
186+
187 mutex_unlock(&mphy->dev->mutex);
188
189 mt76_tx_status_check(mphy->dev, false);
190diff --git a/mt7915/main.c b/mt7915/main.c
developer0443cd32023-09-19 14:11:49 +0800191index a3fd54c..449c2ee 100644
developer1557f6c2023-04-13 18:48:23 +0800192--- a/mt7915/main.c
193+++ b/mt7915/main.c
developer0443cd32023-09-19 14:11:49 +0800194@@ -751,6 +751,7 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
developer1557f6c2023-04-13 18:48:23 +0800195
196 INIT_LIST_HEAD(&msta->rc_list);
developer2157bf82023-06-26 02:27:49 +0800197 INIT_LIST_HEAD(&msta->wcid.poll_list);
developer1557f6c2023-04-13 18:48:23 +0800198+ INIT_LIST_HEAD(&msta->stats_list);
199 msta->vif = mvif;
200 msta->wcid.sta = 1;
201 msta->wcid.idx = idx;
developer0443cd32023-09-19 14:11:49 +0800202@@ -775,6 +776,7 @@ void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
developer1557f6c2023-04-13 18:48:23 +0800203 {
204 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);
205 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
206+ struct mt7915_phy *phy = msta->vif->phy;
207 int i;
208
209 mt7915_mcu_add_sta(dev, vif, sta, false);
developer0443cd32023-09-19 14:11:49 +0800210@@ -791,6 +793,11 @@ void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
developer1557f6c2023-04-13 18:48:23 +0800211 if (!list_empty(&msta->rc_list))
212 list_del_init(&msta->rc_list);
developer2157bf82023-06-26 02:27:49 +0800213 spin_unlock_bh(&mdev->sta_poll_lock);
developer1557f6c2023-04-13 18:48:23 +0800214+
215+ spin_lock_bh(&phy->stats_lock);
216+ if (!list_empty(&msta->stats_list))
217+ list_del_init(&msta->stats_list);
218+ spin_unlock_bh(&phy->stats_lock);
219 }
220
221 static void mt7915_tx(struct ieee80211_hw *hw,
222diff --git a/mt7915/mcu.c b/mt7915/mcu.c
developer0443cd32023-09-19 14:11:49 +0800223index b6fba1a..9996c08 100644
developer1557f6c2023-04-13 18:48:23 +0800224--- a/mt7915/mcu.c
225+++ b/mt7915/mcu.c
developer0443cd32023-09-19 14:11:49 +0800226@@ -3723,6 +3723,167 @@ out:
developer1557f6c2023-04-13 18:48:23 +0800227 return ret;
228 }
229
230+static int
developer663dccd2023-04-28 11:35:16 +0800231+mt7915_mcu_parse_tx_gi(struct mt76_dev *dev, u8 mode, u8 gi, u8 bw,
232+ struct rate_info *rate)
developer1557f6c2023-04-13 18:48:23 +0800233+{
developer1557f6c2023-04-13 18:48:23 +0800234+ /* Legacy drivers only use 3 bits for PHY mode. For backward
235+ * compatibility, HE and newer PHY mode indices are remapped
236+ * to the extended bits.
237+ */
238+ if (u8_get_bits(mode, MT_PHY_TYPE_LEGACY) == MT_PHY_TYPE_HE_REMAP)
239+ mode = u8_get_bits(mode, MT_PHY_TYPE_EXT);
240+
241+ switch (mode) {
242+ case MT_PHY_TYPE_CCK:
243+ case MT_PHY_TYPE_OFDM:
244+ break;
245+ case MT_PHY_TYPE_HT:
246+ case MT_PHY_TYPE_HT_GF:
247+ case MT_PHY_TYPE_VHT:
248+ if (gi)
249+ rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
250+ break;
251+ case MT_PHY_TYPE_HE_SU:
252+ case MT_PHY_TYPE_HE_EXT_SU:
253+ case MT_PHY_TYPE_HE_TB:
254+ case MT_PHY_TYPE_HE_MU:
developer663dccd2023-04-28 11:35:16 +0800255+ if (!is_mt7915(dev)) {
256+ switch (bw) {
257+ case MCU_PHY_BW_20:
258+ gi = u8_get_bits(gi, HE_GI_BW_20);
259+ break;
260+ case MCU_PHY_BW_40:
261+ gi = u8_get_bits(gi, HE_GI_BW_40);
262+ break;
263+ case MCU_PHY_BW_80:
264+ gi = u8_get_bits(gi, HE_GI_BW_80);
265+ break;
266+ case MCU_PHY_BW_160:
267+ gi = u8_get_bits(gi, HE_GI_BW_160);
268+ break;
269+ default:
270+ return -EINVAL;
271+ }
developer1557f6c2023-04-13 18:48:23 +0800272+ }
273+
274+ if (gi > NL80211_RATE_INFO_HE_GI_3_2)
275+ return -EINVAL;
276+
277+ rate->he_gi = gi;
278+ break;
279+ default:
280+ return -EINVAL;
281+ }
282+
283+ return 0;
284+}
285+
developer663dccd2023-04-28 11:35:16 +0800286+int mt7915_mcu_get_tx_rate_v1(struct mt7915_phy *phy, u16 wcidx)
developer1557f6c2023-04-13 18:48:23 +0800287+{
developer663dccd2023-04-28 11:35:16 +0800288+ struct mt7915_mcu_ra_info_v1 *rate;
developer1557f6c2023-04-13 18:48:23 +0800289+ struct mt7915_dev *dev = phy->dev;
290+ struct mt76_phy *mphy = phy->mt76;
developer1557f6c2023-04-13 18:48:23 +0800291+ struct mt76_wcid *wcid;
292+ struct sk_buff *skb;
293+ int ret;
294+
295+ struct {
developer663dccd2023-04-28 11:35:16 +0800296+ __le32 category;
297+ u8 wcidx_lo;
298+ u8 band;
299+ u8 wcidx_hi;
300+ u8 rsv[5];
301+ } req = {
302+ .category = cpu_to_le32(MCU_GET_TX_RATE),
303+ .wcidx_lo = to_wcid_lo(wcidx),
304+ .band = mphy->band_idx,
305+ .wcidx_hi = to_wcid_hi(wcidx)
306+ };
307+
308+ ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(GET_TX_STAT),
309+ &req, sizeof(req), true, &skb);
310+ if (ret)
311+ return ret;
312+
313+ rate = (struct mt7915_mcu_ra_info_v1 *)skb->data;
314+ if ((rate->wcidx_hi << 8 | rate->wcidx_lo) != wcidx) {
315+ ret = -EINVAL;
316+ goto out;
317+ }
318+
319+ rcu_read_lock();
320+ wcid = rcu_dereference(dev->mt76.wcid[wcidx]);
321+ if (!wcid) {
322+ ret = -EINVAL;
323+ goto unlock;
324+ }
325+
326+ ret = mt7915_mcu_parse_tx_gi(mphy->dev, rate->mode, rate->gi,
327+ rate->bw, &wcid->rate);
developer663dccd2023-04-28 11:35:16 +0800328+unlock:
329+ rcu_read_unlock();
330+out:
331+ dev_kfree_skb(skb);
332+
333+ return ret;
334+}
335+
336+int mt7915_mcu_get_tx_rate_v2(struct mt7915_phy *phy, u16 wcidx)
337+{
developer663dccd2023-04-28 11:35:16 +0800338+ struct mt7915_mcu_ra_info_v2 *rate;
339+ struct mt7915_dev *dev = phy->dev;
340+ struct mt76_phy *mphy = phy->mt76;
341+ struct mt76_wcid *wcid;
342+ struct sk_buff *skb;
343+ int ret;
344+
345+ struct {
developer1557f6c2023-04-13 18:48:23 +0800346+ u8 category;
347+ u8 band;
348+ __le16 wcidx;
349+ } req = {
350+ .category = MCU_GET_TX_RATE,
351+ .band = mphy->band_idx,
352+ .wcidx = cpu_to_le16(wcidx)
353+ };
354+
355+ ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(GET_TX_STAT),
356+ &req, sizeof(req), true, &skb);
357+ if (ret)
358+ return ret;
359+
developer663dccd2023-04-28 11:35:16 +0800360+ rate = (struct mt7915_mcu_ra_info_v2 *)skb->data;
developer1557f6c2023-04-13 18:48:23 +0800361+ if (le16_to_cpu(rate->wcidx) != wcidx) {
362+ ret = -EINVAL;
363+ goto out;
364+ }
365+
366+ rcu_read_lock();
367+ wcid = rcu_dereference(dev->mt76.wcid[wcidx]);
368+ if (!wcid) {
369+ ret = -EINVAL;
370+ goto unlock;
371+ }
372+
developer663dccd2023-04-28 11:35:16 +0800373+ ret = mt7915_mcu_parse_tx_gi(mphy->dev, rate->mode, rate->gi,
374+ rate->bw, &wcid->rate);
developer1557f6c2023-04-13 18:48:23 +0800375+unlock:
376+ rcu_read_unlock();
377+out:
378+ dev_kfree_skb(skb);
379+
380+ return ret;
381+}
382+
developer663dccd2023-04-28 11:35:16 +0800383+int mt7915_mcu_get_tx_rate(struct mt7915_phy *phy, u16 wcidx)
384+{
385+ if (is_mt7915(&phy->dev->mt76))
386+ return mt7915_mcu_get_tx_rate_v1(phy, wcidx);
387+ else
388+ return mt7915_mcu_get_tx_rate_v2(phy, wcidx);
389+}
390+
developer1557f6c2023-04-13 18:48:23 +0800391 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,
392 struct cfg80211_he_bss_color *he_bss_color)
393 {
394diff --git a/mt7915/mcu.h b/mt7915/mcu.h
developer0443cd32023-09-19 14:11:49 +0800395index 1592b5d..aebacc7 100644
developer1557f6c2023-04-13 18:48:23 +0800396--- a/mt7915/mcu.h
397+++ b/mt7915/mcu.h
developer663dccd2023-04-28 11:35:16 +0800398@@ -152,6 +152,61 @@ struct mt7915_mcu_eeprom_info {
developer1557f6c2023-04-13 18:48:23 +0800399 u8 data[16];
400 } __packed;
401
402+enum {
403+ MCU_PHY_BW_20 = 0,
404+ MCU_PHY_BW_40,
405+ MCU_PHY_BW_80,
406+ MCU_PHY_BW_160,
407+ MCU_PHY_BW_10,
408+ MCU_PHY_BW_5,
409+ MCU_PHY_BW_8080,
410+ MCU_PHY_BW_320,
411+ MCU_PHY_BW_NUM
412+};
413+
414+#define HE_GI_BW_20 GENMASK(1, 0)
415+#define HE_GI_BW_40 GENMASK(3, 2)
416+#define HE_GI_BW_80 GENMASK(5, 4)
417+#define HE_GI_BW_160 GENMASK(7, 6)
418+
developer663dccd2023-04-28 11:35:16 +0800419+struct mt7915_mcu_ra_info_v1 {
420+ u8 wcidx_lo;
421+ u8 band;
422+ u8 wcidx_hi;
423+ u8 rsv1[46];
424+
425+ u8 mode;
426+ u8 flags;
427+ u8 stbc;
428+ u8 gi;
429+ u8 bw;
430+ u8 ldpc;
431+ u8 mcs;
432+ u8 nss;
433+ u8 ltf;
434+
435+ u8 rsv2[8];
436+};
437+
438+struct mt7915_mcu_ra_info_v2 {
developer1557f6c2023-04-13 18:48:23 +0800439+ u8 category;
440+ u8 rsv1;
441+ __le16 num;
442+ __le16 wcidx;
443+
444+ u8 mode;
445+ u8 flags;
446+ u8 stbc;
447+ u8 gi;
448+ u8 bw;
449+ u8 ldpc;
450+ u8 mcs;
451+ u8 nss;
452+ u8 ltf;
453+
454+ u8 rsv2;
455+};
456+
457 struct mt7915_mcu_phy_rx_info {
458 u8 category;
459 u8 rate;
developer663dccd2023-04-28 11:35:16 +0800460@@ -527,4 +582,7 @@ mt7915_get_power_bound(struct mt7915_phy *phy, s8 txpower)
developer1557f6c2023-04-13 18:48:23 +0800461 return txpower;
462 }
463
464+enum {
465+ MCU_GET_TX_RATE = 4
466+};
467 #endif
468diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developer0443cd32023-09-19 14:11:49 +0800469index d317c52..900ba09 100644
developer1557f6c2023-04-13 18:48:23 +0800470--- a/mt7915/mt7915.h
471+++ b/mt7915/mt7915.h
developer2157bf82023-06-26 02:27:49 +0800472@@ -137,6 +137,7 @@ struct mt7915_sta {
473 struct mt7915_vif *vif;
developer1557f6c2023-04-13 18:48:23 +0800474
developer1557f6c2023-04-13 18:48:23 +0800475 struct list_head rc_list;
476+ struct list_head stats_list;
477 u32 airtime_ac[8];
478
479 int ack_signal;
developer8f0d89b2023-07-28 07:16:44 +0800480@@ -224,6 +225,10 @@ struct mt7915_phy {
developer2157bf82023-06-26 02:27:49 +0800481 struct mt76_mib_stats mib;
developer1557f6c2023-04-13 18:48:23 +0800482 struct mt76_channel_state state_ts;
483
484+ u8 stats_work_count;
485+ struct list_head stats_list;
486+ spinlock_t stats_lock;
487+
488 #ifdef CONFIG_NL80211_TESTMODE
489 struct {
490 u32 *reg_backup;
developer0443cd32023-09-19 14:11:49 +0800491@@ -495,6 +500,7 @@ int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch);
developer1557f6c2023-04-13 18:48:23 +0800492 int mt7915_mcu_get_temperature(struct mt7915_phy *phy);
493 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state);
494 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy);
495+int mt7915_mcu_get_tx_rate(struct mt7915_phy *phy, u16 wcidx);
496 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
497 struct ieee80211_sta *sta, struct rate_info *rate);
498 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
499--
developer0443cd32023-09-19 14:11:49 +08005002.18.0
developer1557f6c2023-04-13 18:48:23 +0800501