blob: c042918b02a4cba7d9ac2c05799d7e417fa22506 [file] [log] [blame]
developer5d148cb2023-06-02 13:08:11 +08001From 6b7498e172d4458499a3ba406bf7975478f46d21 Mon Sep 17 00:00:00 2001
2From: Sam Shih <sam.shih@mediatek.com>
3Date: Fri, 2 Jun 2023 13:06:17 +0800
4Subject: [PATCH]
5 [spi-and-storage][999-2351-nvmem-mtk-efuse-support-minimum-one-byte-access-stri.patch]
developer44e1bbf2022-01-28 17:20:00 +08006
developer44e1bbf2022-01-28 17:20:00 +08007---
8 drivers/nvmem/mtk-efuse.c | 13 +++++++------
9 1 file changed, 7 insertions(+), 6 deletions(-)
10
11diff --git a/drivers/nvmem/mtk-efuse.c b/drivers/nvmem/mtk-efuse.c
developer5d148cb2023-06-02 13:08:11 +080012index 856d9c3fc..2e728fed0 100644
developer44e1bbf2022-01-28 17:20:00 +080013--- a/drivers/nvmem/mtk-efuse.c
14+++ b/drivers/nvmem/mtk-efuse.c
15@@ -19,11 +19,12 @@ static int mtk_reg_read(void *context,
16 unsigned int reg, void *_val, size_t bytes)
17 {
18 struct mtk_efuse_priv *priv = context;
19- u32 *val = _val;
20- int i = 0, words = bytes / 4;
21+ void __iomem *addr = priv->base + reg;
22+ u8 *val = _val;
23+ int i;
24
25- while (words--)
26- *val++ = readl(priv->base + reg + (i++ * 4));
27+ for (i = 0; i < bytes; i++, val++)
28+ *val = readb(addr + i);
29
30 return 0;
31 }
32@@ -58,8 +59,8 @@ static int mtk_efuse_probe(struct platform_device *pdev)
33 if (IS_ERR(priv->base))
34 return PTR_ERR(priv->base);
35
36- econfig.stride = 4;
37- econfig.word_size = 4;
38+ econfig.stride = 1;
39+ econfig.word_size = 1;
40 econfig.reg_read = mtk_reg_read;
41 econfig.reg_write = mtk_reg_write;
42 econfig.size = resource_size(res);
43--
developer5d148cb2023-06-02 13:08:11 +0800442.34.1
developer44e1bbf2022-01-28 17:20:00 +080045