blob: f38ed0d7e7e1cbeb2319a512a07a5252b8ca4812 [file] [log] [blame]
developer5d148cb2023-06-02 13:08:11 +08001From 9ef2a9d208fba86dfbc06d4f2f743562bd14c145 Mon Sep 17 00:00:00 2001
developer8cdcb262022-10-27 14:36:15 +08002From: Sam Shih <sam.shih@mediatek.com>
developer5d148cb2023-06-02 13:08:11 +08003Date: Fri, 2 Jun 2023 13:06:26 +0800
4Subject: [PATCH]
developer3de3aca2023-06-07 20:44:59 +08005 [high-speed-io][999-2620-xHCI-change-compliance-mode-de-emphasis-default-as-g.patch]
developer2cdaeb12022-10-04 20:25:05 +08006
developer2cdaeb12022-10-04 20:25:05 +08007---
developer8cdcb262022-10-27 14:36:15 +08008 drivers/usb/host/xhci-mtk.c | 18 +++++++++++++++++-
9 drivers/usb/host/xhci-mtk.h | 1 +
10 2 files changed, 18 insertions(+), 1 deletion(-)
developer2cdaeb12022-10-04 20:25:05 +080011
12diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
developer5d148cb2023-06-02 13:08:11 +080013index 5c0eb35cd..77ddb8c05 100644
developer2cdaeb12022-10-04 20:25:05 +080014--- a/drivers/usb/host/xhci-mtk.c
15+++ b/drivers/usb/host/xhci-mtk.c
developer8cdcb262022-10-27 14:36:15 +080016@@ -22,6 +22,11 @@
17 #include "xhci.h"
developer2cdaeb12022-10-04 20:25:05 +080018 #include "xhci-mtk.h"
developer2cdaeb12022-10-04 20:25:05 +080019
20+/* COMPLIANCE_CP5_CP7_TXDEEMPH_10G register */
21+#define COMPLIANCE_CP5_CP7_TXDEEMPH_10G 0x2428
22+#define CP5_CP7_TXDEEMPH_10G GENMASK(17, 0)
23+#define CP5_CP7_TXDEEMPH_10G_VAL(val) ((val) & 0x03FFFF)
24+
25 /* ip_pw_ctrl0 register */
26 #define CTRL0_IP_SW_RST BIT(0)
27
developer8cdcb262022-10-27 14:36:15 +080028@@ -413,6 +418,7 @@ static int xhci_mtk_setup(struct usb_hcd *hcd)
developer2cdaeb12022-10-04 20:25:05 +080029 {
30 struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
31 int ret;
32+ u32 val;
33
34 if (usb_hcd_is_primary_hcd(hcd)) {
35 ret = xhci_mtk_ssusb_config(mtk);
developer8cdcb262022-10-27 14:36:15 +080036@@ -430,6 +436,15 @@ static int xhci_mtk_setup(struct usb_hcd *hcd)
developer2cdaeb12022-10-04 20:25:05 +080037 return ret;
38 }
39
40+ /* change COMPLIANCE_CP5_CP7_TXDEEMPH_10G as Gen1 instead Gen2 */
developer8cdcb262022-10-27 14:36:15 +080041+ if (mtk->p0_speed_fixup) {
developer2cdaeb12022-10-04 20:25:05 +080042+ val = readl(mtk->hcd->regs + COMPLIANCE_CP5_CP7_TXDEEMPH_10G);
43+ val &= ~CP5_CP7_TXDEEMPH_10G;
44+ val |= 0x00001;
45+ val = CP5_CP7_TXDEEMPH_10G_VAL(val);
46+ writel(val, mtk->hcd->regs + COMPLIANCE_CP5_CP7_TXDEEMPH_10G);
47+ }
48+
49 return ret;
50 }
51
developer8cdcb262022-10-27 14:36:15 +080052@@ -475,7 +490,8 @@ static int xhci_mtk_probe(struct platform_device *pdev)
53 /* optional property, ignore the error if it does not exist */
54 of_property_read_u32(node, "mediatek,u3p-dis-msk",
55 &mtk->u3p_dis_msk);
56-
57+ mtk->p0_speed_fixup = of_property_read_bool(node,
58+ "mediatek,p0_speed_fixup");
59 ret = usb_wakeup_of_property_parse(mtk, node);
60 if (ret) {
61 dev_err(dev, "failed to parse uwk property\n");
62diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
developer5d148cb2023-06-02 13:08:11 +080063index 2f702342d..8a884e7b4 100644
developer8cdcb262022-10-27 14:36:15 +080064--- a/drivers/usb/host/xhci-mtk.h
65+++ b/drivers/usb/host/xhci-mtk.h
66@@ -156,6 +156,7 @@ struct xhci_hcd_mtk {
67 struct regmap *uwk;
68 u32 uwk_reg_base;
69 u32 uwk_vers;
70+ bool p0_speed_fixup;
71 };
72
73 static inline struct xhci_hcd_mtk *hcd_to_mtk(struct usb_hcd *hcd)
developer2cdaeb12022-10-04 20:25:05 +080074--
developer5d148cb2023-06-02 13:08:11 +0800752.34.1
developer2cdaeb12022-10-04 20:25:05 +080076