blob: f56e778c6326328eac847e8efd45b18bdf08af43 [file] [log] [blame]
/dts-v1/;
#include "mt7981-fpga.dtsi"
/ {
model = "MediaTek MT7981 FPGA";
compatible = "mediatek,mt7981-fpga-spim-nand";
chosen {
bootargs = "console=ttyS0,115200n1 loglevel=8 \
earlycon=uart8250,mmio32,0x11002000";
};
memory {
// fpga ddr2: 128MB*2
reg = <0 0x40000000 0 0x10000000>;
};
nmbm_spim_nand {
compatible = "generic,nmbm";
#address-cells = <1>;
#size-cells = <1>;
lower-mtd-device = <&spi_nand>;
forced-create;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x00000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x0100000 0x0080000>;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x0200000>;
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x0200000>;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
};
};
};
wsys_adie: wsys_adie@0 {
// fpga cases need to manual change adie_id / sku_type for dvt only
compatible = "mediatek,rebb-mt7981-adie";
adie_id = <7976>;
sku_type = <3000>;
};
};
&uart0 {
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <3000000>;
};
};
&spi1 {
pinctrl-names = "default";
/* pin shared with snfi */
pinctrl-0 = <&spic_pins>;
status = "disabled";
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
status = "okay";
};
&pio {
pcie_pins: pcie-pins {
mux {
function = "pcie";
groups = "pcie_pereset", "pcie_clk", "pcie_wake";
};
};
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
};
spic_pins: spi1-pins {
mux {
function = "spi";
groups = "spi1_1";
};
};
};
&watchdog {
status = "disabled";
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "rgmii";
fixed-link {
speed = <100>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "rgmii";
fixed-link {
speed = <100>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};
&hnat {
mtketh-wan = "eth1";
mtketh-lan = "eth0";
mtketh-max-gmac = <2>;
status = "okay";
};