[][drivers: spi: add SPI calibration support to SPINAND/SPI-NOR/SPI TPM]
[Description]
Add SPI calibration support to SPINAND/SPI-NOR/SPI TPM.
Now this works ok for SPIM.
We can implement SNFI part later.
[Release-log]
N/A
Change-Id: I1de08cb9853c475f9cb0d1ba5512259555ea806a
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6151756
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nand-2500wan-gmac2.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nand-2500wan-gmac2.dts
index 745606f..396f483 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nand-2500wan-gmac2.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nand-2500wan-gmac2.dts
@@ -179,6 +179,12 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
+ spi-cal-enable;
+ spi-cal-mode = "read-data";
+ spi-cal-datalen = <7>;
+ spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
+ spi-cal-addrlen = <5>;
+ spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
@@ -190,6 +196,18 @@
pinctrl-names = "default";
pinctrl-0 = <&spic_pins>;
status = "disabled";
+
+ slb9670: slb9670@0 {
+ compatible = "infineon,slb9670";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-cal-enable;
+ spi-cal-mode = "read-data";
+ spi-cal-datalen = <2>;
+ spi-cal-data = /bits/ 8 <0x00 0x1b>;
+ spi-max-frequency = <20000000>;
+ };
};
&pio {
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nor-rfb.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nor-rfb.dts
index abd7fd3..47bb702 100755
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nor-rfb.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nor-rfb.dts
@@ -123,6 +123,13 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
+ spi-cal-enable;
+ spi-cal-mode = "read-data";
+ spi-cal-datalen = <7>;
+ spi-cal-data = /bits/ 8 <
+ 0x53 0x46 0x5F 0x42 0x4F 0x4F 0x54>; /* SF_BOOT */
+ spi-cal-addrlen = <1>;
+ spi-cal-addr = /bits/ 32 <0x0>;
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
diff --git a/target/linux/mediatek/patches-5.4/9017-drivers-mtd-spinand-Add-calibration-support-for-spinand.patch b/target/linux/mediatek/patches-5.4/9017-drivers-mtd-spinand-Add-calibration-support-for-spinand.patch
new file mode 100644
index 0000000..374531b
--- /dev/null
+++ b/target/linux/mediatek/patches-5.4/9017-drivers-mtd-spinand-Add-calibration-support-for-spinand.patch
@@ -0,0 +1,89 @@
+From 6bd88d34cb5a5cb1d7c544c9f5b430105b000308 Mon Sep 17 00:00:00 2001
+From: "SkyLake.Huang" <skylake.huang@mediatek.com>
+Date: Thu, 23 Jun 2022 18:39:56 +0800
+Subject: [PATCH] drivers: mtd: spinand: Add calibration support for spinand
+
+Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
+---
+ drivers/mtd/nand/spi/core.c | 58 +++++++++++++++++++++++++++++++++++++
+ 1 file changed, 58 insertions(+)
+
+diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
+index 9f5f95ff7..b346c7a8a 100644
+--- a/drivers/mtd/nand/spi/core.c
++++ b/drivers/mtd/nand/spi/core.c
+@@ -789,6 +789,60 @@ static int spinand_manufacturer_match(struct spinand_device *spinand,
+ return -ENOTSUPP;
+ }
+
++int spinand_cal_read(void *priv, u32 *addr, int addrlen, u8 *buf, int readlen) {
++ int ret;
++ u8 status;
++ struct spinand_device *spinand = (struct spinand_device *)priv;
++ struct device *dev = &spinand->spimem->spi->dev;
++
++ typedef struct nand_pos my_pos;
++ my_pos pos;
++ typedef struct nand_page_io_req my_req;
++ my_req req;
++
++ if(addrlen != sizeof(struct nand_addr)/sizeof(unsigned int)) {
++ dev_err(dev, "Must provide correct addr(length) for spinand calibration\n");
++ return -EINVAL;
++ }
++
++ ret = spinand_reset_op(spinand);
++ if (ret)
++ return ret;
++
++ /* We should store our golden data in first target because
++ * we can't switch target at this moment.
++ */
++ pos = (my_pos){
++ .target = 0,
++ .lun = *addr,
++ .plane = *(addr+1),
++ .eraseblock = *(addr+2),
++ .page = *(addr+3),
++ };
++
++ req = (my_req){
++ .pos = pos,
++ .dataoffs = *(addr+4),
++ .datalen = readlen,
++ .databuf.in = buf,
++ .mode = MTD_OPS_AUTO_OOB,
++ };
++
++ ret = spinand_load_page_op(spinand, &req);
++ if (ret)
++ return ret;
++
++ ret = spinand_wait(spinand, &status);
++ if (ret < 0)
++ return ret;
++
++ struct spi_mem_op op = SPINAND_PAGE_READ_FROM_CACHE_OP(
++ false, 0, 1, buf, readlen);
++ ret = spi_mem_exec_op(spinand->spimem, &op);
++
++ return 0;
++}
++
+ static int spinand_id_detect(struct spinand_device *spinand)
+ {
+ u8 *id = spinand->id.data;
+@@ -1004,6 +1058,10 @@ static int spinand_init(struct spinand_device *spinand)
+ if (!spinand->scratchbuf)
+ return -ENOMEM;
+
++ ret = spi_mem_do_calibration(spinand->spimem, spinand_cal_read, spinand);
++ if (ret)
++ dev_err(dev, "Failed to calibrate SPI-NAND (err = %d)\n", ret);
++
+ ret = spinand_detect(spinand);
+ if (ret)
+ goto err_free_bufs;
+--
+2.18.0
+
diff --git a/target/linux/mediatek/patches-5.4/9018-drivers-mtd-spi-nor-Add-calibration-support-for-spi-nor.patch b/target/linux/mediatek/patches-5.4/9018-drivers-mtd-spi-nor-Add-calibration-support-for-spi-nor.patch
new file mode 100644
index 0000000..023f52e
--- /dev/null
+++ b/target/linux/mediatek/patches-5.4/9018-drivers-mtd-spi-nor-Add-calibration-support-for-spi-nor.patch
@@ -0,0 +1,48 @@
+From b242e30661dac5c1c127999600029cd5b3f6b458 Mon Sep 17 00:00:00 2001
+From: "SkyLake.Huang" <skylake.huang@mediatek.com>
+Date: Thu, 23 Jun 2022 18:40:59 +0800
+Subject: [PATCH] drivers: mtd: spi-nor: Add calibration support for spi-nor
+
+Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
+---
+ drivers/mtd/spi-nor/spi-nor.c | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
+index 945833cbb..38a8948b3 100644
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -4893,6 +4893,20 @@ static void spi_nor_debugfs_init(struct spi_nor *nor,
+ info->id_len, info->id);
+ }
+
++static int spi_nor_cal_read(void *priv, u32 *addr, int addrlen, u8 *buf, int readlen)
++{
++ int ret;
++ struct spi_nor *nor = (struct spi_nor *)priv;
++
++ nor->reg_proto = SNOR_PROTO_1_1_1;
++ nor->read_proto = SNOR_PROTO_1_1_1;
++ nor->read_opcode = SPINOR_OP_READ;
++ nor->addr_width = 3;
++ nor->read_dummy = 0;
++
++ return spi_nor_read_raw(nor, *addr, readlen, buf);
++}
++
+ static const struct flash_info *spi_nor_get_flash_info(struct spi_nor *nor,
+ const char *name)
+ {
+@@ -4967,6 +4981,9 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
+ if (!nor->bouncebuf)
+ return -ENOMEM;
+
++ if(nor->spimem)
++ spi_mem_do_calibration(nor->spimem, spi_nor_cal_read, nor);
++
+ info = spi_nor_get_flash_info(nor, name);
+ if (IS_ERR(info))
+ return PTR_ERR(info);
+--
+2.18.0
+
diff --git a/target/linux/mediatek/patches-5.4/9019-drivers-char-tpm-Add-calibration-example-for-SPI-TPM-module.patch b/target/linux/mediatek/patches-5.4/9019-drivers-char-tpm-Add-calibration-example-for-SPI-TPM-module.patch
new file mode 100644
index 0000000..8b39b12
--- /dev/null
+++ b/target/linux/mediatek/patches-5.4/9019-drivers-char-tpm-Add-calibration-example-for-SPI-TPM-module.patch
@@ -0,0 +1,97 @@
+From 6110010f7b88392a3094f2aaec91ee54151cde2a Mon Sep 17 00:00:00 2001
+From: "SkyLake.Huang" <skylake.huang@mediatek.com>
+Date: Thu, 23 Jun 2022 18:43:02 +0800
+Subject: [PATCH] drivers: char: tpm: Add calibration example for SPI TPM
+ module
+
+Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
+---
+ drivers/char/tpm/tpm_tis_core.c | 19 +++++++++++++++++++
+ drivers/char/tpm/tpm_tis_core.h | 2 ++
+ drivers/char/tpm/tpm_tis_spi.c | 7 +++++++
+ 3 files changed, 28 insertions(+)
+
+diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c
+index 70f785994..b9898a56d 100644
+--- a/drivers/char/tpm/tpm_tis_core.c
++++ b/drivers/char/tpm/tpm_tis_core.c
+@@ -817,6 +817,21 @@ static const struct tpm_class_ops tpm_tis = {
+ .clk_enable = tpm_tis_clkrun_enable,
+ };
+
++int tpm_tis_cal_read(void *priv, u32 *addr, int addrlen, u8 *buf, int readlen)
++{
++ int rc;
++ u32 vendor;
++
++ rc = tpm_tis_read32((struct tpm_tis_data *)priv, TPM_DID_VID(0), &vendor);
++ if (rc < 0)
++ return -EIO;
++
++ buf[0] = (vendor >> 24) & 0xff;
++ buf[1] = (vendor >> 16) & 0xff;
++
++ return 0;
++}
++
+ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
+ const struct tpm_tis_phy_ops *phy_ops,
+ acpi_handle acpi_dev_handle)
+@@ -864,6 +879,10 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
+ if (chip->ops->clk_enable != NULL)
+ chip->ops->clk_enable(chip, true);
+
++ rc = priv->phy_ops->do_calibration(priv, dev);
++ if (rc)
++ goto out_err;
++
+ if (wait_startup(chip, 0) != 0) {
+ rc = -ENODEV;
+ goto out_err;
+diff --git a/drivers/char/tpm/tpm_tis_core.h b/drivers/char/tpm/tpm_tis_core.h
+index 7337819f5..7bb0bc8b6 100644
+--- a/drivers/char/tpm/tpm_tis_core.h
++++ b/drivers/char/tpm/tpm_tis_core.h
+@@ -106,6 +106,7 @@ struct tpm_tis_phy_ops {
+ int (*read16)(struct tpm_tis_data *data, u32 addr, u16 *result);
+ int (*read32)(struct tpm_tis_data *data, u32 addr, u32 *result);
+ int (*write32)(struct tpm_tis_data *data, u32 addr, u32 src);
++ int (*do_calibration)(struct tpm_tis_data *data, struct device *dev);
+ };
+
+ static inline int tpm_tis_read_bytes(struct tpm_tis_data *data, u32 addr,
+@@ -158,6 +159,7 @@ static inline bool is_bsw(void)
+ }
+
+ void tpm_tis_remove(struct tpm_chip *chip);
++int tpm_tis_cal_read(void *priv, u32 *addr, int addrlen, u8 *buf, int readlen);
+ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
+ const struct tpm_tis_phy_ops *phy_ops,
+ acpi_handle acpi_dev_handle);
+diff --git a/drivers/char/tpm/tpm_tis_spi.c b/drivers/char/tpm/tpm_tis_spi.c
+index 19513e622..3be2d53a5 100644
+--- a/drivers/char/tpm/tpm_tis_spi.c
++++ b/drivers/char/tpm/tpm_tis_spi.c
+@@ -184,12 +184,19 @@ static int tpm_tis_spi_write32(struct tpm_tis_data *data, u32 addr, u32 value)
+ return rc;
+ }
+
++int tpm_tis_spi_do_calibration(struct tpm_tis_data *priv, struct device *dev) {
++ struct spi_device *spi = container_of(dev,
++ struct spi_device, dev);
++ return spi_do_calibration(spi->master, spi, tpm_tis_cal_read, priv);
++}
++
+ static const struct tpm_tis_phy_ops tpm_spi_phy_ops = {
+ .read_bytes = tpm_tis_spi_read_bytes,
+ .write_bytes = tpm_tis_spi_write_bytes,
+ .read16 = tpm_tis_spi_read16,
+ .read32 = tpm_tis_spi_read32,
+ .write32 = tpm_tis_spi_write32,
++ .do_calibration = tpm_tis_spi_do_calibration,
+ };
+
+ static int tpm_tis_spi_probe(struct spi_device *dev)
+--
+2.18.0
+