[][kernel][mt7988][eth][mediatek-ge-soc: arm64: dts: Change GbE LED pin group to new separate ones]
[Description]
Change GbE pin groups to new separate ones, which are fixed by CL:7402754.
Without this patch, mediatek-ge-soc phy driver can't setup LED correctly.
[Release-log]
N/A
Change-Id: I4c2a14ed9e4fbc472d0d9d5ba6ba2a09c785a0d4
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/7499794
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-88d-10g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-88d-10g-spim-nand.dts
index 8aa687e..3dbbae8 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-88d-10g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-88d-10g-spim-nand.dts
@@ -267,13 +267,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -468,15 +489,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -484,9 +502,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -494,9 +511,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -504,9 +520,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
index bbfa4dc..1011cb3 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
@@ -106,13 +106,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -279,15 +300,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -295,9 +313,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -305,9 +322,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -315,9 +331,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
index a8ce4f3..5548023 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
@@ -97,13 +97,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -270,15 +291,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -286,9 +304,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -296,9 +313,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -306,9 +322,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
index adbfb7c..eb076ed 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
@@ -131,13 +131,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -305,15 +326,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -321,9 +339,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -331,9 +348,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -341,9 +357,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
index a720325f..d305570 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
@@ -262,13 +262,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -463,15 +484,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -479,9 +497,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -489,9 +506,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -499,9 +515,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
index f4953b3..62cb90e 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
@@ -131,13 +131,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -297,15 +318,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -313,9 +331,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -323,9 +340,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -333,9 +349,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
index 31eadc5..5dcfd58 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
@@ -203,13 +203,34 @@
};
&pio {
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -380,15 +401,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -396,9 +414,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -406,9 +423,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -416,9 +432,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
index 6bf9cd7..3f88986 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
@@ -131,13 +131,34 @@
};
&pio {
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2p5gbe_led0_pins: 2p5gbe-pins {
mux {
function = "led";
@@ -297,15 +318,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -313,9 +331,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -323,9 +340,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -333,9 +349,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
index 5b07702..abe0628 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
@@ -228,13 +228,34 @@
};
&pio {
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -377,15 +398,12 @@
mdio1: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -393,9 +411,8 @@
gsw_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -403,9 +420,8 @@
gsw_phy2: ethernet-phy@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -413,9 +429,8 @@
gsw_phy3: ethernet-phy@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
index b0e3d1b..5969966 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
@@ -217,13 +217,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -380,15 +401,12 @@
mdio1: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -396,9 +414,8 @@
gsw_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -406,9 +423,8 @@
gsw_phy2: ethernet-phy@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -416,9 +432,8 @@
gsw_phy3: ethernet-phy@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
index a77d89c..d1371c4 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
@@ -233,13 +233,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -413,15 +434,12 @@
mdio1: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -429,9 +447,8 @@
gsw_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -439,9 +456,8 @@
gsw_phy2: ethernet-phy@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -449,9 +465,8 @@
gsw_phy3: ethernet-phy@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-emmc.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-emmc.dts
index afd03bf..0e58ac7 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-emmc.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-emmc.dts
@@ -106,13 +106,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2p5gbe_led0_pins: 2p5gbe-pins {
mux {
function = "led";
@@ -286,15 +307,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -302,9 +320,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -312,9 +329,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -322,9 +338,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-sd.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-sd.dts
index 0714bff..d0b4ec3 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-sd.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-sd.dts
@@ -97,13 +97,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2p5gbe_led0_pins: 2p5gbe-pins {
mux {
function = "led";
@@ -277,15 +298,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -293,9 +311,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -303,9 +320,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -313,9 +329,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-snfi-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-snfi-nand.dts
index 972452f..6cadcfc 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-snfi-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-snfi-nand.dts
@@ -131,13 +131,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2p5gbe_led0_pins: 2p5gbe-pins {
mux {
function = "led";
@@ -312,15 +333,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -328,9 +346,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -338,9 +355,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -348,9 +364,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nand.dts
index 9a065c8..564debe 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nand.dts
@@ -251,13 +251,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2p5gbe_led0_pins: 2p5gbe-pins {
mux {
function = "led";
@@ -452,15 +473,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -468,9 +486,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -478,9 +495,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -488,9 +504,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nor.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nor.dts
index c0b7c33..1c98664 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nor.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-10g-spim-nor.dts
@@ -131,13 +131,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2p5gbe_led0_pins: 2p5gbe-pins {
mux {
function = "led";
@@ -304,15 +325,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -320,9 +338,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -330,9 +347,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -340,9 +356,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-e2p5g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-e2p5g-spim-nand.dts
index 5f10bd1..e6a0115 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-e2p5g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-dsa-e2p5g-spim-nand.dts
@@ -198,13 +198,34 @@
};
&pio {
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2p5gbe_led0_pins: 2p5gbe-pins {
mux {
function = "led";
@@ -382,15 +403,12 @@
compatible = "mediatek,dsa-slave-mdio";
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
sphy0: switch_phy0@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -398,9 +416,8 @@
sphy1: switch_phy1@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -408,9 +425,8 @@
sphy2: switch_phy2@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -418,9 +434,8 @@
sphy3: switch_phy3@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-sfp-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-sfp-spim-nand.dts
index fe0ca1e..2404586 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-sfp-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-sfp-spim-nand.dts
@@ -212,13 +212,34 @@
};
&pio {
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2p5gbe_led0_pins: 2p5gbe-pins {
mux {
function = "led";
@@ -369,15 +390,12 @@
mdio1: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -385,9 +403,8 @@
gsw_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -395,9 +412,8 @@
gsw_phy2: ethernet-phy@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -405,9 +421,8 @@
gsw_phy3: ethernet-phy@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-spim-nand.dts
index b6e7efe..3446b6b 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988c-gsw-10g-spim-nand.dts
@@ -227,13 +227,34 @@
};
};
- gbe_led0_pins: gbe-pins {
+ gbe0_led0_pins: gbe0-pins {
mux {
function = "led";
- groups = "gbe_led0";
+ groups = "gbe0_led0";
};
};
+ gbe1_led0_pins: gbe1-pins {
+ mux {
+ function = "led";
+ groups = "gbe1_led0";
+ };
+ };
+
+ gbe2_led0_pins: gbe2-pins {
+ mux {
+ function = "led";
+ groups = "gbe2_led0";
+ };
+ };
+
+ gbe3_led0_pins: gbe3-pins {
+ mux {
+ function = "led";
+ groups = "gbe3_led0";
+ };
+ };
+
i2p5gbe_led0_pins: 2p5gbe-pins {
mux {
function = "led";
@@ -407,15 +428,12 @@
mdio1: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&gbe_led0_pins>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
reg = <0>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe0_led0_pins>;
nvmem-cells = <&phy_calibration_p0>;
nvmem-cell-names = "phy-cal-data";
};
@@ -423,9 +441,8 @@
gsw_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id03a2.9481";
reg = <1>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe1_led0_pins>;
nvmem-cells = <&phy_calibration_p1>;
nvmem-cell-names = "phy-cal-data";
};
@@ -433,9 +450,8 @@
gsw_phy2: ethernet-phy@2 {
compatible = "ethernet-phy-id03a2.9481";
reg = <2>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe2_led0_pins>;
nvmem-cells = <&phy_calibration_p2>;
nvmem-cell-names = "phy-cal-data";
};
@@ -443,9 +459,8 @@
gsw_phy3: ethernet-phy@3 {
compatible = "ethernet-phy-id03a2.9481";
reg = <3>;
- phy-mode = "gmii";
- rext = "efuse";
- tx_r50 = "efuse";
+ pinctrl-names = "gbe-led";
+ pinctrl-0 = <&gbe3_led0_pins>;
nvmem-cells = <&phy_calibration_p3>;
nvmem-cell-names = "phy-cal-data";
};