[][kernel][common][eth][Fix CTLE over-peaking issue for the USXGMII]
[Description]
Fix CTLE over-peaking issue for the USXGMII.
In order to ensure the quality of the RX signal, we have to reconfigure
USXGMII after the line side link up.
If without this patch, the USXGMII might get the poor RX performance.
[Release-log]
N/A
Change-Id: I1ddd370d41481ad26d843a2a5fc6281ea519116c
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/7510321
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
index 3deb616..fe06c2e 100644
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
@@ -708,10 +708,22 @@
regmap_write(mpcs->regmap, RG_PCS_AN_CTRL0, val);
}
+static void mtk_usxgmii_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
+ phy_interface_t interface,
+ int speed, int duplex)
+{
+ /* Reconfiguring USXGMII to ensure the quality of the RX signal
+ * after the line side link up.
+ */
+ mtk_usxgmii_pcs_config(pcs, mode,
+ interface, NULL, false);
+}
+
static const struct phylink_pcs_ops mtk_usxgmii_pcs_ops = {
.pcs_config = mtk_usxgmii_pcs_config,
.pcs_get_state = mtk_usxgmii_pcs_get_state,
.pcs_an_restart = mtk_usxgmii_pcs_restart_an,
+ .pcs_link_up = mtk_usxgmii_pcs_link_up,
};
int mtk_usxgmii_init(struct mtk_eth *eth, struct device_node *r)