[][Add clock and pinctrl setting and i2c pwm to mt7986 DT]
[Description]
Add more pinctrl pinmux list into DT
Modify DT according to releated clock driver
Add i2c and pwm in DT
Change since v1:
Add mt7986 compatiable string to i2c and pwm driver
Enable i2c in mt7986 kernel config
Fix pwm reg info in DT
Add memory node back to prevent hang when u-boot can't carry memery size info.
Change since v2:
fix pwm clock and it's pinctrl node
Change since v3:
Add ethernet clock parent
Change since v4:
Fix ethernet clock parent
Change since v5:
Fix auxadc and ethernet (ethsys)
[Release-log]
Build Pass
Boot-up from spim-nand flash pass
Update since v1:
I2C test pass with i2cdetect command
Update since v2:
PWM test pass with blinking led
Update since V5:
Ethernet test pass with ping
auxadc test pass with cat sysfs
INFRACFG driver in pwm2_ck_sel, and pwm1_ck_sel have bug,
We got 32k instead of csw_pwm_ck, need clock owner to fix this.
--> Fix by change 4619106
Change-Id: Icac52cae356796fec6b9e3652747e14fed9cf4e0
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4610073
diff --git a/target/linux/mediatek/mt7986/config-5.4 b/target/linux/mediatek/mt7986/config-5.4
index 29e6556..2622dbe 100644
--- a/target/linux/mediatek/mt7986/config-5.4
+++ b/target/linux/mediatek/mt7986/config-5.4
@@ -82,8 +82,7 @@
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_MEDIATEK=y
-CONFIG_COMMON_CLK_MT7986=y
-# CONFIG_COMMON_CLK_MT2712=y
+CONFIG_COMMON_CLK_MT2712=y
# CONFIG_COMMON_CLK_MT2712_BDPSYS is not set
# CONFIG_COMMON_CLK_MT2712_IMGSYS is not set
# CONFIG_COMMON_CLK_MT2712_JPGDECSYS is not set
@@ -93,12 +92,13 @@
# CONFIG_COMMON_CLK_MT2712_VENCSYS is not set
# CONFIG_COMMON_CLK_MT6779 is not set
# CONFIG_COMMON_CLK_MT6797 is not set
-# CONFIG_COMMON_CLK_MT7622=y
-# CONFIG_COMMON_CLK_MT7622_AUDSYS=y
-# CONFIG_COMMON_CLK_MT7622_ETHSYS=y
-# CONFIG_COMMON_CLK_MT7622_HIFSYS=y
+CONFIG_COMMON_CLK_MT7622=y
+# CONFIG_COMMON_CLK_MT7622_AUDSYS is not set
+# CONFIG_COMMON_CLK_MT7622_ETHSYS is not set
+# CONFIG_COMMON_CLK_MT7622_HIFSYS is not set
+CONFIG_COMMON_CLK_MT7986=y
# CONFIG_COMMON_CLK_MT8173 is not set
-# CONFIG_COMMON_CLK_MT8183=y
+CONFIG_COMMON_CLK_MT8183=y
# CONFIG_COMMON_CLK_MT8183_AUDIOSYS is not set
# CONFIG_COMMON_CLK_MT8183_CAMSYS is not set
# CONFIG_COMMON_CLK_MT8183_IMGSYS is not set
@@ -110,7 +110,7 @@
# CONFIG_COMMON_CLK_MT8183_MMSYS is not set
# CONFIG_COMMON_CLK_MT8183_VDECSYS is not set
# CONFIG_COMMON_CLK_MT8183_VENCSYS is not set
-# CONFIG_COMMON_CLK_MT8516=y
+CONFIG_COMMON_CLK_MT8516=y
# CONFIG_COMMON_CLK_MT8516_AUDSYS is not set
CONFIG_COMPAT=y
CONFIG_COMPAT_32BIT_TIME=y
@@ -237,6 +237,10 @@
CONFIG_HW_RANDOM_MTK=y
CONFIG_HZ=250
CONFIG_HZ_250=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MT65XX=y
CONFIG_ICPLUS_PHY=y
CONFIG_IIO=y
CONFIG_IKCONFIG=y
@@ -251,6 +255,7 @@
CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_IRQ_WORK=y
CONFIG_JUMP_LABEL=y
+# CONFIG_LEDS_UBNT_LEDBAR is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
@@ -310,11 +315,11 @@
CONFIG_NLS=y
CONFIG_NMBM=y
# CONFIG_NMBM_LOG_LEVEL_DEBUG is not set
-CONFIG_NMBM_LOG_LEVEL_INFO=y
-# CONFIG_NMBM_LOG_LEVEL_WARN is not set
-# CONFIG_NMBM_LOG_LEVEL_ERR is not set
# CONFIG_NMBM_LOG_LEVEL_EMERG is not set
+# CONFIG_NMBM_LOG_LEVEL_ERR is not set
+CONFIG_NMBM_LOG_LEVEL_INFO=y
# CONFIG_NMBM_LOG_LEVEL_NONE is not set
+# CONFIG_NMBM_LOG_LEVEL_WARN is not set
CONFIG_NMBM_MTD=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
@@ -361,6 +366,7 @@
CONFIG_PINCTRL_MT8516=y
CONFIG_PINCTRL_MTK=y
CONFIG_PINCTRL_MTK_MOORE=y
+CONFIG_PLUGIN_HOSTCC="g++"
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y