[][kernel][mt7988][Fix SGMII to USXGMII mode change issue for the 10G SFP+ optical module]
[Description]
Fix SGMII to USXGMII mode change issue for the 10G SFP+ optical module.
Due to the USXGMII hardware limitation, it has to make sure receiving
RX signal before calibration.
Therefore, the USXGMII driver has to reconfigure PHYA until link up with
link partner.
If without this patch, the USXGMII mignt not be able to link up with
10G SFP+ optical module.
[Release-log]
N/A
Change-Id: I76fbde6298daac3610af0b85d1d95ca0b537018e
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/7465697
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
index 73f84f6..3deb616 100644
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
@@ -597,6 +597,31 @@
mdelay(10);
}
+static int mtk_usxgmii_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
+ phy_interface_t interface,
+ const unsigned long *advertising,
+ bool permit_pause_to_mac)
+{
+ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs);
+ struct mtk_eth *eth = mpcs->eth;
+ int err = 0;
+
+ mpcs->interface = interface;
+
+ mtk_usxgmii_xfi_pll_enable(eth->usxgmii);
+ mtk_usxgmii_reset(eth, mpcs->id);
+
+ /* Setup USXGMIISYS with the determined property */
+ if (interface == PHY_INTERFACE_MODE_USXGMII)
+ err = mtk_usxgmii_setup_phya_an_10000(mpcs);
+ else if (interface == PHY_INTERFACE_MODE_10GKR)
+ err = mtk_usxgmii_setup_phya_force_10000(mpcs);
+ else if (interface == PHY_INTERFACE_MODE_5GBASER)
+ err = mtk_usxgmii_setup_phya_force_5000(mpcs);
+
+ return err;
+}
+
static void mtk_usxgmii_pcs_get_state(struct phylink_pcs *pcs,
struct phylink_link_state *state)
{
@@ -664,31 +689,10 @@
state->link = FIELD_GET(MTK_USXGMII_PCS_LINK, val);
state->duplex = DUPLEX_FULL;
}
-}
-
-static int mtk_usxgmii_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
- phy_interface_t interface,
- const unsigned long *advertising,
- bool permit_pause_to_mac)
-{
- struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs);
- struct mtk_eth *eth = mpcs->eth;
- int err = 0;
-
- mpcs->interface = interface;
- mtk_usxgmii_xfi_pll_enable(eth->usxgmii);
- mtk_usxgmii_reset(eth, mpcs->id);
-
- /* Setup USXGMIISYS with the determined property */
- if (interface == PHY_INTERFACE_MODE_USXGMII)
- err = mtk_usxgmii_setup_phya_an_10000(mpcs);
- else if (interface == PHY_INTERFACE_MODE_10GKR)
- err = mtk_usxgmii_setup_phya_force_10000(mpcs);
- else if (interface == PHY_INTERFACE_MODE_5GBASER)
- err = mtk_usxgmii_setup_phya_force_5000(mpcs);
-
- return err;
+ if (state->link == 0)
+ mtk_usxgmii_pcs_config(pcs, MLO_AN_INBAND,
+ state->interface, NULL, false);
}
void mtk_usxgmii_pcs_restart_an(struct phylink_pcs *pcs)
diff --git a/target/linux/mediatek/patches-5.4/757-net-phy-add-phylink-pcs-support.patch b/target/linux/mediatek/patches-5.4/757-net-phy-add-phylink-pcs-support.patch
index 83da92d..99e4141 100644
--- a/target/linux/mediatek/patches-5.4/757-net-phy-add-phylink-pcs-support.patch
+++ b/target/linux/mediatek/patches-5.4/757-net-phy-add-phylink-pcs-support.patch
@@ -517,6 +517,15 @@
val = phylink_mii_emul_read(reg, &state);
}
break;
+@@ -2010,7 +2010,7 @@ static int phylink_sfp_config(struct phylink *pl, u8 mode,
+
+ if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
+ &pl->phylink_disable_state))
+- phylink_mac_config(pl, &pl->link_config);
++ phylink_mac_initial_config(pl, false);
+
+ return ret;
+ }
diff --git a/include/linux/phylink.h b/include/linux/phylink.h
index 8229f56..ba0f09d 100644
--- a/include/linux/phylink.h