| commit | 7e569a0a9730041f1ce4faddf14611a1d3e4608b | [log] [tgz] |
|---|---|---|
| author | developer <developer@mediatek.com> | Thu Jun 30 12:27:05 2022 +0800 |
| committer | developer <developer@mediatek.com> | Mon Jul 04 10:17:46 2022 +0800 |
| tree | 850736591e8f612de18144a6ca44ba3e6ac2378f | |
| parent | 459b78eba0da60e7629c839271d22ee70bdb54f6 [diff] |
[][update ADMA RX HANG check condition] [Description] Change ADMA RX HANG condition -- ADMA RX HANG condition - PSE p0 output queue is not zero - CDM1 FSM indication CDM is from PSE to ADMA status - ADMA DBG MONITOR show CURR_STAT is zero - CDM_FIFO_RDY is zero - remove check RX_FIFO_WCNT is zero because sometimes it is not zero [Release-log] N/A Change-Id: I666d3df5eddc128f6f2fc4df44b9c76aa8b64254 Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6182238
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c index 391cc1d..e1619cb 100644 --- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c +++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c
@@ -206,7 +206,6 @@ u32 is_oq0_stuck = (mtk_r32(eth, MTK_PSE_OQ_STA(0)) & 0x1FF) != 0; u32 is_cdm1_busy = (mtk_r32(eth, MTK_FE_CDM1_FSM) & 0xFFFF0000) != 0; u32 is_adma_busy = ((mtk_r32(eth, MTK_ADMA_RX_DBG0) & 0x1F) == 0) && - ((mtk_r32(eth, MTK_ADMA_RX_DBG1) & 0x3F0000) == 0) && ((mtk_r32(eth, MTK_ADMA_RX_DBG0) & 0x40) == 0); if (cur_wdidx == prev_wdidx && is_wtx_busy &&