commit | 797e46c66e3c4ee5740475e33b8a9d3a02afe49a | [log] [tgz] |
---|---|---|
author | developer <developer@mediatek.com> | Fri Jul 29 12:05:32 2022 +0800 |
committer | developer <developer@mediatek.com> | Mon Aug 01 14:21:42 2022 +0800 |
tree | 4948cc04dbfc4cd10869a8bdb66b5c5dd8a7c98f | |
parent | c1b2cd1c1506e0effb32afcec00566b15fb3274b [diff] [blame] |
[][Kernel][Common][eth][update debug info and reset condition] [Description] Change dump more correct QDMA info and reset condition - dump all QDMA page info - don't reset if pause frame cause timeout - add reset when GMAC RX path error [Release-log] N/A Change-Id: Ife2569284eb4a3bee84d5b3ebdc6f0a9b296d8d9 Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6309535
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h index 7fa0db8..d75c28f 100755 --- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -475,6 +475,7 @@ /* QDMA TX NUM */ #define MTK_QDMA_TX_NUM 16 +#define MTK_QDMA_PAGE_NUM 8 #define MTK_QDMA_TX_MASK ((MTK_QDMA_TX_NUM) - 1) #define QID_LOW_BITS(x) ((x) & 0xf) #define QID_HIGH_BITS(x) ((((x) >> 4) & 0x3) << 20)