[][MAC80211][mt76][Update internal patch for 7916 SQC]
[Description]
Add the following patches
1. Fix the number of sounding dimensions for 7916 SQC.
2. Update trinfo for 7916 when HW path is enabled.
3. Disable amsdu algorithm before fix tx_amsdu.
[Release-log]
N/A
Change-Id: I3d608a933c6ce67253caf4ad371564cb5826cd15
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6546432
diff --git a/autobuild_mac80211_release/package/kernel/mt76/patches/0008-mt76-mt7915-set-chainmask-to-3-for-mt7916.patch b/autobuild_mac80211_release/package/kernel/mt76/patches/0008-mt76-mt7915-set-chainmask-to-3-for-mt7916.patch
new file mode 100644
index 0000000..5514339
--- /dev/null
+++ b/autobuild_mac80211_release/package/kernel/mt76/patches/0008-mt76-mt7915-set-chainmask-to-3-for-mt7916.patch
@@ -0,0 +1,93 @@
+From e93433a00ee18a27cfb9ef6a9cd0df6c28f96cb7 Mon Sep 17 00:00:00 2001
+From: Peter Chiu <chui-hao.chiu@mediatek.com>
+Date: Wed, 21 Sep 2022 13:25:26 +0800
+Subject: [PATCH] mt76: mt7915: set chainmask to 3 for mt7916
+
+Use chainmask to represent the number of TRx path and set it to 3 for mt7916.
+Use antenna_mask to represent the TRx streams.
+
+Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com>
+---
+ mt7915/init.c | 11 ++++++-----
+ mt7915/main.c | 6 +++++-
+ mt7915/mcu.c | 2 +-
+ 3 files changed, 12 insertions(+), 7 deletions(-)
+
+diff --git a/mt7915/init.c b/mt7915/init.c
+index 489f6e77..8474c11f 100644
+--- a/mt7915/init.c
++++ b/mt7915/init.c
+@@ -730,11 +730,12 @@ void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy)
+ }
+
+ static void
+-mt7915_set_stream_he_txbf_caps(struct mt7915_dev *dev,
+- struct ieee80211_sta_he_cap *he_cap,
+- int vif, int nss)
++mt7915_set_stream_he_txbf_caps(struct mt7915_phy *phy,
++ struct ieee80211_sta_he_cap *he_cap, int vif)
+ {
++ struct mt7915_dev *dev = phy->dev;
+ struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
++ int nss = hweight8(phy->mt76->chainmask);
+ u8 c, nss_160;
+
+ /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */
+@@ -839,7 +840,7 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band,
+ struct ieee80211_sband_iftype_data *data)
+ {
+ struct mt7915_dev *dev = phy->dev;
+- int i, idx = 0, nss = hweight8(phy->mt76->chainmask);
++ int i, idx = 0, nss = hweight8(phy->mt76->antenna_mask);
+ u16 mcs_map = 0;
+ u16 mcs_map_160 = 0;
+ u8 nss_160;
+@@ -972,7 +973,7 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band,
+ he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map_160);
+ he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map_160);
+
+- mt7915_set_stream_he_txbf_caps(dev, he_cap, i, nss);
++ mt7915_set_stream_he_txbf_caps(phy, he_cap, i);
+
+ memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
+ if (he_cap_elem->phy_cap_info[6] &
+diff --git a/mt7915/main.c b/mt7915/main.c
+index edd678ce..fc5319da 100644
+--- a/mt7915/main.c
++++ b/mt7915/main.c
+@@ -952,6 +952,7 @@ mt7915_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
+ struct mt7915_dev *dev = mt7915_hw_dev(hw);
+ struct mt7915_phy *phy = mt7915_hw_phy(hw);
+ int max_nss = hweight8(hw->wiphy->available_antennas_tx);
++ int tx_nss = hweight8(tx_ant), rx_nss = hweight8(rx_ant);
+ bool ext_phy = phy != &dev->phy;
+
+ if (!tx_ant || tx_ant != rx_ant || ffs(tx_ant) > max_nss)
+@@ -964,7 +965,10 @@ mt7915_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
+ if (ext_phy)
+ tx_ant <<= dev->chainshift;
+
+- phy->mt76->chainmask = tx_ant;
++ if (is_mt7916(&dev->mt76) && tx_nss == max_nss && rx_nss == max_nss)
++ phy->mt76->chainmask = 0x7;
++ else
++ phy->mt76->chainmask = tx_ant;
+
+ mt76_set_stream_caps(phy->mt76, true);
+ mt7915_set_stream_vht_txbf_caps(phy);
+diff --git a/mt7915/mcu.c b/mt7915/mcu.c
+index 19a33120..f11ca25d 100644
+--- a/mt7915/mcu.c
++++ b/mt7915/mcu.c
+@@ -485,7 +485,7 @@ static void
+ mt7915_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
+ struct mt7915_phy *phy)
+ {
+- int max_nss = hweight8(phy->mt76->chainmask);
++ int max_nss = hweight8(phy->mt76->antenna_mask);
+ struct bss_info_ra *ra;
+ struct tlv *tlv;
+
+--
+2.18.0
+
diff --git a/autobuild_mac80211_release/package/kernel/mt76/patches/1001-mt76-mt7915-add-mtk-internal-debug-tools-for-mt76.patch b/autobuild_mac80211_release/package/kernel/mt76/patches/1001-mt76-mt7915-add-mtk-internal-debug-tools-for-mt76.patch
index b93bc32..410adde 100644
--- a/autobuild_mac80211_release/package/kernel/mt76/patches/1001-mt76-mt7915-add-mtk-internal-debug-tools-for-mt76.patch
+++ b/autobuild_mac80211_release/package/kernel/mt76/patches/1001-mt76-mt7915-add-mtk-internal-debug-tools-for-mt76.patch
@@ -1,31 +1,39 @@
-From dcaf9bdc667b94263fd95971d7a920934a7a1725 Mon Sep 17 00:00:00 2001
+From 30238567bb559bd31644a811d75d63c808a4d55f Mon Sep 17 00:00:00 2001
From: Shayne Chen <shayne.chen@mediatek.com>
Date: Wed, 22 Jun 2022 10:39:47 +0800
-Subject: [PATCH 1001/1009] mt76: mt7915: add mtk internal debug tools for mt76
+Subject: [PATCH] mt76: mt7915: add mtk internal debug tools for mt76
---
- mt76_connac_mcu.h | 6 +
+ mt76_connac_mcu.h | 7 +
mt7915/Makefile | 2 +-
mt7915/debugfs.c | 73 +-
mt7915/mac.c | 14 +
mt7915/main.c | 4 +
- mt7915/mcu.c | 44 +
+ mt7915/mcu.c | 63 +
mt7915/mcu.h | 4 +
- mt7915/mt7915.h | 43 +
+ mt7915/mt7915.h | 44 +
mt7915/mt7915_debug.h | 1350 +++++++++++++++++++
- mt7915/mtk_debugfs.c | 2923 +++++++++++++++++++++++++++++++++++++++++
+ mt7915/mtk_debugfs.c | 2925 +++++++++++++++++++++++++++++++++++++++++
mt7915/mtk_mcu.c | 51 +
tools/fwlog.c | 44 +-
- 12 files changed, 4545 insertions(+), 13 deletions(-)
+ 12 files changed, 4568 insertions(+), 13 deletions(-)
create mode 100644 mt7915/mt7915_debug.h
create mode 100644 mt7915/mtk_debugfs.c
create mode 100644 mt7915/mtk_mcu.c
diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h
-index 31017218..89732676 100644
+index 31017218..06813f77 100644
--- a/mt76_connac_mcu.h
+++ b/mt76_connac_mcu.h
-@@ -1127,6 +1127,12 @@ enum {
+@@ -1104,6 +1104,7 @@ enum {
+ MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11,
+ MCU_EXT_CMD_FW_LOG_2_HOST = 0x13,
+ MCU_EXT_CMD_TXBF_ACTION = 0x1e,
++ MCU_EXT_CMD_MEC_CTRL = 0x1f,
+ MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21,
+ MCU_EXT_CMD_THERMAL_PROT = 0x23,
+ MCU_EXT_CMD_STA_REC_UPDATE = 0x25,
+@@ -1127,6 +1128,12 @@ enum {
MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58,
MCU_EXT_CMD_RXDCOC_CAL = 0x59,
MCU_EXT_CMD_GET_MIB_INFO = 0x5a,
@@ -236,7 +244,7 @@
}
diff --git a/mt7915/main.c b/mt7915/main.c
-index edd678ce..48b8be17 100644
+index fc5319da..1eb8107a 100644
--- a/mt7915/main.c
+++ b/mt7915/main.c
@@ -62,7 +62,11 @@ static int mt7915_start(struct ieee80211_hw *hw)
@@ -252,7 +260,7 @@
goto out;
diff --git a/mt7915/mcu.c b/mt7915/mcu.c
-index 19a33120..e498b61f 100644
+index f11ca25d..44d461d7 100644
--- a/mt7915/mcu.c
+++ b/mt7915/mcu.c
@@ -195,6 +195,11 @@ mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
@@ -320,6 +328,29 @@
int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
{
struct {
+@@ -3481,3 +3525,22 @@ int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
+
+ return 0;
+ }
++
++#ifdef MTK_DEBUG
++int mt7915_mcu_set_amsdu_algo(struct mt7915_dev *dev, u16 wcid, u8 enable)
++{
++ struct {
++ u16 action;
++ u8 _rsv1[2];
++ u16 wcid;
++ u8 enable;
++ u8 _rsv2[5];
++ } __packed req = {
++ .action = cpu_to_le16(1),
++ .wcid = cpu_to_le16(wcid),
++ .enable = enable,
++ };
++
++ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MEC_CTRL), &req, sizeof(req), true);
++}
++#endif
diff --git a/mt7915/mcu.h b/mt7915/mcu.h
index ed949802..bfb822fa 100644
--- a/mt7915/mcu.h
@@ -336,7 +367,7 @@
enum mcu_mmps_mode {
diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
-index c90a148d..8990b5b0 100644
+index c90a148d..193b8ab4 100644
--- a/mt7915/mt7915.h
+++ b/mt7915/mt7915.h
@@ -9,6 +9,7 @@
@@ -377,7 +408,7 @@
};
enum {
-@@ -592,4 +616,23 @@ void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+@@ -592,4 +616,24 @@ void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_sta *sta, struct dentry *dir);
#endif
@@ -388,6 +419,7 @@
+void mt7915_dump_tmac_info(u8 *tmac_info);
+int mt7915_mcu_set_txpower_level(struct mt7915_phy *phy, u8 drop_level);
+void mt7915_packet_log_to_host(struct mt7915_dev *dev, const void *data, int len, int type, int des_len);
++int mt7915_mcu_set_amsdu_algo(struct mt7915_dev *dev, u16 wcid, u8 enable);
+
+#define PKT_BIN_DEBUG_MAGIC 0xc8763123
+enum {
@@ -1759,10 +1791,10 @@
+#endif
diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c
new file mode 100644
-index 00000000..f18c8b6c
+index 00000000..747a9014
--- /dev/null
+++ b/mt7915/mtk_debugfs.c
-@@ -0,0 +1,2923 @@
+@@ -0,0 +1,2925 @@
+#include<linux/inet.h>
+#include "mt7915.h"
+#include "mt7915_debug.h"
@@ -4470,6 +4502,8 @@
+ u32 num = FIELD_GET(GENMASK(15, 8), tx_amsdu);
+ u32 uwtbl;
+
++ mt7915_mcu_set_amsdu_algo(dev, dev->wlan_idx, 0);
++
+ mt7915_wtbl_read_raw(dev, dev->wlan_idx, WTBL_TYPE_UMAC,
+ UWTBL_HW_AMSDU_DW, 1, &uwtbl);
+
@@ -4858,5 +4892,5 @@
return ret;
}
--
-2.25.1
+2.18.0
diff --git a/autobuild_mac80211_release/package/kernel/mt76/patches/1119-mt76-mt7915-add-vendor-subcmd-EDCCA-ctrl.patch b/autobuild_mac80211_release/package/kernel/mt76/patches/1119-mt76-mt7915-add-vendor-subcmd-EDCCA-ctrl.patch
index e1ecea1..9bdd9f6 100644
--- a/autobuild_mac80211_release/package/kernel/mt76/patches/1119-mt76-mt7915-add-vendor-subcmd-EDCCA-ctrl.patch
+++ b/autobuild_mac80211_release/package/kernel/mt76/patches/1119-mt76-mt7915-add-vendor-subcmd-EDCCA-ctrl.patch
@@ -1,7 +1,7 @@
-From 2043d4b7cd46412f5a480c6b8f8c4c1d4a0801f9 Mon Sep 17 00:00:00 2001
+From e5d1346bdc27c267911ec5d2a6815350c43cccb8 Mon Sep 17 00:00:00 2001
From: Howard Hsu <howard-yh.hsu@mediatek.com>
Date: Fri, 24 Jun 2022 11:15:45 +0800
-Subject: [PATCH 1119/1124] mt76: mt7915: add vendor subcmd EDCCA ctrl
+Subject: [PATCH] mt76: mt7915: add vendor subcmd EDCCA ctrl
Change-Id: I92dabf8be9c5a7ecec78f35325bc5645af8d15ab
---
@@ -15,10 +15,10 @@
7 files changed, 138 insertions(+)
diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h
-index cb06827c..683d8542 100644
+index b14f931b..6143d8e4 100644
--- a/mt76_connac_mcu.h
+++ b/mt76_connac_mcu.h
-@@ -1156,6 +1156,7 @@ enum {
+@@ -1157,6 +1157,7 @@ enum {
MCU_EXT_CMD_SMESH_CTRL = 0xae,
MCU_EXT_CMD_RX_STAT_USER_CTRL = 0xb3,
MCU_EXT_CMD_CERT_CFG = 0xb7,
@@ -27,7 +27,7 @@
};
diff --git a/mt7915/main.c b/mt7915/main.c
-index ba1b3e4b..192b0a9b 100644
+index 85e9cd60..bad0fe1e 100644
--- a/mt7915/main.c
+++ b/mt7915/main.c
@@ -456,6 +456,9 @@ static int mt7915_config(struct ieee80211_hw *hw, u32 changed)
@@ -41,13 +41,13 @@
ret = mt7915_set_channel(phy);
if (ret)
diff --git a/mt7915/mcu.c b/mt7915/mcu.c
-index f649bcaf..7e6102b8 100644
+index 6d67e9e1..523cc6da 100644
--- a/mt7915/mcu.c
+++ b/mt7915/mcu.c
-@@ -4253,3 +4253,41 @@ int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
-
- return 0;
+@@ -4272,3 +4272,41 @@ int mt7915_mcu_set_amsdu_algo(struct mt7915_dev *dev, u16 wcid, u8 enable)
+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MEC_CTRL), &req, sizeof(req), true);
}
+ #endif
+
+int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value,
+ s8 compensation)
@@ -108,7 +108,7 @@
+};
#endif
diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
-index 432f0b8a..439d071a 100644
+index b750660d..a5abcc56 100644
--- a/mt7915/mt7915.h
+++ b/mt7915/mt7915.h
@@ -723,6 +723,8 @@ void mt7915_vendor_amnt_fill_rx(struct mt7915_phy *phy, struct sk_buff *skb);
@@ -241,5 +241,5 @@
CAPI_RFEATURE_CHANGED = BIT(16),
CAPI_WIRELESS_CHANGED = BIT(17),
--
-2.25.1
+2.18.0
diff --git a/autobuild_mac80211_release/package/kernel/mt76/patches/3008-mt76-mt7915-update-mt7916-trinfo-when-hw-path-enable.patch b/autobuild_mac80211_release/package/kernel/mt76/patches/3008-mt76-mt7915-update-mt7916-trinfo-when-hw-path-enable.patch
new file mode 100644
index 0000000..9e3fb2a
--- /dev/null
+++ b/autobuild_mac80211_release/package/kernel/mt76/patches/3008-mt76-mt7915-update-mt7916-trinfo-when-hw-path-enable.patch
@@ -0,0 +1,90 @@
+From 5fbff98bcf45a6b2a5467d06af26507dbdb0c7aa Mon Sep 17 00:00:00 2001
+From: Peter Chiu <chui-hao.chiu@mediatek.com>
+Date: Thu, 22 Sep 2022 09:54:53 +0800
+Subject: [PATCH] mt76: mt7915: update mt7916 trinfo when hw path enable
+
+---
+ mt7915/mt7915_debug.h | 10 ++++++++++
+ mt7915/mtk_debugfs.c | 16 +++++++++++++---
+ 2 files changed, 23 insertions(+), 3 deletions(-)
+
+diff --git a/mt7915/mt7915_debug.h b/mt7915/mt7915_debug.h
+index 58ba2cdf..50b588bd 100644
+--- a/mt7915/mt7915_debug.h
++++ b/mt7915/mt7915_debug.h
+@@ -133,6 +133,8 @@ enum dbg_reg_rev {
+ DBG_MIB_M0ARNG0,
+ DBG_MIB_M0DR2,
+ DBG_MIB_M0DR13,
++ DBG_WFDMA_WED_TX_CTRL,
++ DBG_WFDMA_WED_RX_CTRL,
+ __MT_DBG_REG_REV_MAX,
+ };
+
+@@ -177,6 +179,8 @@ static const u32 mt7986_dbg_base[] = {
+
+ /* mt7915 regs with different base and offset */
+ static const struct __dbg_reg mt7915_dbg_reg[] = {
++ [DBG_WFDMA_WED_TX_CTRL] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x300 },
++ [DBG_WFDMA_WED_RX_CTRL] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x400 },
+ [DBG_INT_SOURCE_CSR] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x10 },
+ [DBG_INT_MASK_CSR] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x14 },
+ [DBG_INT1_SOURCE_CSR] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x88 },
+@@ -281,6 +285,8 @@ static const struct __dbg_reg mt7915_dbg_reg[] = {
+
+ /* mt7986/mt7916 regs with different base and offset */
+ static const struct __dbg_reg mt7916_dbg_reg[] = {
++ [DBG_WFDMA_WED_TX_CTRL] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x300 },
++ [DBG_WFDMA_WED_RX_CTRL] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x400 },
+ [DBG_INT_SOURCE_CSR] = { MT_DBG_WFDMA0_BASE, 0x200 },
+ [DBG_INT_MASK_CSR] = { MT_DBG_WFDMA0_BASE, 0x204 },
+ [DBG_INT1_SOURCE_CSR] = { MT_DBG_WFDMA0_PCIE1_BASE, 0x200 },
+@@ -450,11 +456,15 @@ struct bin_debug_hdr {
+ #define MT_DBG_RX_EVENT_RING_BASE __DBG_REG(dev, DBG_RX_EVENT_RING_BASE)
+ #define MT_DBG_RX_STS_RING_BASE __DBG_REG(dev, DBG_RX_STS_RING_BASE)
+ #define MT_DBG_RX_DATA_RING_BASE __DBG_REG(dev, DBG_RX_DATA_RING_BASE)
++#define MT_DBG_WFDMA_WED_TX_CTRL_BASE __DBG_REG(dev, DBG_WFDMA_WED_TX_CTRL)
++#define MT_DBG_WFDMA_WED_RX_CTRL_BASE __DBG_REG(dev, DBG_WFDMA_WED_RX_CTRL)
+
+ #define MT_DBG_TX_RING_CTRL(n) (MT_DBG_TX_RING_BASE + (0x10 * (n)))
+ #define MT_DBG_RX_DATA_RING_CTRL(n) (MT_DBG_RX_DATA_RING_BASE + (0x10 * (n)))
+ #define MT_DBG_RX_EVENT_RING_CTRL(n) (MT_DBG_RX_EVENT_RING_BASE + (0x10 * (n)))
+
++#define MT_DBG_WFDMA_WED_TX_CTRL(n) (MT_DBG_WFDMA_WED_TX_CTRL_BASE + (0x10 * (n)))
++#define MT_DBG_WFDMA_WED_RX_CTRL(n) (MT_DBG_WFDMA_WED_RX_CTRL_BASE + (0x10 * (n)))
+ /* WFDMA COMMON */
+ #define MT_DBG_INT_SOURCE_CSR __DBG_REG(dev, DBG_INT_SOURCE_CSR)
+ #define MT_DBG_INT_MASK_CSR __DBG_REG(dev, DBG_INT_MASK_CSR)
+diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c
+index e336b35a..c9d634ce 100644
+--- a/mt7915/mtk_debugfs.c
++++ b/mt7915/mtk_debugfs.c
+@@ -855,12 +855,22 @@ mt7986_show_host_dma_info(struct seq_file *s, struct mt7915_dev *dev)
+ "Name", "Base", "Cnt", "CIDX", "DIDX", "QCnt");
+ dump_dma_tx_ring_info(s, dev, "T16:FWDL", MT_DBG_TX_RING_CTRL(0));
+ dump_dma_tx_ring_info(s, dev, "T17:Cmd(H2WM)", MT_DBG_TX_RING_CTRL(1));
+- dump_dma_tx_ring_info(s, dev, "T18:TXD0(H2WA)", MT_DBG_TX_RING_CTRL(2));
+- dump_dma_tx_ring_info(s, dev, "T19:TXD1(H2WA)", MT_DBG_TX_RING_CTRL(3));
++
++ if (is_mt7916(&dev->mt76) && mtk_wed_device_active(&dev->mt76.mmio.wed)) {
++ dump_dma_tx_ring_info(s, dev, "T18:TXD0(H2WA)", MT_DBG_WFDMA_WED_TX_CTRL(0));
++ dump_dma_tx_ring_info(s, dev, "T19:TXD1(H2WA)", MT_DBG_WFDMA_WED_TX_CTRL(1));
++ } else {
++ dump_dma_tx_ring_info(s, dev, "T18:TXD0(H2WA)", MT_DBG_TX_RING_CTRL(2));
++ dump_dma_tx_ring_info(s, dev, "T19:TXD1(H2WA)", MT_DBG_TX_RING_CTRL(3));
++ }
++
+ dump_dma_tx_ring_info(s, dev, "T20:Cmd(H2WA)", MT_DBG_TX_RING_CTRL(4));
+ dump_dma_rx_ring_info(s, dev, "R0:Event(WM2H)", MT_DBG_RX_DATA_RING_CTRL(0));
+ dump_dma_rx_ring_info(s, dev, "R1:Event(WA2H)", MT_DBG_RX_EVENT_RING_CTRL(1));
+- dump_dma_rx_ring_info(s, dev, "R2:TxDone(WA2H)", MT_DBG_RX_EVENT_RING_CTRL(2));
++ if (is_mt7916(&dev->mt76) && mtk_wed_device_active(&dev->mt76.mmio.wed))
++ dump_dma_rx_ring_info(s, dev, "R2:TxDone(WA2H)", MT_DBG_WFDMA_WED_RX_CTRL(1));
++ else
++ dump_dma_rx_ring_info(s, dev, "R2:TxDone(WA2H)", MT_DBG_RX_EVENT_RING_CTRL(2));
+ dump_dma_rx_ring_info(s, dev, "R3:TxDone1(WA2H)", MT_DBG_RX_EVENT_RING_CTRL(3));
+ dump_dma_rx_ring_info(s, dev, "R4:Data0(MAC2H)", MT_DBG_RX_DATA_RING_CTRL(0));
+ dump_dma_rx_ring_info(s, dev, "R5:Data1(MAC2H)", MT_DBG_RX_DATA_RING_CTRL(1));
+--
+2.18.0
+