blob: 4d374c00fbf0f0b63606055feafca9cefd6feed0 [file] [log] [blame]
From 0374780c5201fd70824eea091a416557020d5734 Mon Sep 17 00:00:00 2001
From: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
Date: Thu, 13 Oct 2022 13:22:05 +0800
Subject: [PATCH 1128/1131] mt76: mt7915: add E3 re-bonding for low yield rate
issue
Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
---
mt7915/eeprom.c | 27 ++++++++++++++++++++++++++-
mt7915/mcu.c | 13 ++++++++++---
mt7915/mt7915.h | 3 ++-
3 files changed, 38 insertions(+), 5 deletions(-)
diff --git a/mt7915/eeprom.c b/mt7915/eeprom.c
index 54803e8..849275e 100644
--- a/mt7915/eeprom.c
+++ b/mt7915/eeprom.c
@@ -132,7 +132,7 @@ static int mt7915_eeprom_load(struct mt7915_dev *dev)
/* read eeprom data from efuse */
block_num = DIV_ROUND_UP(eeprom_size, eeprom_blk_size);
for (i = 0; i < block_num; i++) {
- ret = mt7915_mcu_get_eeprom(dev, i * eeprom_blk_size);
+ ret = mt7915_mcu_get_eeprom(dev, i * eeprom_blk_size, NULL);
if (ret < 0)
return ret;
}
@@ -239,6 +239,29 @@ void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev,
dev->chainshift = hweight8(dev->mphy.chainmask);
}
+void mt7915_eeprom_rebonding(struct mt7915_dev *dev)
+{
+#define MT7976_ADIE_MASK BIT(1)
+#define MT7986_ADIE1_EFFUSE_OFFSET 0x1000
+#define MT7986_ADIE1_MT7976C_OFFSET 0x270
+#define MT7986_ADIE1_E3_OFFSET 0x271
+ u32 adie_offset, sku = mt7915_check_adie(dev, true);
+ u8 read_buf, *eeprom = dev->mt76.eeprom.data;
+
+ if (!(sku & MT7976_ADIE_MASK))
+ return;
+
+ adie_offset = (sku == MT7976_DUAL_ADIE) ? MT7986_ADIE1_EFFUSE_OFFSET : 0;
+
+ /* 7976 A-Die, To identify MT7976C */
+ mt7915_mcu_get_eeprom(dev, MT7986_ADIE1_MT7976C_OFFSET + adie_offset, &read_buf);
+ eeprom[MT7986_ADIE1_MT7976C_OFFSET] = read_buf;
+
+ /* E3 re-binding */
+ mt7915_mcu_get_eeprom(dev, MT7986_ADIE1_E3_OFFSET + adie_offset, &read_buf);
+ eeprom[MT7986_ADIE1_E3_OFFSET] = read_buf;
+}
+
int mt7915_eeprom_init(struct mt7915_dev *dev)
{
int ret;
@@ -275,6 +298,8 @@ int mt7915_eeprom_init(struct mt7915_dev *dev)
return ret;
}
+ mt7915_eeprom_rebonding(dev);
+
ret = mt7915_eeprom_load_precal(dev);
if (ret)
return ret;
diff --git a/mt7915/mcu.c b/mt7915/mcu.c
index 36a33f6..cb47ae6 100644
--- a/mt7915/mcu.c
+++ b/mt7915/mcu.c
@@ -2836,7 +2836,7 @@ int mt7915_mcu_set_eeprom(struct mt7915_dev *dev, bool flash_mode)
&req, sizeof(req), true);
}
-int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset)
+int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf)
{
struct mt7915_mcu_eeprom_info req = {
.addr = cpu_to_le32(round_down(offset,
@@ -2854,8 +2854,15 @@ int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset)
return ret;
res = (struct mt7915_mcu_eeprom_info *)skb->data;
- buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr);
- memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE);
+
+ if (read_buf) {
+ u32 offs = offset % MT7915_EEPROM_BLOCK_SIZE;
+ *read_buf = res->data[offs];
+ } else {
+ buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr);
+ memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE);
+ }
+
dev_kfree_skb(skb);
return 0;
diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
index b9b86b8..ab81d41 100644
--- a/mt7915/mt7915.h
+++ b/mt7915/mt7915.h
@@ -556,6 +556,7 @@ u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id);
int mt7915_register_device(struct mt7915_dev *dev);
void mt7915_unregister_device(struct mt7915_dev *dev);
+void mt7915_eeprom_rebonding(struct mt7915_dev *dev);
int mt7915_eeprom_init(struct mt7915_dev *dev);
void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev,
struct mt7915_phy *phy);
@@ -610,7 +611,7 @@ int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,
struct ieee80211_sta *sta,
void *data, u32 field);
int mt7915_mcu_set_eeprom(struct mt7915_dev *dev, bool flash_mode);
-int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset);
+int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf);
int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num);
int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable,
bool hdr_trans);
--
2.36.1