| From bd93ad7026e316307453438f4b7bce59e30bf03e Mon Sep 17 00:00:00 2001 |
| From: Benjamin Lin <benjamin-jw.lin@mediatek.com> |
| Date: Wed, 7 Jun 2023 14:11:28 +0800 |
| Subject: [PATCH 77/98] wifi: mt76: mt7996: support TX/RX for Kite without WED |
| and RRO |
| |
| Signed-off-by: Benjamin Lin <benjamin-jw.lin@mediatek.com> |
| Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com> |
| --- |
| mt76_connac3_mac.h | 3 ++- |
| mt7996/dma.c | 61 +++++++++++++++++++++++++++++++++++++--------- |
| mt7996/init.c | 10 ++++++-- |
| mt7996/mac.c | 7 ++++-- |
| mt7996/mt7996.h | 4 +-- |
| mt7996/regs.h | 4 +-- |
| 6 files changed, 68 insertions(+), 21 deletions(-) |
| |
| diff --git a/mt76_connac3_mac.h b/mt76_connac3_mac.h |
| index 7402de2..3fd46ae 100644 |
| --- a/mt76_connac3_mac.h |
| +++ b/mt76_connac3_mac.h |
| @@ -244,7 +244,8 @@ enum tx_mgnt_type { |
| #define MT_TXD6_TX_RATE GENMASK(21, 16) |
| #define MT_TXD6_TIMESTAMP_OFS_EN BIT(15) |
| #define MT_TXD6_TIMESTAMP_OFS_IDX GENMASK(14, 10) |
| -#define MT_TXD6_MSDU_CNT GENMASK(9, 4) |
| +#define MT_TXD6_MSDU_CNT_MT7996 GENMASK(9, 4) |
| +#define MT_TXD6_MSDU_CNT_MT7992 GENMASK(15, 10) |
| #define MT_TXD6_DIS_MAT BIT(3) |
| #define MT_TXD6_DAS BIT(2) |
| #define MT_TXD6_AMSDU_CAP BIT(1) |
| diff --git a/mt7996/dma.c b/mt7996/dma.c |
| index b2c7ae6..1163550 100644 |
| --- a/mt7996/dma.c |
| +++ b/mt7996/dma.c |
| @@ -57,13 +57,21 @@ static void mt7996_dma_config(struct mt7996_dev *dev) |
| RXQ_CONFIG(MT_RXQ_MCU, WFDMA0, MT_INT_RX_DONE_WM, MT7996_RXQ_MCU_WM); |
| RXQ_CONFIG(MT_RXQ_MCU_WA, WFDMA0, MT_INT_RX_DONE_WA, MT7996_RXQ_MCU_WA); |
| |
| - /* band0/band1 */ |
| + /* MT7996 band0/band1 |
| + * MT7992 band0 |
| + */ |
| RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_RX_DONE_BAND0, MT7996_RXQ_BAND0); |
| RXQ_CONFIG(MT_RXQ_MAIN_WA, WFDMA0, MT_INT_RX_DONE_WA_MAIN, MT7996_RXQ_MCU_WA_MAIN); |
| |
| - /* band2 */ |
| - RXQ_CONFIG(MT_RXQ_BAND2, WFDMA0, MT_INT_RX_DONE_BAND2, MT7996_RXQ_BAND2); |
| - RXQ_CONFIG(MT_RXQ_BAND2_WA, WFDMA0, MT_INT_RX_DONE_WA_TRI, MT7996_RXQ_MCU_WA_TRI); |
| + if (is_mt7996(&dev->mt76)) { |
| + /* MT7996 band2 */ |
| + RXQ_CONFIG(MT_RXQ_BAND2, WFDMA0, MT_INT_RX_DONE_BAND2, MT7996_RXQ_BAND2); |
| + RXQ_CONFIG(MT_RXQ_BAND2_WA, WFDMA0, MT_INT_RX_DONE_WA_TRI, MT7996_RXQ_MCU_WA_TRI); |
| + } else { |
| + /* MT7992 band1 */ |
| + RXQ_CONFIG(MT_RXQ_BAND1, WFDMA0, MT_INT_RX_DONE_BAND1, MT7996_RXQ_BAND1); |
| + RXQ_CONFIG(MT_RXQ_BAND1_WA, WFDMA0, MT_INT_RX_DONE_WA_EXT, MT7996_RXQ_MCU_WA_EXT); |
| + } |
| |
| if (dev->has_rro) { |
| /* band0 */ |
| @@ -90,8 +98,12 @@ static void mt7996_dma_config(struct mt7996_dev *dev) |
| |
| /* data tx queue */ |
| TXQ_CONFIG(0, WFDMA0, MT_INT_TX_DONE_BAND0, MT7996_TXQ_BAND0); |
| - TXQ_CONFIG(1, WFDMA0, MT_INT_TX_DONE_BAND1, MT7996_TXQ_BAND1); |
| - TXQ_CONFIG(2, WFDMA0, MT_INT_TX_DONE_BAND2, MT7996_TXQ_BAND2); |
| + if (is_mt7996(&dev->mt76)) { |
| + TXQ_CONFIG(1, WFDMA0, MT_INT_TX_DONE_BAND1, MT7996_TXQ_BAND1); |
| + TXQ_CONFIG(2, WFDMA0, MT_INT_TX_DONE_BAND2, MT7996_TXQ_BAND2); |
| + } else { |
| + TXQ_CONFIG(1, WFDMA0, MT_INT_TX_DONE_BAND2, MT7996_TXQ_BAND2); |
| + } |
| |
| /* mcu tx queue */ |
| MCUQ_CONFIG(MT_MCUQ_WM, WFDMA0, MT_INT_TX_DONE_MCU_WM, MT7996_TXQ_MCU_WM); |
| @@ -123,10 +135,15 @@ static void __mt7996_dma_prefetch(struct mt7996_dev *dev, u32 ofs) |
| mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MCU) + ofs, PREFETCH(0x2)); |
| mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MCU_WA) + ofs, PREFETCH(0x2)); |
| mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MAIN_WA) + ofs, PREFETCH(0x2)); |
| - mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND2_WA) + ofs, PREFETCH(0x2)); |
| + if (is_mt7996(&dev->mt76)) |
| + mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND2_WA) + ofs, PREFETCH(0x2)); |
| + else |
| + mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND1_WA) + ofs, PREFETCH(0x2)); |
| mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MAIN) + ofs, PREFETCH(0x10)); |
| - mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND2) + ofs, PREFETCH(0x10)); |
| - |
| + if (is_mt7996(&dev->mt76)) |
| + mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND2) + ofs, PREFETCH(0x10)); |
| + else |
| + mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND1) + ofs, PREFETCH(0x10)); |
| if (dev->has_rro) { |
| mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_RRO_BAND0) + ofs, |
| PREFETCH(0x10)); |
| @@ -488,7 +505,7 @@ int mt7996_dma_init(struct mt7996_dev *dev) |
| if (ret) |
| return ret; |
| |
| - /* rx data queue for band0 and band1 */ |
| + /* rx data queue for band0 and MT7996 band1 */ |
| if (mtk_wed_device_active(wed) && mtk_wed_get_rx_capa(wed)) { |
| dev->mt76.q_rx[MT_RXQ_MAIN].flags = MT_WED_Q_RX(0); |
| dev->mt76.q_rx[MT_RXQ_MAIN].wed = wed; |
| @@ -517,7 +534,7 @@ int mt7996_dma_init(struct mt7996_dev *dev) |
| return ret; |
| |
| if (mt7996_band_valid(dev, MT_BAND2)) { |
| - /* rx data queue for band2 */ |
| + /* rx data queue for MT7996 band2 */ |
| rx_base = MT_RXQ_RING_BASE(MT_RXQ_BAND2) + hif1_ofs; |
| if (mtk_wed_device_active(wed_hif2) && mtk_wed_get_rx_capa(wed_hif2)) { |
| dev->mt76.q_rx[MT_RXQ_BAND2].flags = MT_WED_Q_RX(0); |
| @@ -531,7 +548,7 @@ int mt7996_dma_init(struct mt7996_dev *dev) |
| if (ret) |
| return ret; |
| |
| - /* tx free notify event from WA for band2 |
| + /* tx free notify event from WA for MT7996 band2 |
| * use pcie0's rx ring3, but, redirect pcie0 rx ring3 interrupt to pcie1 |
| */ |
| if (mtk_wed_device_active(wed_hif2) && !dev->has_rro) { |
| @@ -546,6 +563,26 @@ int mt7996_dma_init(struct mt7996_dev *dev) |
| MT_RXQ_RING_BASE(MT_RXQ_BAND2_WA)); |
| if (ret) |
| return ret; |
| + } else if (mt7996_band_valid(dev, MT_BAND1)) { |
| + /* rx data queue for MT7992 band1 */ |
| + rx_base = MT_RXQ_RING_BASE(MT_RXQ_BAND1) + hif1_ofs; |
| + ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_BAND1], |
| + MT_RXQ_ID(MT_RXQ_BAND1), |
| + MT7996_RX_RING_SIZE, |
| + MT_RX_BUF_SIZE, |
| + rx_base); |
| + if (ret) |
| + return ret; |
| + |
| + /* tx free notify event from WA for MT7992 band1 */ |
| + rx_base = MT_RXQ_RING_BASE(MT_RXQ_BAND1_WA) + hif1_ofs; |
| + ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_BAND1_WA], |
| + MT_RXQ_ID(MT_RXQ_BAND1_WA), |
| + MT7996_RX_MCU_RING_SIZE, |
| + MT_RX_BUF_SIZE, |
| + rx_base); |
| + if (ret) |
| + return ret; |
| } |
| |
| if (mtk_wed_device_active(wed) && mtk_wed_get_rx_capa(wed) && |
| diff --git a/mt7996/init.c b/mt7996/init.c |
| index 20e14e7..d539af0 100644 |
| --- a/mt7996/init.c |
| +++ b/mt7996/init.c |
| @@ -505,7 +505,12 @@ void mt7996_mac_init(struct mt7996_dev *dev) |
| mt76_rmw_field(dev, MT_DMA_TCRF1(2), MT_DMA_TCRF1_QIDX, 0); |
| |
| /* rro module init */ |
| - mt7996_mcu_set_rro(dev, UNI_RRO_SET_PLATFORM_TYPE, 2); |
| + if (is_mt7996(&dev->mt76)) |
| + mt7996_mcu_set_rro(dev, UNI_RRO_SET_PLATFORM_TYPE, 2); |
| + else |
| + mt7996_mcu_set_rro(dev, UNI_RRO_SET_PLATFORM_TYPE, |
| + dev->hif2 ? 7 : 0); |
| + |
| if (dev->has_rro) { |
| u16 timeout; |
| |
| @@ -562,7 +567,8 @@ static int mt7996_register_phy(struct mt7996_dev *dev, struct mt7996_phy *phy, |
| if (phy) |
| return 0; |
| |
| - if (band == MT_BAND2 && dev->hif2) { |
| + if ((is_mt7996(&dev->mt76) && band == MT_BAND2 && dev->hif2) || |
| + (is_mt7992(&dev->mt76) && band == MT_BAND1 && dev->hif2)) { |
| hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); |
| wed = &dev->mt76.mmio.wed_hif2; |
| } |
| diff --git a/mt7996/mac.c b/mt7996/mac.c |
| index 22cff71..a92298d 100644 |
| --- a/mt7996/mac.c |
| +++ b/mt7996/mac.c |
| @@ -878,8 +878,11 @@ void mt7996_mac_write_txwi(struct mt7996_dev *dev, __le32 *txwi, |
| val |= MT_TXD5_TX_STATUS_HOST; |
| txwi[5] = cpu_to_le32(val); |
| |
| - val = MT_TXD6_DIS_MAT | MT_TXD6_DAS | |
| - FIELD_PREP(MT_TXD6_MSDU_CNT, 1); |
| + val = MT_TXD6_DIS_MAT | MT_TXD6_DAS; |
| + if (is_mt7996(&dev->mt76)) |
| + val |= FIELD_PREP(MT_TXD6_MSDU_CNT_MT7996, 1); |
| + else |
| + val |= FIELD_PREP(MT_TXD6_MSDU_CNT_MT7992, 1); |
| txwi[6] = cpu_to_le32(val); |
| txwi[7] = 0; |
| |
| diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h |
| index 06e00f4..4333d51 100644 |
| --- a/mt7996/mt7996.h |
| +++ b/mt7996/mt7996.h |
| @@ -152,10 +152,10 @@ enum mt7996_rxq_id { |
| MT7996_RXQ_MCU_WM = 0, |
| MT7996_RXQ_MCU_WA, |
| MT7996_RXQ_MCU_WA_MAIN = 2, |
| - MT7996_RXQ_MCU_WA_EXT = 2,/* unused */ |
| + MT7996_RXQ_MCU_WA_EXT = 3, /* Only used by MT7992. */ |
| MT7996_RXQ_MCU_WA_TRI = 3, |
| MT7996_RXQ_BAND0 = 4, |
| - MT7996_RXQ_BAND1 = 4,/* unused */ |
| + MT7996_RXQ_BAND1 = 5, /* Only used by MT7992. */ |
| MT7996_RXQ_BAND2 = 5, |
| MT7996_RXQ_RRO_BAND0 = 8, |
| MT7996_RXQ_RRO_BAND1 = 8,/* unused */ |
| diff --git a/mt7996/regs.h b/mt7996/regs.h |
| index 77a2f9d..c9e90e3 100644 |
| --- a/mt7996/regs.h |
| +++ b/mt7996/regs.h |
| @@ -491,12 +491,12 @@ enum offs_rev { |
| #define MT_INT1_MASK_CSR MT_WFDMA0_PCIE1(0x204) |
| |
| #define MT_INT_RX_DONE_BAND0 BIT(12) |
| -#define MT_INT_RX_DONE_BAND1 BIT(12) |
| +#define MT_INT_RX_DONE_BAND1 BIT(13) /* Only used by MT7992. */ |
| #define MT_INT_RX_DONE_BAND2 BIT(13) |
| #define MT_INT_RX_DONE_WM BIT(0) |
| #define MT_INT_RX_DONE_WA BIT(1) |
| #define MT_INT_RX_DONE_WA_MAIN BIT(2) |
| -#define MT_INT_RX_DONE_WA_EXT BIT(2) |
| +#define MT_INT_RX_DONE_WA_EXT BIT(3) /* Only used by MT7992. */ |
| #define MT_INT_RX_DONE_WA_TRI BIT(3) |
| #define MT_INT_RX_TXFREE_MAIN BIT(17) |
| #define MT_INT_RX_TXFREE_TRI BIT(15) |
| -- |
| 2.18.0 |
| |