[][Kernel][mt7988][eth][Add Ethernet clock config]
[Description]
Add Ethernet clock configurations which is suggested by
clock owner - Xiufeng.
If without this patch, some Ethernet/WED functions won't
work after removing mt7988-clkitg.dtsi.
[Release-log]
N/A
Change-Id: I835888ed0d6408d2dd7eb2c704ecc0d3c6f076a8
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6988778
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
index 65ec837..64f3c51 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
@@ -68,9 +68,9 @@
<&topckgen CK_TOP_CB_RTC_32P7K>,
<&topckgen CK_TOP_INFRA_F32K>,
<&topckgen CK_TOP_CKSQ_SRC>,
- <&topckgen CK_TOP_NETSYS_2X>,
- <&topckgen CK_TOP_NETSYS_GSW>,
- <&topckgen CK_TOP_NETSYS_WED_MCU>,
+ <&system_clk>,
+ <&system_clk>,
+ <&system_clk>,
<&topckgen CK_TOP_EIP197>,
<&topckgen CK_TOP_EMMC_250M>,
<&topckgen CK_TOP_EMMC_400M>,
@@ -94,13 +94,13 @@
<&topckgen CK_TOP_USB_REF>,
<&topckgen CK_TOP_USB_CK_P1>,
<&system_clk>,
- <&topckgen CK_TOP_NETSYS_SEL>,
- <&topckgen CK_TOP_NETSYS_500M_SEL>,
<&system_clk>,
<&system_clk>,
- <&topckgen CK_TOP_ETH_GMII_SEL>,
- <&topckgen CK_TOP_NETSYS_MCU_SEL>,
- <&topckgen CK_TOP_NETSYS_PAO_2X_SEL>,
+ <&system_clk>,
+ <&system_clk>,
+ <&system_clk>,
+ <&system_clk>,
+ <&system_clk>,
<&topckgen CK_TOP_EIP197_SEL>,
<&topckgen CK_TOP_AXI_INFRA_SEL>,
<&system_clk>,
@@ -135,14 +135,14 @@
<&topckgen CK_TOP_SGM_SBUS_0_SEL>,
<&system_clk>,
<&topckgen CK_TOP_SGM_SBUS_1_SEL>,
- <&topckgen CK_TOP_XFI_PHY_0_XTAL_SEL>,
- <&topckgen CK_TOP_XFI_PHY_1_XTAL_SEL>,
+ <&system_clk>,
+ <&system_clk>,
<&topckgen CK_TOP_SYSAXI_SEL>,
<&topckgen CK_TOP_SYSAPB_SEL>,
- <&topckgen CK_TOP_ETH_REFCK_50M_SEL>,
- <&topckgen CK_TOP_ETH_SYS_200M_SEL>,
- <&topckgen CK_TOP_ETH_SYS_SEL>,
- <&topckgen CK_TOP_ETH_XGMII_SEL>,
+ <&system_clk>,
+ <&system_clk>,
+ <&system_clk>,
+ <&system_clk>,
<&topckgen CK_TOP_DRAMC_SEL>,
<&topckgen CK_TOP_DRAMC_MD32_SEL>,
<&topckgen CK_TOP_INFRA_F26M_SEL>,
@@ -158,11 +158,11 @@
<&topckgen CK_TOP_DA_SELM_XTAL_SEL>,
<&topckgen CK_TOP_PEXTP_SEL>,
<&topckgen CK_TOP_MCUSYS_BACKUP_625M_SEL>,
- <&topckgen CK_TOP_NETSYS_SYNC_250M_SEL>,
+ <&system_clk>,
<&topckgen CK_TOP_MACSEC_SEL>,
- <&topckgen CK_TOP_NETSYS_PPEFB_250M_SEL>,
- <&topckgen CK_TOP_NETSYS_WARP_SEL>,
- <&topckgen CK_TOP_ETH_MII_SEL>,
+ <&system_clk>,
+ <&system_clk>,
+ <&system_clk>,
<&infracfg CK_INFRA_CK_F26M>,
<&system_clk>,
<&system_clk>,
@@ -317,9 +317,9 @@
<&system_clk>,
<&system_clk>,
<&system_clk>,
+ <&system_clk>,
- <ðwarp CK_ETHWARP_WOCPU2_EN>,
- <ðwarp CK_ETHWARP_WOCPU1_EN>,
- <ðwarp CK_ETHWARP_WOCPU0_EN>,
+ <&system_clk>,
+ <&system_clk>,
<&system_clk>,
<&system_clk>,
<&system_clk>,
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
index cec46ce..3dd999f 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
@@ -765,15 +765,42 @@
<&sgmiisys0 CK_SGM0_RX_EN>,
<&sgmiisys1 CK_SGM1_TX_EN>,
<&sgmiisys1 CK_SGM1_RX_EN>,
+ <ðwarp CK_ETHWARP_WOCPU2_EN>,
+ <ðwarp CK_ETHWARP_WOCPU1_EN>,
+ <ðwarp CK_ETHWARP_WOCPU0_EN>,
<&topckgen CK_TOP_USXGMII_SBUS_0_SEL>,
<&topckgen CK_TOP_USXGMII_SBUS_1_SEL>,
<&topckgen CK_TOP_SGM_0_SEL>,
- <&topckgen CK_TOP_SGM_1_SEL>;
+ <&topckgen CK_TOP_SGM_1_SEL>,
+ <&topckgen CK_TOP_XFI_PHY_0_XTAL_SEL>,
+ <&topckgen CK_TOP_XFI_PHY_1_XTAL_SEL>,
+ <&topckgen CK_TOP_ETH_GMII_SEL>,
+ <&topckgen CK_TOP_ETH_REFCK_50M_SEL>,
+ <&topckgen CK_TOP_ETH_SYS_200M_SEL>,
+ <&topckgen CK_TOP_ETH_SYS_SEL>,
+ <&topckgen CK_TOP_ETH_XGMII_SEL>,
+ <&topckgen CK_TOP_ETH_MII_SEL>,
+ <&topckgen CK_TOP_NETSYS_SEL>,
+ <&topckgen CK_TOP_NETSYS_500M_SEL>,
+ <&topckgen CK_TOP_NETSYS_PAO_2X_SEL>,
+ <&topckgen CK_TOP_NETSYS_SYNC_250M_SEL>,
+ <&topckgen CK_TOP_NETSYS_PPEFB_250M_SEL>,
+ <&topckgen CK_TOP_NETSYS_WARP_SEL>;
clock-names = "xgp1", "xgp2", "xgp3", "fe", "gp2", "gp1",
"gp3", "esw", "crypto", "sgmii_tx250m",
"sgmii_rx250m", "sgmii2_tx250m", "sgmii2_rx250m",
- "usxgmii0_sel", "usxgmii1_sel",
- "sgm0_sel", "sgm1_sel";
+ "ethwarp_wocpu2", "ethwarp_wocpu1",
+ "ethwarp_wocpu0", "top_usxgmii0_sel",
+ "top_usxgmii1_sel", "top_sgm0_sel",
+ "top_sgm1_sel", "top_xfi_phy0_xtal_sel",
+ "top_xfi_phy1_xtal_sel", "top_eth_gmii_sel",
+ "top_eth_refck_50m_sel", "top_eth_sys_200m_sel",
+ "top_eth_sys_sel", "top_eth_xgmii_sel",
+ "top_eth_mii_sel", "top_netsys_sel",
+ "top_netsys_500m_sel", "top_netsys_pao_2x_sel",
+ "top_netsys_sync_250m_sel",
+ "top_netsys_ppefb_250m_sel",
+ "top_netsys_warp_sel";
assigned-clocks = <&topckgen CK_TOP_NETSYS_2X_SEL>,
<&topckgen CK_TOP_NETSYS_GSW_SEL>,
<&topckgen CK_TOP_USXGMII_SBUS_0_SEL>,
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index d9856f0..147f9b7 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -71,8 +71,15 @@
"xgp1", "xgp2", "xgp3", "crypto", "fe", "trgpll",
"sgmii_tx250m", "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb",
"sgmii2_tx250m", "sgmii2_rx250m", "sgmii2_cdr_ref", "sgmii2_cdr_fb",
- "sgmii_ck", "eth2pll", "wocpu0","wocpu1",
- "usxgmii0_sel", "usxgmii1_sel", "sgm0_sel", "sgm1_sel",
+ "sgmii_ck", "eth2pll", "wocpu0", "wocpu1",
+ "ethwarp_wocpu2", "ethwarp_wocpu1", "ethwarp_wocpu0",
+ "top_usxgmii0_sel", "top_usxgmii1_sel", "top_sgm0_sel", "top_sgm1_sel",
+ "top_xfi_phy0_xtal_sel", "top_xfi_phy1_xtal_sel", "top_eth_gmii_sel",
+ "top_eth_refck_50m_sel", "top_eth_sys_200m_sel", "top_eth_sys_sel",
+ "top_eth_xgmii_sel", "top_eth_mii_sel", "top_netsys_sel",
+ "top_netsys_500m_sel", "top_netsys_pao_2x_sel",
+ "top_netsys_sync_250m_sel", "top_netsys_ppefb_250m_sel",
+ "top_netsys_warp_sel",
};
void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg)
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index dc02870..fe36102 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -1023,10 +1023,27 @@
MTK_CLK_ETH2PLL,
MTK_CLK_WOCPU0,
MTK_CLK_WOCPU1,
- MTK_CLK_USXGMII0_SEL,
- MTK_CLK_USXGMII1_SEL,
- MTK_CLK_SGM0_SEL,
- MTK_CLK_SGM1_SEL,
+ MTK_CLK_ETHWARP_WOCPU2,
+ MTK_CLK_ETHWARP_WOCPU1,
+ MTK_CLK_ETHWARP_WOCPU0,
+ MTK_CLK_TOP_USXGMII_SBUS_0_SEL,
+ MTK_CLK_TOP_USXGMII_SBUS_1_SEL,
+ MTK_CLK_TOP_SGM_0_SEL,
+ MTK_CLK_TOP_SGM_1_SEL,
+ MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL,
+ MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL,
+ MTK_CLK_TOP_ETH_GMII_SEL,
+ MTK_CLK_TOP_ETH_REFCK_50M_SEL,
+ MTK_CLK_TOP_ETH_SYS_200M_SEL,
+ MTK_CLK_TOP_ETH_SYS_SEL,
+ MTK_CLK_TOP_ETH_XGMII_SEL,
+ MTK_CLK_TOP_ETH_MII_SEL,
+ MTK_CLK_TOP_NETSYS_SEL,
+ MTK_CLK_TOP_NETSYS_500M_SEL,
+ MTK_CLK_TOP_NETSYS_PAO_2X_SEL,
+ MTK_CLK_TOP_NETSYS_SYNC_250M_SEL,
+ MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL,
+ MTK_CLK_TOP_NETSYS_WARP_SEL,
MTK_CLK_MAX
};
@@ -1090,10 +1107,27 @@
BIT(MTK_CLK_SGMII_RX_250M) | \
BIT(MTK_CLK_SGMII2_TX_250M) | \
BIT(MTK_CLK_SGMII2_RX_250M) | \
- BIT(MTK_CLK_USXGMII0_SEL) | \
- BIT(MTK_CLK_USXGMII1_SEL) | \
- BIT(MTK_CLK_SGM0_SEL) | \
- BIT(MTK_CLK_SGM1_SEL))
+ BIT(MTK_CLK_ETHWARP_WOCPU2) | \
+ BIT(MTK_CLK_ETHWARP_WOCPU1) | \
+ BIT(MTK_CLK_ETHWARP_WOCPU0) | \
+ BIT(MTK_CLK_TOP_USXGMII_SBUS_0_SEL) | \
+ BIT(MTK_CLK_TOP_USXGMII_SBUS_1_SEL) | \
+ BIT(MTK_CLK_TOP_SGM_0_SEL) | \
+ BIT(MTK_CLK_TOP_SGM_1_SEL) | \
+ BIT(MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL) | \
+ BIT(MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL) | \
+ BIT(MTK_CLK_TOP_ETH_GMII_SEL) | \
+ BIT(MTK_CLK_TOP_ETH_REFCK_50M_SEL) | \
+ BIT(MTK_CLK_TOP_ETH_SYS_200M_SEL) | \
+ BIT(MTK_CLK_TOP_ETH_SYS_SEL) | \
+ BIT(MTK_CLK_TOP_ETH_XGMII_SEL) | \
+ BIT(MTK_CLK_TOP_ETH_MII_SEL) | \
+ BIT(MTK_CLK_TOP_NETSYS_SEL) | \
+ BIT(MTK_CLK_TOP_NETSYS_500M_SEL) | \
+ BIT(MTK_CLK_TOP_NETSYS_PAO_2X_SEL) | \
+ BIT(MTK_CLK_TOP_NETSYS_SYNC_250M_SEL) | \
+ BIT(MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL) | \
+ BIT(MTK_CLK_TOP_NETSYS_WARP_SEL))
enum mtk_dev_state {
MTK_HW_INIT,
@@ -1452,7 +1486,7 @@
struct mtk_soc_data {
u32 ana_rgc3;
u64 caps;
- u32 required_clks;
+ u64 required_clks;
bool required_pctl;
netdev_features_t hw_features;
bool has_sram;