| From 2231dfcbcffef50846a9c240651c62771d7e33b0 Mon Sep 17 00:00:00 2001 |
| From: Sam Shih <sam.shih@mediatek.com> |
| Date: Fri, 2 Jun 2023 13:06:18 +0800 |
| Subject: [PATCH] |
| [spi-and-storage][999-2362-spi-mtk-nor-fix-timeout-calculation-overflow.patch] |
| |
| --- |
| drivers/spi/spi-mtk-nor.c | 6 +++++- |
| 1 file changed, 5 insertions(+), 1 deletion(-) |
| |
| diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c |
| index c15a99105..4f72f08c0 100644 |
| --- a/drivers/spi/spi-mtk-nor.c |
| +++ b/drivers/spi/spi-mtk-nor.c |
| @@ -89,7 +89,7 @@ |
| // Buffered page program can do one 128-byte transfer |
| #define MTK_NOR_PP_SIZE 128 |
| |
| -#define CLK_TO_US(sp, clkcnt) ((clkcnt) * 1000000 / sp->spi_freq) |
| +#define CLK_TO_US(sp, clkcnt) DIV_ROUND_UP(clkcnt, sp->spi_freq / 1000000) |
| |
| struct mtk_nor { |
| struct spi_controller *ctlr; |
| @@ -177,6 +177,10 @@ static int mtk_nor_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) |
| if ((op->addr.nbytes == 3) || (op->addr.nbytes == 4)) { |
| if ((op->data.dir == SPI_MEM_DATA_IN) && |
| mtk_nor_match_read(op)) { |
| + // limit size to prevent timeout calculation overflow |
| + if (op->data.nbytes > 0x400000) |
| + op->data.nbytes = 0x400000; |
| + |
| if ((op->addr.val & MTK_NOR_DMA_ALIGN_MASK) || |
| (op->data.nbytes < MTK_NOR_DMA_ALIGN)) |
| op->data.nbytes = 1; |
| -- |
| 2.34.1 |
| |