| --- a/drivers/pinctrl/mediatek/pinctrl-moore.c |
| +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c |
| @@ -99,14 +99,22 @@ static int mtk_pinconf_get(struct pinctr |
| { |
| struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
| u32 param = pinconf_to_config_param(*config); |
| - int val, val2, err, reg, ret = 1; |
| + int val, val2, err, pullup, reg, ret = 1; |
| const struct mtk_pin_desc *desc; |
| |
| desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; |
| + if (!desc->name) |
| + return -ENOTSUPP; |
| |
| switch (param) { |
| case PIN_CONFIG_BIAS_DISABLE: |
| - if (hw->soc->bias_disable_get) { |
| + if (hw->soc->bias_get_combo) { |
| + err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); |
| + if (err) |
| + return err; |
| + if (ret != MTK_PUPD_SET_R1R0_00 && ret != MTK_DISABLE) |
| + return -EINVAL; |
| + } else if (hw->soc->bias_disable_get) { |
| err = hw->soc->bias_disable_get(hw, desc, &ret); |
| if (err) |
| return err; |
| @@ -115,7 +123,15 @@ static int mtk_pinconf_get(struct pinctr |
| } |
| break; |
| case PIN_CONFIG_BIAS_PULL_UP: |
| - if (hw->soc->bias_get) { |
| + if (hw->soc->bias_get_combo) { |
| + err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); |
| + if (err) |
| + return err; |
| + if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE) |
| + return -EINVAL; |
| + if (!pullup) |
| + return -EINVAL; |
| + } else if (hw->soc->bias_get) { |
| err = hw->soc->bias_get(hw, desc, 1, &ret); |
| if (err) |
| return err; |
| @@ -124,7 +140,15 @@ static int mtk_pinconf_get(struct pinctr |
| } |
| break; |
| case PIN_CONFIG_BIAS_PULL_DOWN: |
| - if (hw->soc->bias_get) { |
| + if (hw->soc->bias_get_combo) { |
| + err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); |
| + if (err) |
| + return err; |
| + if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE) |
| + return -EINVAL; |
| + if (pullup) |
| + return -EINVAL; |
| + } else if (hw->soc->bias_get) { |
| err = hw->soc->bias_get(hw, desc, 0, &ret); |
| if (err) |
| return err; |
| @@ -218,14 +242,19 @@ static int mtk_pinconf_set(struct pinctr |
| int cfg, err = 0; |
| |
| desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; |
| + if (!desc->name) |
| + return -ENOTSUPP; |
| |
| for (cfg = 0; cfg < num_configs; cfg++) { |
| param = pinconf_to_config_param(configs[cfg]); |
| arg = pinconf_to_config_argument(configs[cfg]); |
| - |
| switch (param) { |
| case PIN_CONFIG_BIAS_DISABLE: |
| - if (hw->soc->bias_disable_set) { |
| + if (hw->soc->bias_set_combo) { |
| + err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE); |
| + if (err) |
| + return err; |
| + } else if (hw->soc->bias_disable_set) { |
| err = hw->soc->bias_disable_set(hw, desc); |
| if (err) |
| return err; |
| @@ -234,7 +263,11 @@ static int mtk_pinconf_set(struct pinctr |
| } |
| break; |
| case PIN_CONFIG_BIAS_PULL_UP: |
| - if (hw->soc->bias_set) { |
| + if (hw->soc->bias_set_combo) { |
| + err = hw->soc->bias_set_combo(hw, desc, 1, arg); |
| + if (err) |
| + return err; |
| + } else if (hw->soc->bias_set) { |
| err = hw->soc->bias_set(hw, desc, 1); |
| if (err) |
| return err; |
| @@ -243,7 +276,11 @@ static int mtk_pinconf_set(struct pinctr |
| } |
| break; |
| case PIN_CONFIG_BIAS_PULL_DOWN: |
| - if (hw->soc->bias_set) { |
| + if (hw->soc->bias_set_combo) { |
| + err = hw->soc->bias_set_combo(hw, desc, 0, arg); |
| + if (err) |
| + return err; |
| + } else if (hw->soc->bias_set) { |
| err = hw->soc->bias_set(hw, desc, 0); |
| if (err) |
| return err; |
| --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c |
| +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c |
| @@ -506,6 +506,404 @@ int mtk_pinconf_bias_get_rev1(struct mtk |
| return 0; |
| } |
| |
| +/* Combo for the following pull register type: |
| + * 1. PU + PD |
| + * 2. PULLSEL + PULLEN |
| + * 3. PUPD + R0 + R1 |
| + */ |
| +static int mtk_pinconf_bias_set_pu_pd(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 pullup, u32 arg) |
| +{ |
| + int err, pu, pd; |
| + |
| + if (arg == MTK_DISABLE) { |
| + pu = 0; |
| + pd = 0; |
| + } else if ((arg == MTK_ENABLE) && pullup) { |
| + pu = 1; |
| + pd = 0; |
| + } else if ((arg == MTK_ENABLE) && !pullup) { |
| + pu = 0; |
| + pd = 1; |
| + } else { |
| + err = -EINVAL; |
| + goto out; |
| + } |
| + |
| + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, pu); |
| + if (err) |
| + goto out; |
| + |
| + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, pd); |
| + |
| +out: |
| + return err; |
| +} |
| + |
| +static int mtk_pinconf_bias_set_pullsel_pullen(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 pullup, u32 arg) |
| +{ |
| + int err, enable; |
| + |
| + if (arg == MTK_DISABLE) |
| + enable = 0; |
| + else if (arg == MTK_ENABLE) |
| + enable = 1; |
| + else { |
| + err = -EINVAL; |
| + goto out; |
| + } |
| + |
| + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); |
| + if (err) |
| + goto out; |
| + |
| + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); |
| + |
| +out: |
| + return err; |
| +} |
| + |
| +static int mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 pullup, u32 arg) |
| +{ |
| + int err, r0, r1; |
| + |
| + if ((arg == MTK_DISABLE) || (arg == MTK_PUPD_SET_R1R0_00)) { |
| + pullup = 0; |
| + r0 = 0; |
| + r1 = 0; |
| + } else if (arg == MTK_PUPD_SET_R1R0_01) { |
| + r0 = 1; |
| + r1 = 0; |
| + } else if (arg == MTK_PUPD_SET_R1R0_10) { |
| + r0 = 0; |
| + r1 = 1; |
| + } else if (arg == MTK_PUPD_SET_R1R0_11) { |
| + r0 = 1; |
| + r1 = 1; |
| + } else { |
| + err = -EINVAL; |
| + goto out; |
| + } |
| + |
| + /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ |
| + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PUPD, !pullup); |
| + if (err) |
| + goto out; |
| + |
| + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, r0); |
| + if (err) |
| + goto out; |
| + |
| + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R1, r1); |
| + |
| +out: |
| + return err; |
| +} |
| + |
| +static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 pullup, u32 arg, u32 *rsel_val) |
| +{ |
| + const struct mtk_pin_rsel *rsel; |
| + int check; |
| + bool found = false; |
| + |
| + rsel = hw->soc->pin_rsel; |
| + |
| + for (check = 0; check <= hw->soc->npin_rsel - 1; check++) { |
| + if (desc->number >= rsel[check].s_pin && |
| + desc->number <= rsel[check].e_pin) { |
| + if (pullup) { |
| + if (rsel[check].up_rsel == arg) { |
| + found = true; |
| + *rsel_val = rsel[check].rsel_index; |
| + break; |
| + } |
| + } else { |
| + if (rsel[check].down_rsel == arg) { |
| + found = true; |
| + *rsel_val = rsel[check].rsel_index; |
| + break; |
| + } |
| + } |
| + } |
| + } |
| + |
| + if (!found) { |
| + dev_err(hw->dev, "Not support rsel value %d Ohm for pin = %d (%s)\n", |
| + arg, desc->number, desc->name); |
| + return -ENOTSUPP; |
| + } |
| + |
| + return 0; |
| +} |
| + |
| +static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 pullup, u32 arg) |
| +{ |
| + int err, rsel_val; |
| + |
| + if (!pullup && arg == MTK_DISABLE) |
| + return 0; |
| + |
| + if (hw->rsel_si_unit) { |
| + /* find pin rsel_index from pin_rsel array*/ |
| + err = mtk_hw_pin_rsel_lookup(hw, desc, pullup, arg, &rsel_val); |
| + if (err) |
| + goto out; |
| + } else { |
| + if (arg < MTK_PULL_SET_RSEL_000 || |
| + arg > MTK_PULL_SET_RSEL_111) { |
| + err = -EINVAL; |
| + goto out; |
| + } |
| + |
| + rsel_val = arg - MTK_PULL_SET_RSEL_000; |
| + } |
| + |
| + err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL, rsel_val); |
| + if (err) |
| + goto out; |
| + |
| + err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, MTK_ENABLE); |
| + |
| +out: |
| + return err; |
| +} |
| + |
| +int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 pullup, u32 arg) |
| +{ |
| + int err = -ENOTSUPP; |
| + u32 try_all_type; |
| + |
| + if (hw->soc->pull_type) |
| + try_all_type = hw->soc->pull_type[desc->number]; |
| + else |
| + try_all_type = MTK_PULL_TYPE_MASK; |
| + |
| + if (try_all_type & MTK_PULL_RSEL_TYPE) { |
| + err = mtk_pinconf_bias_set_rsel(hw, desc, pullup, arg); |
| + if (!err) |
| + return err; |
| + } |
| + |
| + if (try_all_type & MTK_PULL_PU_PD_TYPE) { |
| + err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg); |
| + if (!err) |
| + return err; |
| + } |
| + |
| + if (try_all_type & MTK_PULL_PULLSEL_TYPE) { |
| + err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, |
| + pullup, arg); |
| + if (!err) |
| + return err; |
| + } |
| + |
| + if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE) |
| + err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg); |
| + |
| + if (err) |
| + dev_err(hw->dev, "Invalid pull argument\n"); |
| + |
| + return err; |
| +} |
| +EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo); |
| + |
| +static int mtk_rsel_get_si_unit(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 pullup, u32 rsel_val, u32 *si_unit) |
| +{ |
| + const struct mtk_pin_rsel *rsel; |
| + int check; |
| + |
| + rsel = hw->soc->pin_rsel; |
| + |
| + for (check = 0; check <= hw->soc->npin_rsel - 1; check++) { |
| + if (desc->number >= rsel[check].s_pin && |
| + desc->number <= rsel[check].e_pin) { |
| + if (rsel_val == rsel[check].rsel_index) { |
| + if (pullup) |
| + *si_unit = rsel[check].up_rsel; |
| + else |
| + *si_unit = rsel[check].down_rsel; |
| + break; |
| + } |
| + } |
| + } |
| + |
| + return 0; |
| +} |
| + |
| +static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 *pullup, u32 *enable) |
| +{ |
| + int pu, pd, rsel, err; |
| + |
| + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL, &rsel); |
| + if (err) |
| + goto out; |
| + |
| + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu); |
| + if (err) |
| + goto out; |
| + |
| + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd); |
| + if (err) |
| + goto out; |
| + |
| + if (pu == 0 && pd == 0) { |
| + *pullup = 0; |
| + *enable = MTK_DISABLE; |
| + } else if (pu == 1 && pd == 0) { |
| + *pullup = 1; |
| + if (hw->rsel_si_unit) |
| + mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable); |
| + else |
| + *enable = rsel + MTK_PULL_SET_RSEL_000; |
| + } else if (pu == 0 && pd == 1) { |
| + *pullup = 0; |
| + if (hw->rsel_si_unit) |
| + mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable); |
| + else |
| + *enable = rsel + MTK_PULL_SET_RSEL_000; |
| + } else { |
| + err = -EINVAL; |
| + goto out; |
| + } |
| + |
| +out: |
| + return err; |
| +} |
| + |
| +static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 *pullup, u32 *enable) |
| +{ |
| + int err, pu, pd; |
| + |
| + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu); |
| + if (err) |
| + goto out; |
| + |
| + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd); |
| + if (err) |
| + goto out; |
| + |
| + if (pu == 0 && pd == 0) { |
| + *pullup = 0; |
| + *enable = MTK_DISABLE; |
| + } else if (pu == 1 && pd == 0) { |
| + *pullup = 1; |
| + *enable = MTK_ENABLE; |
| + } else if (pu == 0 && pd == 1) { |
| + *pullup = 0; |
| + *enable = MTK_ENABLE; |
| + } else |
| + err = -EINVAL; |
| + |
| +out: |
| + return err; |
| +} |
| + |
| +static int mtk_pinconf_bias_get_pullsel_pullen(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 *pullup, u32 *enable) |
| +{ |
| + int err; |
| + |
| + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); |
| + if (err) |
| + goto out; |
| + |
| + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); |
| + |
| +out: |
| + return err; |
| +} |
| + |
| +static int mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 *pullup, u32 *enable) |
| +{ |
| + int err, r0, r1; |
| + |
| + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PUPD, pullup); |
| + if (err) |
| + goto out; |
| + /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ |
| + *pullup = !(*pullup); |
| + |
| + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R0, &r0); |
| + if (err) |
| + goto out; |
| + |
| + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R1, &r1); |
| + if (err) |
| + goto out; |
| + |
| + if ((r1 == 0) && (r0 == 0)) |
| + *enable = MTK_PUPD_SET_R1R0_00; |
| + else if ((r1 == 0) && (r0 == 1)) |
| + *enable = MTK_PUPD_SET_R1R0_01; |
| + else if ((r1 == 1) && (r0 == 0)) |
| + *enable = MTK_PUPD_SET_R1R0_10; |
| + else if ((r1 == 1) && (r0 == 1)) |
| + *enable = MTK_PUPD_SET_R1R0_11; |
| + else |
| + err = -EINVAL; |
| + |
| +out: |
| + return err; |
| +} |
| + |
| +int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 *pullup, u32 *enable) |
| +{ |
| + int err = -ENOTSUPP; |
| + u32 try_all_type; |
| + |
| + if (hw->soc->pull_type) |
| + try_all_type = hw->soc->pull_type[desc->number]; |
| + else |
| + try_all_type = MTK_PULL_TYPE_MASK; |
| + |
| + if (try_all_type & MTK_PULL_RSEL_TYPE) { |
| + err = mtk_pinconf_bias_get_rsel(hw, desc, pullup, enable); |
| + if (!err) |
| + return err; |
| + } |
| + |
| + if (try_all_type & MTK_PULL_PU_PD_TYPE) { |
| + err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable); |
| + if (!err) |
| + return err; |
| + } |
| + |
| + if (try_all_type & MTK_PULL_PULLSEL_TYPE) { |
| + err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, |
| + pullup, enable); |
| + if (!err) |
| + return err; |
| + } |
| + |
| + if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE) |
| + err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable); |
| + |
| + return err; |
| +} |
| +EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo); |
| + |
| /* Revision 0 */ |
| int mtk_pinconf_drive_set(struct mtk_pinctrl *hw, |
| const struct mtk_pin_desc *desc, u32 arg) |
| --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h |
| +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h |
| @@ -17,6 +17,34 @@ |
| #define MTK_ENABLE 1 |
| #define MTK_PULLDOWN 0 |
| #define MTK_PULLUP 1 |
| +#define MTK_PULL_PU_PD_TYPE BIT(0) |
| +#define MTK_PULL_PULLSEL_TYPE BIT(1) |
| +#define MTK_PULL_PUPD_R1R0_TYPE BIT(2) |
| +/* MTK_PULL_RSEL_TYPE can select resistance and can be |
| + * turned on/off itself. But it can't be selected pull up/down |
| + */ |
| +#define MTK_PULL_RSEL_TYPE BIT(3) |
| +/* MTK_PULL_PU_PD_RSEL_TYPE is a type which is controlled by |
| + * MTK_PULL_PU_PD_TYPE and MTK_PULL_RSEL_TYPE. |
| + */ |
| +#define MTK_PULL_PU_PD_RSEL_TYPE (MTK_PULL_PU_PD_TYPE \ |
| + | MTK_PULL_RSEL_TYPE) |
| +#define MTK_PULL_TYPE_MASK (MTK_PULL_PU_PD_TYPE |\ |
| + MTK_PULL_PULLSEL_TYPE |\ |
| + MTK_PULL_PUPD_R1R0_TYPE |\ |
| + MTK_PULL_RSEL_TYPE) |
| +#define MTK_PUPD_SET_R1R0_00 100 |
| +#define MTK_PUPD_SET_R1R0_01 101 |
| +#define MTK_PUPD_SET_R1R0_10 102 |
| +#define MTK_PUPD_SET_R1R0_11 103 |
| +#define MTK_PULL_SET_RSEL_000 200 |
| +#define MTK_PULL_SET_RSEL_001 201 |
| +#define MTK_PULL_SET_RSEL_010 202 |
| +#define MTK_PULL_SET_RSEL_011 203 |
| +#define MTK_PULL_SET_RSEL_100 204 |
| +#define MTK_PULL_SET_RSEL_101 205 |
| +#define MTK_PULL_SET_RSEL_110 206 |
| +#define MTK_PULL_SET_RSEL_111 207 |
| |
| #define EINT_NA U16_MAX |
| #define NO_EINT_SUPPORT EINT_NA |
| @@ -66,6 +94,8 @@ enum { |
| PINCTRL_PIN_REG_DRV_EN, |
| PINCTRL_PIN_REG_DRV_E0, |
| PINCTRL_PIN_REG_DRV_E1, |
| + PINCTRL_PIN_REG_DRV_ADV, |
| + PINCTRL_PIN_REG_RSEL, |
| PINCTRL_PIN_REG_MAX, |
| }; |
| |
| @@ -101,6 +131,22 @@ struct mtk_pin_field { |
| u8 next; |
| }; |
| |
| +/** |
| + * struct mtk_pin_rsel - the structure that provides bias resistance selection. |
| + * @s_pin: the start pin within the rsel range |
| + * @e_pin: the end pin within the rsel range |
| + * @rsel_index: the rsel bias resistance index |
| + * @up_rsel: the pullup rsel bias resistance value |
| + * @down_rsel: the pulldown rsel bias resistance value |
| + */ |
| +struct mtk_pin_rsel { |
| + u16 s_pin; |
| + u16 e_pin; |
| + u16 rsel_index; |
| + u32 up_rsel; |
| + u32 down_rsel; |
| +}; |
| + |
| /* struct mtk_pin_field_calc - the structure that holds the range providing |
| * the guide used to look up the relevant field |
| * @s_pin: the start pin within the range |
| @@ -205,6 +251,9 @@ struct mtk_pin_soc { |
| bool ies_present; |
| const char * const *base_names; |
| unsigned int nbase_names; |
| + const unsigned int *pull_type; |
| + const struct mtk_pin_rsel *pin_rsel; |
| + unsigned int npin_rsel; |
| |
| /* Specific pinconfig operations */ |
| int (*bias_disable_set)(struct mtk_pinctrl *hw, |
| @@ -215,7 +264,10 @@ struct mtk_pin_soc { |
| const struct mtk_pin_desc *desc, bool pullup); |
| int (*bias_get)(struct mtk_pinctrl *hw, |
| const struct mtk_pin_desc *desc, bool pullup, int *res); |
| - |
| + int (*bias_set_combo)(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, u32 pullup, u32 arg); |
| + int (*bias_get_combo)(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, u32 *pullup, u32 *arg); |
| int (*drive_set)(struct mtk_pinctrl *hw, |
| const struct mtk_pin_desc *desc, u32 arg); |
| int (*drive_get)(struct mtk_pinctrl *hw, |
| @@ -246,6 +298,10 @@ struct mtk_pinctrl { |
| struct mtk_eint *eint; |
| struct mtk_pinctrl_group *groups; |
| const char **grp_names; |
| + /* lock pin's register resource to avoid multiple threads issue*/ |
| + spinlock_t lock; |
| + /* identify rsel setting by si unit or rsel define in dts node */ |
| + bool rsel_si_unit; |
| }; |
| |
| void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set); |
| @@ -282,7 +338,12 @@ int mtk_pinconf_drive_set(struct mtk_pin |
| const struct mtk_pin_desc *desc, u32 arg); |
| int mtk_pinconf_drive_get(struct mtk_pinctrl *hw, |
| const struct mtk_pin_desc *desc, int *val); |
| - |
| +int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 pullup, u32 enable); |
| +int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw, |
| + const struct mtk_pin_desc *desc, |
| + u32 *pullup, u32 *enable); |
| int mtk_pinconf_drive_set_rev1(struct mtk_pinctrl *hw, |
| const struct mtk_pin_desc *desc, u32 arg); |
| int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw, |