[][pwm add mt7981 support]
[Description]
Add PWM dts node, remove PWM clock from clkitg, modify PWM drivers for REG-V2.
[Release-log]
N/A
Change-Id: If007b311f77d9a2fa4be26199b63ff384d0218c0
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/5381846
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
index 083a723..9b40b37 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
@@ -29,13 +29,13 @@
<&infracfg CK_INFRA_ISPI0>,
<&infracfg CK_INFRA_I2C>,
<&infracfg CK_INFRA_ISPI1>,
- <&infracfg CK_INFRA_PWM>,
+ <&clk40m>,
<&infracfg CK_INFRA_66M_MCK>,
<&infracfg CK_INFRA_CK_F32K>,
<&clk40m>,
+ <&clk40m>,
+ <&clk40m>,
- <&infracfg CK_INFRA_PWM_BCK>,
- <&infracfg CK_INFRA_PWM_CK1>,
- <&infracfg CK_INFRA_PWM_CK2>,
+ <&clk40m>,
<&infracfg CK_INFRA_133M_HCK>,
<&infracfg CK_INFRA_66M_PHCK>,
<&infracfg CK_INFRA_FAUD_L_CK >,
@@ -64,15 +64,15 @@
<&infracfg_ao CK_INFRA_UART2_SEL>,
<&infracfg_ao CK_INFRA_SPI0_SEL>,
<&infracfg_ao CK_INFRA_SPI1_SEL>,
- <&infracfg_ao CK_INFRA_PWM1_SEL>,
- <&infracfg_ao CK_INFRA_PWM2_SEL>,
- <&infracfg_ao CK_INFRA_PWM_BSEL>,
+ <&clk40m>,
+ <&clk40m>,
+ <&clk40m>,
<&clk40m>,
<&infracfg_ao CK_INFRA_GPT_STA>,
- <&infracfg_ao CK_INFRA_PWM_HCK>,
- <&infracfg_ao CK_INFRA_PWM_STA>,
- <&infracfg_ao CK_INFRA_PWM1_CK>,
- <&infracfg_ao CK_INFRA_PWM2_CK>,
+ <&clk40m>,
+ <&clk40m>,
+ <&clk40m>,
+ <&clk40m>,
<&infracfg_ao CK_INFRA_CQ_DMA_CK>,
<&clk40m>,
<&clk40m>,
@@ -165,7 +165,7 @@
<&clk40m>,
<&clk40m>,
<&topckgen CK_TOP_UART_SEL>,
- <&topckgen CK_TOP_PWM_SEL>,
+ <&clk40m>,
<&topckgen CK_TOP_I2C_SEL>,
<&clk40m>,
<&topckgen CK_TOP_EMMC_208M_SEL >,