commit | 329d8ee545f97977fccb36ad26d4702f2ded8c37 | [log] [tgz] |
---|---|---|
author | developer <developer@mediatek.com> | Tue Aug 02 08:49:42 2022 +0800 |
committer | developer <developer@mediatek.com> | Tue Aug 02 09:21:24 2022 +0800 |
tree | a878601a19b644c44b023058a2af57312de2f724 | |
parent | 6c4462f171a8d58d8b2df0c63d417702cc7a183b [diff] |
[][[Kernel][Common][eth][update debug info and reset condition]] [Description] Add marco MTK_QDMA_PAGE - miss this marco in last commit [Release-log] N/A Change-Id: Iaadce8cd5162135e98ed786356d5da3d2f9943ae Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6319381
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h index d75c28f..60939f2 100755 --- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -363,6 +363,9 @@ /* QDMA RX DMA Pointer Register */ #define MTK_QRX_DRX_IDX0 (QDMA_BASE + 0x10c) +/* QDMA Page Configuration Register */ +#define MTK_QDMA_PAGE (QDMA_BASE + 0x1f0) + /* QDMA Global Configuration Register */ #define MTK_QDMA_GLO_CFG (QDMA_BASE + 0x204) #define MTK_RX_2B_OFFSET BIT(31)