[][openwrt][mt7988][integration][Add basic Filogic 880 SoC support]
[Description]
Add basic filogic 880 SoC support to openwrt 21.02
[Release-log]
Change-Id: I57791df2e9f9f4729cb2d32f734090de52c370f2
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6592143
Build: srv_hbgsm110
diff --git a/target/linux/mediatek/files-5.4/drivers/net/phy/mtk/mt753x/mt753x.h b/target/linux/mediatek/files-5.4/drivers/net/phy/mtk/mt753x/mt753x.h
old mode 100755
new mode 100644
index 732bda1..344d2b0
--- a/target/linux/mediatek/files-5.4/drivers/net/phy/mtk/mt753x/mt753x.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/phy/mtk/mt753x/mt753x.h
@@ -13,6 +13,7 @@
#include <linux/of_mdio.h>
#include <linux/workqueue.h>
#include <linux/gpio/consumer.h>
+#include <linux/phy.h>
#ifdef CONFIG_SWCONFIG
#include <linux/switch.h>
@@ -30,12 +31,13 @@
enum mt753x_model {
MT7530 = 0x7530,
- MT7531 = 0x7531
+ MT7531 = 0x7531,
+ MT7988 = 0x7988,
};
struct mt753x_port_cfg {
struct device_node *np;
- int phy_mode;
+ phy_interface_t phy_mode;
u32 enabled: 1;
u32 force_link: 1;
u32 speed: 2;
@@ -60,6 +62,10 @@
u32 smi_addr;
u32 phy_base;
int direct_phy_access;
+ bool direct_access;
+
+ void __iomem *base;
+ struct regmap *sysctrl_base;
enum mt753x_model model;
const char *name;
@@ -70,7 +76,7 @@
bool hw_phy_cal;
bool phy_status_poll;
struct mt753x_phy phys[MT753X_NUM_PHYS];
-// int phy_irqs[PHY_MAX_ADDR]; //FIXME
+// int phy_irqs[PHY_MAX_ADDR]; //FIXME
int phy_link_sts;