[][kernel][mt7988][eth][Update 10G interface dyanmically change support fo ESP-T5-R SFP+ modules]
[Description]
Refactor 10G interface dyanmically change support for ESP-T5-R SFP+
modules.
If without this patch, the internal 2.5G PHY might not be able work.
[Release-log]
N/A
Change-Id: I32e75a4d0bd979da61ddc6a4b3b2448d5dbc771b
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/7223544
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 2ae369f..b33c229 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -451,7 +451,7 @@
/* Force Port1 XGMAC Link Up */
val = mtk_r32(eth, MTK_XGMAC_STS(MTK_GMAC1_ID));
- mtk_w32(eth, val | MTK_XGMAC_FORCE_LINK,
+ mtk_w32(eth, val | MTK_XGMAC_FORCE_LINK(MTK_GMAC1_ID),
MTK_XGMAC_STS(MTK_GMAC1_ID));
/* Adjust GSW bridge IPG to 11*/
@@ -507,7 +507,7 @@
phylink_config);
struct mtk_eth *eth = mac->hw;
u32 sid, i;
- int val = 0, ge_mode, err = 0;
+ int val = 0, ge_mode, force_link, err = 0;
unsigned int mac_type = mac->type;
/* MT76x8 has no hardware settings between for the MAC */
@@ -697,9 +697,18 @@
case MTK_GMAC1_ID:
mtk_setup_bridge_switch(eth);
break;
+ case MTK_GMAC2_ID:
+ force_link = (mac->interface ==
+ PHY_INTERFACE_MODE_XGMII) ?
+ MTK_XGMAC_FORCE_LINK(mac->id) : 0;
+ val = mtk_r32(eth, MTK_XGMAC_STS(mac->id));
+ mtk_w32(eth, val | force_link,
+ MTK_XGMAC_STS(mac->id));
+ break;
case MTK_GMAC3_ID:
val = mtk_r32(eth, MTK_XGMAC_STS(mac->id));
- mtk_w32(eth, val | MTK_XGMAC_FORCE_LINK,
+ mtk_w32(eth,
+ val | MTK_XGMAC_FORCE_LINK(mac->id),
MTK_XGMAC_STS(mac->id));
break;
}
@@ -711,9 +720,11 @@
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) {
switch (mac->id) {
+ case MTK_GMAC2_ID:
case MTK_GMAC3_ID:
val = mtk_r32(eth, MTK_XGMAC_STS(mac->id));
- mtk_w32(eth, val & ~MTK_XGMAC_FORCE_LINK,
+ mtk_w32(eth,
+ val & ~MTK_XGMAC_FORCE_LINK(mac->id),
MTK_XGMAC_STS(mac->id));
break;
}
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index e1fe8a3..577f8df 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -640,7 +640,7 @@
/* XMAC status registers */
#define MTK_XGMAC_STS(x) ((x == MTK_GMAC3_ID) ? 0x1001C : 0x1000C)
-#define MTK_XGMAC_FORCE_LINK BIT(15)
+#define MTK_XGMAC_FORCE_LINK(x) ((x == MTK_GMAC2_ID) ? BIT(31) : BIT(15))
#define MTK_USXGMII_PCS_LINK BIT(8)
#define MTK_XGMAC_RX_FC BIT(5)
#define MTK_XGMAC_TX_FC BIT(4)