[][kernel][mt7988][eth][Change AQR113C firmware download method to MDIO gangload]
[Description]
Change AQR113C firmware download method to MDIO gangload.
If without this patch, AQR113C cannot boot from MDIO gangload.
[Release-log]
N/A
Change-Id: Iddc29f5e1c73c772bcea9313938b6daccc10025a
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6781059
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
index 14b51a6..aad2e1a 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
@@ -94,6 +94,18 @@
};
&pio {
+ mdio0_pins: mdio0-pins {
+ mux {
+ function = "mdio";
+ groups = "mdc_mdio0";
+ };
+
+ conf {
+ groups = "mdc_mdio0";
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -153,6 +165,8 @@
};
ð {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio0_pins>;
status = "okay";
gmac0: mac@0 {
@@ -187,6 +201,8 @@
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ mdc-max-frequency = <10500000>;
+
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
index a82f180..9736965 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
@@ -85,6 +85,18 @@
};
&pio {
+ mdio0_pins: mdio0-pins {
+ mux {
+ function = "mdio";
+ groups = "mdc_mdio0";
+ };
+
+ conf {
+ groups = "mdc_mdio0";
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -144,6 +156,8 @@
};
ð {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio0_pins>;
status = "okay";
gmac0: mac@0 {
@@ -178,6 +192,8 @@
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ mdc-max-frequency = <10500000>;
+
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
index 7358c69..f90abc2 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
@@ -119,6 +119,18 @@
};
&pio {
+ mdio0_pins: mdio0-pins {
+ mux {
+ function = "mdio";
+ groups = "mdc_mdio0";
+ };
+
+ conf {
+ groups = "mdc_mdio0";
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -179,6 +191,8 @@
};
ð {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio0_pins>;
status = "okay";
gmac0: mac@0 {
@@ -213,6 +227,8 @@
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ mdc-max-frequency = <10500000>;
+
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
index 0a4800e..01cf186 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
@@ -187,6 +187,18 @@
};
&pio {
+ mdio0_pins: mdio0-pins {
+ mux {
+ function = "mdio";
+ groups = "mdc_mdio0";
+ };
+
+ conf {
+ groups = "mdc_mdio0";
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -260,6 +272,8 @@
};
ð {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio0_pins>;
status = "okay";
gmac0: mac@0 {
@@ -294,6 +308,8 @@
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ mdc-max-frequency = <10500000>;
+
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
index 35982e3..cdc692c 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
@@ -117,6 +117,18 @@
};
&pio {
+ mdio0_pins: mdio0-pins {
+ mux {
+ function = "mdio";
+ groups = "mdc_mdio0";
+ };
+
+ conf {
+ groups = "mdc_mdio0";
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+ };
+
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
@@ -169,6 +181,8 @@
};
ð {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio0_pins>;
status = "okay";
gmac0: mac@0 {
@@ -203,6 +217,8 @@
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ mdc-max-frequency = <10500000>;
+
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
index 6332128..9d83894 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
@@ -205,6 +205,18 @@
};
&pio {
+ mdio0_pins: mdio0-pins {
+ mux {
+ function = "mdio";
+ groups = "mdc_mdio0";
+ };
+
+ conf {
+ groups = "mdc_mdio0";
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -275,6 +287,8 @@
};
ð {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio0_pins>;
status = "okay";
gmac0: mac@0 {
@@ -309,6 +323,8 @@
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ mdc-max-frequency = <10500000>;
+
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
index 07ad467..74c3431 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
@@ -215,6 +215,18 @@
};
&pio {
+ mdio0_pins: mdio0-pins {
+ mux {
+ function = "mdio";
+ groups = "mdc_mdio0";
+ };
+
+ conf {
+ groups = "mdc_mdio0";
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+ };
+
i2c0_pins: i2c0-pins-g0 {
mux {
function = "i2c";
@@ -295,6 +307,8 @@
};
ð {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio0_pins>;
status = "okay";
gmac0: mac@0 {
@@ -329,6 +343,8 @@
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+ mdc-max-frequency = <10500000>;
+
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
diff --git a/target/linux/mediatek/mt7988/base-files/lib/firmware/Rhe-05.06-Candidate7-AQR_Mediatek_23B_StartOff_ID45623_VER36657.cld b/target/linux/mediatek/mt7988/base-files/lib/firmware/Rhe-05.06-Candidate7-AQR_Mediatek_23B_StartOff_ID45623_VER36657.cld
new file mode 100644
index 0000000..aeacb65
--- /dev/null
+++ b/target/linux/mediatek/mt7988/base-files/lib/firmware/Rhe-05.06-Candidate7-AQR_Mediatek_23B_StartOff_ID45623_VER36657.cld
Binary files differ
diff --git a/target/linux/mediatek/mt7988/config-5.4 b/target/linux/mediatek/mt7988/config-5.4
index 688e319..94fd3d1 100644
--- a/target/linux/mediatek/mt7988/config-5.4
+++ b/target/linux/mediatek/mt7988/config-5.4
@@ -3,6 +3,10 @@
# CONFIG_AIROHA_EN8801SC_PHY is not set
# CONFIG_AIROHA_EN8801S_PHY is not set
CONFIG_AQUANTIA_PHY=y
+CONFIG_AQUANTIA_PHY_FW_DOWNLOAD=y
+CONFIG_AQUANTIA_PHY_FW_DOWNLOAD_GANG=y
+# CONFIG_AQUANTIA_PHY_FW_DOWNLOAD_SINGLE is not set
+CONFIG_AQUANTIA_PHY_FW_FILE="Rhe-05.06-Candidate7-AQR_Mediatek_23B_StartOff_ID45623_VER36657.cld"
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_KEEP_MEMBLOCK=y