[][kernel][mt7988][eth][macsec: Add correct clock selection]
[Description]
Add correct clock selection. We need to select two clocks for macsec:
- CK_TOP_MACSEC_SEL:
- CK_TOP_CB_CKSQ_40M: 40M
- CK_TOP_CB_SGM_325M: 325M (Use this)
- CK_TOP_CB_NET1_D8 : 312M
- CK_TOP_NETSYS_TOPS_400M_SEL: (bus clock)
- CK_TOP_CB_CKSQ_40M: 40M
- CK_TOP_CB_NET2_D2 : 400M (Use this)
[Release-log]
N/A
Change-Id: I3794ec401e9ef1aad03ffb4ea571f0b0326ed855
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/8488121
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
index c676390..55cb53d 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
@@ -160,7 +160,7 @@
<&topckgen CK_TOP_PEXTP_SEL>,
<&topckgen CK_TOP_MCUSYS_BACKUP_625M_SEL>,
<&system_clk>,
- <&topckgen CK_TOP_MACSEC_SEL>,
+ <&system_clk>,
<&system_clk>,
<&system_clk>,
<&system_clk>,
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
index 51a1c81..ef6966e 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
@@ -875,7 +875,9 @@
<&topckgen CK_TOP_NETSYS_PAO_2X_SEL>,
<&topckgen CK_TOP_NETSYS_SYNC_250M_SEL>,
<&topckgen CK_TOP_NETSYS_PPEFB_250M_SEL>,
- <&topckgen CK_TOP_NETSYS_WARP_SEL>;
+ <&topckgen CK_TOP_NETSYS_WARP_SEL>,
+ <&topckgen CK_TOP_MACSEC_SEL>,
+ <&topckgen CK_TOP_NETSYS_TOPS_400M_SEL>;
clock-names = "xgp1", "xgp2", "xgp3", "fe", "gp2", "gp1",
"gp3", "esw", "crypto", "sgmii_tx250m",
"sgmii_rx250m", "sgmii2_tx250m", "sgmii2_rx250m",
@@ -890,19 +892,25 @@
"top_netsys_500m_sel", "top_netsys_pao_2x_sel",
"top_netsys_sync_250m_sel",
"top_netsys_ppefb_250m_sel",
- "top_netsys_warp_sel";
+ "top_netsys_warp_sel",
+ "top_macsec_sel",
+ "macsec_bus_clk";
assigned-clocks = <&topckgen CK_TOP_NETSYS_2X_SEL>,
<&topckgen CK_TOP_NETSYS_GSW_SEL>,
<&topckgen CK_TOP_USXGMII_SBUS_0_SEL>,
<&topckgen CK_TOP_USXGMII_SBUS_1_SEL>,
<&topckgen CK_TOP_SGM_0_SEL>,
- <&topckgen CK_TOP_SGM_1_SEL>;
+ <&topckgen CK_TOP_SGM_1_SEL>,
+ <&topckgen CK_TOP_MACSEC_SEL>,
+ <&topckgen CK_TOP_NETSYS_TOPS_400M_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_NET2_800M>,
<&topckgen CK_TOP_CB_NET1_D4>,
<&topckgen CK_TOP_NET1_D8_D4>,
<&topckgen CK_TOP_NET1_D8_D4>,
<&topckgen CK_TOP_CB_SGM_325M>,
- <&topckgen CK_TOP_CB_SGM_325M>;
+ <&topckgen CK_TOP_CB_SGM_325M>,
+ <&topckgen CK_TOP_CB_SGM_325M>,
+ <&topckgen CK_TOP_CB_NET2_D2>;
mediatek,ethsys = <ðsys>;
mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
mediatek,usxgmiisys = <&usxgmiisys0>, <&usxgmiisys1>;
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 759f130..26e761e 100644
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -242,7 +242,7 @@
"top_eth_xgmii_sel", "top_eth_mii_sel", "top_netsys_sel",
"top_netsys_500m_sel", "top_netsys_pao_2x_sel",
"top_netsys_sync_250m_sel", "top_netsys_ppefb_250m_sel",
- "top_netsys_warp_sel",
+ "top_netsys_warp_sel", "top_macsec_sel", "macsec_bus_clk",
};
void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg)
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index c8cdacf..a48b363 100644
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -1146,6 +1146,8 @@
MTK_CLK_TOP_NETSYS_SYNC_250M_SEL,
MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL,
MTK_CLK_TOP_NETSYS_WARP_SEL,
+ MTK_CLK_TOP_MACSEC_SEL,
+ MTK_CLK_TOP_NETSYS_TOPS_400M_SEL,
MTK_CLK_MAX
};
@@ -1229,7 +1231,9 @@
BIT(MTK_CLK_TOP_NETSYS_PAO_2X_SEL) | \
BIT(MTK_CLK_TOP_NETSYS_SYNC_250M_SEL) | \
BIT(MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL) | \
- BIT(MTK_CLK_TOP_NETSYS_WARP_SEL))
+ BIT(MTK_CLK_TOP_NETSYS_WARP_SEL) | \
+ BIT(MTK_CLK_TOP_MACSEC_SEL) | \
+ BIT(MTK_CLK_TOP_NETSYS_TOPS_400M_SEL))
enum mtk_dev_state {
MTK_HW_INIT,