[][Kernel][mt7988][eth][Jaguar reset update dump xgmac usxgmii and default disable reset]
[Description]
Add dump gmac usxgmii info
[Release-log]
- disable reset function during test period
Change-Id: Ia990c68c66eedf699d8c06deda35fc4fad715a80
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/7076771
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.c
index 968f691..3e93200 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.c
@@ -378,23 +378,19 @@
switch(dbg_level)
{
case 0:
- if (atomic_read(&reset_lock) == 0)
- atomic_inc(&reset_lock);
+ atomic_set(&force, 0);
break;
case 1:
- if (atomic_read(&force) == 0) {
- atomic_inc(&force);
+ if (atomic_read(&force) == 1)
schedule_work(ð->pending_work);
- } else
- pr_info(" device resetting !!!\n");
+ else
+ pr_info(" stat:disable\n");
break;
case 2:
- if (atomic_read(&reset_lock) == 1)
- atomic_dec(&reset_lock);
+ atomic_set(&force, 1);
break;
case 3:
- if (atomic_read(&force) == 0) {
- atomic_inc(&force);
+ if (atomic_read(&force) == 1) {
mtk_reset_flag = MTK_FE_STOP_TRAFFIC;
schedule_work(ð->pending_work);
} else
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c
index 02fd90b..e0955fc 100644
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c
@@ -35,14 +35,21 @@
int mtk_eth_cold_reset(struct mtk_eth *eth)
{
+ u32 reset_bits = 0;
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) ||
MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3))
regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0);
+ reset_bits = RSTCTRL_ETH | RSTCTRL_FE | RSTCTRL_PPE0;
if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1))
- ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | RSTCTRL_PPE0 | RSTCTRL_PPE1);
- else
- ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | RSTCTRL_PPE0);
+ reset_bits |= RSTCTRL_PPE1;
+#if defined(CONFIG_MEDIATEK_NETSYS_V3)
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2))
+ reset_bits |= RSTCTRL_PPE2;
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3))
+ reset_bits |= RSTCTRL_WDMA0 | RSTCTRL_WDMA1 | RSTCTRL_WDMA2;
+#endif
+ ethsys_reset(eth, reset_bits);
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) ||
MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3))
@@ -103,8 +110,8 @@
mtk_reset_event_update(eth, MTK_EVENT_WARM_CNT);
}
- pr_info("[%s] reset record val1=0x%x, val2=0x%x, val3=0x%x !\n",
- __func__, val1, val2, val3);
+ pr_info("[%s] reset record val1=0x%x, val2=0x%x, val3=0x%x i:%d done:%d\n",
+ __func__, val1, val2, val3, i, done);
if (!done)
mtk_eth_cold_reset(eth);
@@ -199,6 +206,10 @@
mtk_dump_reg(eth, "WDMA", WDMA_BASE(0), 0x600);
mtk_dump_reg(eth, "PPE", 0x2200, 0x200);
mtk_dump_reg(eth, "GMAC", 0x10000, 0x300);
+ mtk_dump_reg(eth, "XGMAC0", 0x12000, 0x300);
+ mtk_dump_reg(eth, "XGMAC1", 0x13000, 0x300);
+ mtk_dump_usxgmii(eth->xgmii->regmap_usxgmii[0], "USXGMII0", 0, 0x1000);
+ mtk_dump_usxgmii(eth->xgmii->regmap_usxgmii[1], "USXGMII1", 0, 0x1000);
}
u32 mtk_monitor_wdma_tx(struct mtk_eth *eth)
@@ -500,8 +511,7 @@
if ((ret == MTK_FE_START_RESET) ||
(ret == MTK_FE_STOP_TRAFFIC)) {
if ((atomic_read(&reset_lock) == 0) &&
- (atomic_read(&force) == 0)) {
- atomic_inc(&force);
+ (atomic_read(&force) == 1)) {
mtk_reset_flag = ret;
schedule_work(ð->pending_work);
}
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 6272602..77981e6 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -3630,7 +3630,7 @@
}
rtnl_unlock();
if (!wait_for_completion_timeout(&wait_ser_done, 3000))
- pr_warn("wait for MTK_FE_START_RESET failed\n");
+ pr_warn("wait for MTK_FE_START_RESET\n");
rtnl_lock();
break;
}
@@ -3685,8 +3685,6 @@
}
atomic_dec(&reset_lock);
- if (atomic_read(&force) > 0)
- atomic_dec(&force);
timer_setup(ð->mtk_dma_monitor_timer, mtk_dma_monitor, 0);
eth->mtk_dma_monitor_timer.expires = jiffies;
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 785d8f7..0c56d1b 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -1700,4 +1700,5 @@
const struct phylink_link_state *state);
void mtk_usxgmii_setup_phya_an_10000(struct mtk_xgmii *ss, int mac_id);
void mtk_usxgmii_reset(struct mtk_xgmii *ss, int mac_id);
+int mtk_dump_usxgmii(struct regmap *pmap, char *name, u32 offset, u32 range);
#endif /* MTK_ETH_H */
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c
index ac77ef2..6c779cf 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -375,3 +375,21 @@
val |= SGMII_AN_RESTART;
regmap_write(ss->regmap_sgmii[sid], SGMSYS_PCS_CONTROL_1, val);
}
+
+int mtk_dump_usxgmii(struct regmap *pmap, char *name, u32 offset, u32 range)
+{
+ unsigned int cur = offset;
+ unsigned int val1 = 0, val2 = 0, val3 = 0, val4 = 0;
+
+ pr_info("\n============ %s ============ pmap:%x\n", name, pmap);
+ while (cur < offset + range) {
+ regmap_read(pmap, cur, &val1);
+ regmap_read(pmap, cur + 0x4, &val2);
+ regmap_read(pmap, cur + 0x8, &val3);
+ regmap_read(pmap, cur + 0xc, &val4);
+ pr_info("0x%x: %08x %08x %08x %08x\n", cur,
+ val1, val2, val3, val4);
+ cur += 0x10;
+ }
+ return 0;
+}