Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
ff184fe9ab195cd9fdb7d72774872bfdbf8669c1
/
arch
/
riscv
ff184fe
riscv: Use a valid bit to ignore already-pending IPIs
by Sean Anderson
· Mon Sep 21 07:51:37 2020 -0400
cfb0809
riscv: Match memory barriers between send_ipi_many and handle_ipi
by Sean Anderson
· Mon Sep 21 07:51:36 2020 -0400
e8de08b
Revert "riscv: Clear pending interrupts before enabling IPIs"
by Sean Anderson
· Mon Sep 21 07:51:35 2020 -0400
3d999194
riscv: Update SiFive device tree for new CLINT driver
by Sean Anderson
· Mon Sep 28 10:52:29 2020 -0400
c6d0ef8
riscv: Update Kendryte device tree for new CLINT driver
by Sean Anderson
· Mon Sep 28 10:52:28 2020 -0400
272ab20
riscv: Rework Sifive CLINT as UCLASS_TIMER driver
by Sean Anderson
· Mon Sep 28 10:52:26 2020 -0400
28bfc32
riscv: Clean up initialization in Andes PLIC
by Sean Anderson
· Mon Sep 28 10:52:25 2020 -0400
87e6ce5
riscv: Rework Andes PLMT as a UCLASS_TIMER driver
by Sean Anderson
· Mon Sep 28 10:52:24 2020 -0400
9baaaef
riscv: Rework riscv timer driver to only support S-mode
by Sean Anderson
· Mon Sep 28 10:52:21 2020 -0400
646f8c6
fdtdec: optionally add property no-map to created reserved memory node
by Etienne Carriere
· Thu Sep 10 10:49:59 2020 +0200
6e7eb46
riscv: define function set_gd()
by Heinrich Schuchardt
· Thu Sep 10 07:47:39 2020 +0200
95492ae
cmd: provide command sbi
by Heinrich Schuchardt
· Thu Aug 20 19:43:39 2020 +0200
c78eef7
riscv: fix building with CONFIG_SPL_SMP=n
by Heinrich Schuchardt
· Sat Aug 15 09:49:26 2020 +0200
54bcf26
riscv: fu540: Use correct API to get L2 cache controller base address
by Bin Meng
· Tue Aug 18 01:09:20 2020 -0700
77efe24
riscv: additional crash information
by Heinrich Schuchardt
· Sat Aug 01 15:15:39 2020 +0000
03de50e
riscv: sifive: fu540: redundant initialization
by Heinrich Schuchardt
· Mon Aug 03 23:09:49 2020 +0200
d2014d1
riscv: remove redundant logical constraint.
by Heinrich Schuchardt
· Mon Aug 03 23:33:42 2020 +0200
6b15551
riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC level
by Bin Meng
· Sun Aug 02 23:09:04 2020 -0700
2b2d9c4
riscv: sifive/fu540: spl: Rename soc_spl_init()
by Bin Meng
· Sun Aug 02 23:09:03 2020 -0700
63dcfcb
riscv: Call spl_board_init_f() in the generic SPL board_init_f()
by Bin Meng
· Sun Aug 02 23:09:01 2020 -0700
e1ff6eb
sifive: reset: add DM based reset driver for SiFive SoC's
by Sagar Shrikant Kadam
· Wed Jul 29 02:36:13 2020 -0700
b0357f4
fu540: dtsi: add reset producer and consumer entries
by Sagar Shrikant Kadam
· Wed Jul 29 02:36:12 2020 -0700
a9e7ec5
riscv: dts: hifive-unleashed-a00: Make memory node available to SPL
by Bin Meng
· Sun Jul 19 23:06:34 2020 -0700
4e3ba2a
riscv: Fix linking error when building u-boot-spl with no SMP support
by Leo Yu-Chi Liang
· Mon Jun 29 16:27:28 2020 +0800
3af8678
Revert "riscv: Allow use of reset drivers"
by Bin Meng
· Sun Jul 19 20:06:45 2020 -0700
e70ef90
env: Enable SPI flash env for SiFive FU540
by Jagan Teki
· Wed Jul 15 15:39:00 2020 +0530
05fb96d
sifive: fu540: Add Booting from SPI
by Jagan Teki
· Wed Jul 15 15:38:59 2020 +0530
257875d
riscv: Make SiFive HiFive Unleashed board boot again
by Bin Meng
· Sun Jul 19 23:17:07 2020 -0700
90fa4e9
Merge branch 'next'
by Tom Rini
· Mon Jul 06 15:46:38 2020 -0400
8cfbea0
riscv: use log functions in fdt_fixup
by Heinrich Schuchardt
· Tue Jun 30 11:30:59 2020 +0200
8a52128
riscv: sifive: fu540: enable all cache ways from U-Boot proper
by Pragnesh Patel
· Fri May 29 12:14:51 2020 +0530
491734f
riscv: Use optimized version of fdtdec_get_addr_size_no_parent
by Atish Patra
· Wed Jun 24 14:56:15 2020 -0700
f0947db
riscv: Do not return error if reserved node already exists
by Atish Patra
· Wed Jun 24 14:56:14 2020 -0700
c71f100
riscv: Do not build reset.c if SYSRESET is on
by Bin Meng
· Mon Jun 22 22:29:44 2020 -0700
2bdcd05
riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE
by Bin Meng
· Thu Jun 25 18:16:08 2020 -0700
7a36bd8
riscv: Expand the DT size before copy reserved memory node
by Bin Meng
· Thu Jun 25 18:16:07 2020 -0700
77073f4
riscv: Avoid the reserved memory fixup if src and dst point to the same place
by Bin Meng
· Thu Jun 25 18:16:06 2020 -0700
3961e14
riscv: fu540: dts: Correct reg size of otp and dmc nodes
by Bin Meng
· Mon Jun 08 20:28:26 2020 -0700
e3870c8
riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node
by Bin Meng
· Mon Jun 08 20:28:25 2020 -0700
d2b7f84
riscv: dts: hifive-unleashed-a00: add cpu aliases
by Sagar Shrikant Kadam
· Sun Jun 28 07:45:00 2020 -0700
edc32ab
riscv: Add Sipeed Maix support
by Sean Anderson
· Wed Jun 24 06:41:25 2020 -0400
d11b582
riscv: Add device tree for K210 and Sipeed Maix BitM
by Sean Anderson
· Wed Jun 24 06:41:23 2020 -0400
35e14fb
riscv: Allow use of reset drivers
by Sean Anderson
· Wed Jun 24 06:41:20 2020 -0400
7f4b666
riscv: Add option to support RISC-V privileged spec 1.9
by Sean Anderson
· Wed Jun 24 06:41:19 2020 -0400
b1d0cb3
riscv: Clean up IPI initialization code
by Sean Anderson
· Wed Jun 24 06:41:18 2020 -0400
84df2e1
riscv: Clear pending interrupts before enabling IPIs
by Sean Anderson
· Wed Jun 24 06:41:17 2020 -0400
5aa0074
riscv: Add headers for asm/global_data.h
by Sean Anderson
· Wed Jun 24 06:41:16 2020 -0400
0961ae8
bdinfo: riscv: Use generic bd_info
by Simon Glass
· Sun May 10 14:16:26 2020 -0600
e622c74
riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01
by Bin Meng
· Wed May 27 02:04:53 2020 -0700
b391ead
riscv: sbi: Remove sbi_spec_version
by Bin Meng
· Wed May 27 02:04:52 2020 -0700
e00653c
riscv: sifive: fu540: add SPL configuration
by Pragnesh Patel
· Fri May 29 11:33:35 2020 +0530
25269c0
riscv: cpu: fu540: Add support for cpu fu540
by Pragnesh Patel
· Fri May 29 11:33:34 2020 +0530
01ec498
riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
by Pragnesh Patel
· Fri May 29 11:33:33 2020 +0530
bb337f9
riscv: sifive: dts: fu540: set ethernet clock rate
by Pragnesh Patel
· Fri May 29 11:33:32 2020 +0530
45ffc91
riscv: sifive: dts: fu540: add U-Boot dmc node
by Pragnesh Patel
· Fri May 29 11:33:28 2020 +0530
8f4a403
sifive: dts: fu540: Add DDR controller and phy register settings
by Pragnesh Patel
· Fri May 29 11:33:27 2020 +0530
b65f19f
riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
by Pragnesh Patel
· Fri May 29 11:33:25 2020 +0530
45b4ad9d
riscv: Add _image_binary_end for SPL
by Pragnesh Patel
· Fri May 29 11:33:23 2020 +0530
2a449a3
riscv: sifive: fu540: Use OTP DM driver for serial environment variable
by Pragnesh Patel
· Fri May 29 11:33:22 2020 +0530
a7edd07
riscv: Move all SMP related SBI calls to SBI_v01
by Atish Patra
· Tue Apr 21 14:51:57 2020 -0700
4dcacfc
common: Drop linux/bitops.h from common header
by Simon Glass
· Sun May 10 11:40:13 2020 -0600
0f2af88
common: Drop log.h from common header
by Simon Glass
· Sun May 10 11:40:05 2020 -0600
ed38aef
command: Remove the cmd_tbl_t typedef
by Simon Glass
· Sun May 10 11:40:03 2020 -0600
9758973
common: Drop init.h from common header
by Simon Glass
· Sun May 10 11:40:02 2020 -0600
2dc9c34
common: Drop image.h from common header
by Simon Glass
· Sun May 10 11:40:01 2020 -0600
1ea9789
common: Drop bootstage.h from common header
by Simon Glass
· Sun May 10 11:40:00 2020 -0600
274e0b0
common: Drop net.h from common header
by Simon Glass
· Sun May 10 11:39:56 2020 -0600
76c8522
sifive: fu540: Enable spi-nor flash support
by Jagan Teki
· Wed Apr 29 21:03:53 2020 +0530
0c2964b
riscv: dts: hifive-unleashed-a00: Add -u-boot.dtsi
by Jagan Teki
· Thu Apr 23 22:30:56 2020 +0530
82ed8ef
riscv: Move all fdt fixups together
by Atish Patra
· Tue Apr 21 11:15:04 2020 -0700
5fbac33
riscv: Copy the reserved-memory nodes to final DT
by Atish Patra
· Tue Apr 21 11:15:03 2020 -0700
7379192
riscv: Setup reserved-memory node for FU540
by Atish Patra
· Tue Apr 21 11:15:02 2020 -0700
111b804
riscv: Provide a mechanism to fix DT for reserved memory
by Atish Patra
· Tue Apr 21 11:15:01 2020 -0700
af3c043
riscv: Add boot hartid to device tree
by Atish Patra
· Tue Apr 21 11:14:59 2020 -0700
3aecc4b
riscv: Make SBI v0.2 the default SBI version
by Bin Meng
· Thu Apr 16 08:09:33 2020 -0700
a75325e
riscv: Add Kconfig option for SBI v0.2
by Bin Meng
· Thu Apr 16 08:09:32 2020 -0700
4997522
riscv: Add SMP Kconfig option dependency for U-Boot proper
by Bin Meng
· Thu Apr 16 08:09:31 2020 -0700
b161f90
riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL
by Bin Meng
· Thu Apr 16 08:09:30 2020 -0700
88fc2a5
riscv: Merge unnecessary SMP ifdefs in start.S
by Bin Meng
· Thu Apr 16 08:09:29 2020 -0700
6c1e6dd
riscv: qemu: Remove the simple-bus driver for the SoC node
by Bin Meng
· Thu Apr 16 08:09:28 2020 -0700
d12b55b
riscv: ax25: cache: Remove SPL_RISCV_MMODE config check
by Pragnesh Patel
· Sat Mar 14 19:12:28 2020 +0530
5d4ecf2
kconfig / kbuild: Re-sync with Linux 4.19
by Tom Rini
· Fri Mar 27 11:46:27 2020 -0400
b9d856f
Merge branch 'next' of git://git.denx.de/u-boot-usb into next
by Tom Rini
· Tue Mar 31 17:24:19 2020 -0400
f7e6d33
riscv: Implement new SBI v0.2 extensions
by Bin Meng
· Mon Mar 09 19:35:31 2020 -0700
887d809
riscv: Introduce a new config for SBI v0.1
by Bin Meng
· Mon Mar 09 19:35:30 2020 -0700
c20421b
riscv: Add SBI v0.2 extension definitions
by Bin Meng
· Mon Mar 09 19:35:29 2020 -0700
ee3bcd0
riscv: Add basic support for SBI v0.2
by Bin Meng
· Mon Mar 09 19:35:28 2020 -0700
9da11d1
riscv: Mark existing SBI as v0.1 SBI
by Bin Meng
· Mon Mar 09 19:35:27 2020 -0700
fb5eabc
riscv: Avoid calling sbi_clear_ipi()
by Bin Meng
· Fri Mar 06 00:44:17 2020 -0800
ad76cd4
riscv: Fix sbi_remote_sfence_vma{,_asid}
by Bin Meng
· Fri Mar 06 00:44:16 2020 -0800
8798f9c
Kconfig: Remove redundant variable sets
by Tom Rini
· Wed Mar 11 18:11:12 2020 -0400
6373a17
dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>
by Masahiro Yamada
· Fri Feb 14 16:40:19 2020 +0900
05a5dba
dma-mapping: fix the prototype of dma_unmap_single()
by Masahiro Yamada
· Fri Feb 14 16:40:18 2020 +0900
7167d67
dma-mapping: fix the prototype of dma_map_single()
by Masahiro Yamada
· Fri Feb 14 16:40:17 2020 +0900
b7b1838
Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
by Tom Rini
· Tue Feb 11 10:58:41 2020 -0500
750fee5
riscv: Remove unnecessary instruction
by Sean Anderson
· Mon Jan 27 16:39:44 2020 -0500
e8b46a1
riscv: Add option to print registers on exception
by Sean Anderson
· Wed Dec 25 00:27:44 2019 -0500
5e75a27
riscv: Fix breakage caused by linker relaxation
by Sean Anderson
· Tue Dec 17 21:35:32 2019 -0500
d66c5f7
dm: core: Require users of devres to include the header
by Simon Glass
· Mon Feb 03 07:36:15 2020 -0700
4a81a21
asm: dma-mapping.h: Fix dma mapping functions
by Vignesh Raghavendra
· Thu Jan 16 14:23:45 2020 +0530
Next »