| commit | bb337f91caea26c7852766a174f050254bf3cc99 | [log] [tgz] |
|---|---|---|
| author | Pragnesh Patel <pragnesh.patel@sifive.com> | Fri May 29 11:33:32 2020 +0530 |
| committer | Andes <uboot@andestech.com> | Thu Jun 04 09:44:09 2020 +0800 |
| tree | 82ee7dbb4ca86483275286099b026e7b7bf71d73 | |
| parent | e848dba72ff09111d4f36b0b2a205a9ae991e497 [diff] |
riscv: sifive: dts: fu540: set ethernet clock rate Set ethernet clock rate to 125 Mhz so that it will work with 1000Mbps, Earlier this is done by FSBL. With this change We can remove the ethernet clock rate code from FSBL. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>