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filogic
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uboot
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fcfd26ee82fe75148245f3a4017f149b5662b7c1
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arch
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riscv
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lib
c308e01
riscv: add option to wait for ack from secondary harts in smp functions
by Lukas Auer
· Sun Dec 08 23:28:51 2019 +0100
c7460b8
riscv: add functions for reading the IPI status
by Lukas Auer
· Sun Dec 08 23:28:50 2019 +0100
eb61303
riscv: andes_plic: Fix some wrong configurations
by Rick Chen
· Thu Nov 14 13:52:24 2019 +0800
9b61c7c
common: Move interrupt functions into a new header
by Simon Glass
· Thu Nov 14 12:57:41 2019 -0700
6333448
common: Move ARM cache operations out of common.h
by Simon Glass
· Thu Nov 14 12:57:39 2019 -0700
1d91ba7
common: Move some cache and MMU functions out of common.h
by Simon Glass
· Thu Nov 14 12:57:37 2019 -0700
b8745f0
RISC-V: Align boot image header with Linux
by Atish Patra
· Wed Oct 09 10:34:17 2019 -0700
eaae83b
riscv: andes_plic: init plic by scanning each cpu node
by Rick Chen
· Wed Aug 21 11:26:50 2019 +0800
e9fbc71
riscv: add a generic FIT generator script
by Lukas Auer
· Wed Aug 21 21:14:47 2019 +0200
396f0bd
riscv: add SPL support
by Lukas Auer
· Wed Aug 21 21:14:45 2019 +0200
6134659
riscv: add run mode configuration for SPL
by Lukas Auer
· Wed Aug 21 21:14:43 2019 +0200
d680e9a
efi_loader: use predefined constants in crt0_*_efi.S
by Heinrich Schuchardt
· Thu Jul 11 06:39:32 2019 +0200
583b409
RISCV: image: Add booti support
by Atish Patra
· Mon May 06 17:49:39 2019 -0700
e5e6c36
riscv: Introduce CONFIG_XIP to support booting from flash
by Rick Chen
· Tue Apr 30 13:49:33 2019 +0800
7376677
riscv: Add a SYSCON driver for Andestech's PLMT
by Rick Chen
· Tue Apr 02 15:56:40 2019 +0800
6df4ed0
riscv: Add a SYSCON driver for Andestech's PLIC
by Rick Chen
· Tue Apr 02 15:56:39 2019 +0800
c4a6c8f
riscv: boot images passed to bootm on all harts
by Lukas Auer
· Sun Mar 17 19:28:38 2019 +0100
a359665
riscv: add support for multi-hart systems
by Lukas Auer
· Sun Mar 17 19:28:37 2019 +0100
e79178b
riscv: implement IPI platform functions using SBI
by Lukas Auer
· Sun Mar 17 19:28:34 2019 +0100
83d573d
riscv: add infrastructure for calling functions on other harts
by Lukas Auer
· Sun Mar 17 19:28:32 2019 +0100
09dfc3c
riscv: use invalidate/flush_*cache_range functions in cache.c
by Lukas Auer
· Fri Jan 04 01:37:30 2019 +0100
6280e32
riscv: move the AX25-specific implementation of flush_dcache_all
by Lukas Auer
· Fri Jan 04 01:37:29 2019 +0100
8318e89
riscv: clarify error message on undefined exceptions
by Lukas Auer
· Fri Jan 04 01:37:28 2019 +0100
e63488f
riscv: bootm: Support booting VxWorks
by Bin Meng
· Fri Dec 21 07:13:41 2018 -0800
fda01b6
riscv: bootm: Change to use boot_hart from global data
by Bin Meng
· Wed Dec 12 06:12:46 2018 -0800
89681a7
riscv: Save boot hart id to the global data
by Bin Meng
· Wed Dec 12 06:12:45 2018 -0800
bcc6c74
riscv: Adjust the _exit_trap() position to come before handle_trap()
by Bin Meng
· Wed Dec 12 06:12:44 2018 -0800
f3c8479
riscv: Implement riscv_get_time() API using rdtime instruction
by Anup Patel
· Wed Dec 12 06:12:31 2018 -0800
b6ee5e1
riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
by Bin Meng
· Wed Dec 12 06:12:30 2018 -0800
89b3934
riscv: Add kconfig option to run U-Boot in S-mode
by Anup Patel
· Mon Dec 03 10:57:40 2018 +0530
5354888
riscv: efi: Generate Microsoft PE format compliant images
by Bin Meng
· Tue Oct 02 07:39:34 2018 -0700
842d580
riscv: cache: Implement i/dcache [status, enable, disable]
by Rick Chen
· Wed Nov 07 09:34:06 2018 +0800
86feab3
riscv: align bootm implementation with that of other architectures
by Lukas Auer
· Thu Nov 22 11:26:32 2018 +0100
7656228
riscv: implement the invalidate_icache_* functions
by Lukas Auer
· Thu Nov 22 11:26:23 2018 +0100
306b31d
riscv: hang on unhandled exceptions
by Lukas Auer
· Thu Nov 22 11:26:22 2018 +0100
ae525d5
riscv: treat undefined exception codes as reserved
by Lukas Auer
· Thu Nov 22 11:26:21 2018 +0100
40f7eb5
riscv: complete the list of exception codes
by Lukas Auer
· Thu Nov 22 11:26:20 2018 +0100
e429a1e
riscv: fix use of incorrectly sized variables
by Lukas Auer
· Thu Nov 22 11:26:17 2018 +0100
54ebfe7
riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I
by Lukas Auer
· Thu Nov 22 11:26:12 2018 +0100
635a253
riscv: bootm: Add dm_remove_devices_flags() call to do_bootm_linux()
by Bin Meng
· Mon Oct 15 02:20:59 2018 -0700
f25398e
riscv: cosmetic: Reword do_reset() printf message.
by Rick Chen
· Wed Oct 03 13:59:03 2018 +0800
de8d80e
riscv: Move do_reset() to a common place
by Bin Meng
· Wed Sep 26 06:55:22 2018 -0700
8294bb5
riscv: bootm: Pass mhartid CSR value to kernel
by Bin Meng
· Wed Sep 26 06:55:16 2018 -0700
aca590b
riscv: bootm: Correct the 1st kernel argument to hart id
by Bin Meng
· Wed Sep 26 06:55:08 2018 -0700
d9eec24
riscv: Remove setup.h
by Bin Meng
· Wed Sep 26 06:55:07 2018 -0700
b908d2e
riscv: Remove unused _relocate arguments
by Ivan Gorinov
· Thu Jun 28 14:50:17 2018 -0700
9dbb973
SPDX: Convert single license tags to Linux Kernel style
by Rick Chen
· Tue May 29 14:10:06 2018 +0800
7ea64b0
riscv: Add board_quiesce_devices stub
by Alexander Graf
· Mon Apr 23 07:59:46 2018 +0200
31bdde9
riscv: Add EFI application infrastructure
by Alexander Graf
· Mon Apr 23 07:59:45 2018 +0200
3bb8f01
riscv: Add setjmp/longjmp code
by Alexander Graf
· Mon Apr 23 07:59:43 2018 +0200
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
bdfb5c4
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
by Tom Rini
· Wed Apr 18 13:50:47 2018 -0400
53b47b8
riscv: bootm: Remove ATAGS
by Rick Chen
· Tue Mar 13 14:59:41 2018 +0800
632a569
riscv: bootm: Support to boot riscv-linux
by Rick Chen
· Tue Mar 13 14:48:33 2018 +0800
f8e3a12
riscv: checkpatch: Fix static const char * array declarations
by Rick Chen
· Mon Feb 12 11:24:43 2018 +0800
948de3b
riscv: checkpatch: Fix missing a blank line after declarations
by Rick Chen
· Mon Feb 12 11:21:28 2018 +0800
6eedd92
riscv: nx25: lib: Add relative lib funcs to support RISC-V
by Rick Chen
· Tue Dec 26 13:55:49 2017 +0800