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git01.mediatek.com
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filogic
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uboot
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fa7890ec1bad4e15dbe838666f1b836d6746544d
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drivers
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net
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zynq_gem.c
e5a70d4
net: gem: Disable broadcast setting
by Michal Simek
· Fri Oct 15 15:03:29 2021 +0200
3d6a9e0
net: gem: Fix setting PCS auto-negotiation state
by Robert Hancock
· Thu Mar 11 16:55:50 2021 -0600
179f7d7
net: gem: Fix error path in zynq_gem_probe
by Michal Simek
· Thu Feb 11 19:03:30 2021 +0100
68cd67d
net: gem: Enable ethernet rx clock for versal
by T Karthik Reddy
· Wed Feb 03 03:10:48 2021 -0700
4171095
clk: zynq: Add dummy clock enable function
by Michal Simek
· Tue Feb 09 15:28:15 2021 +0100
465437c
net: gem: unregister mdio bus if probe fails
by Michael Walle
· Wed Feb 10 22:41:57 2021 +0100
75e534b
dm: Avoid accessing seq directly
by Simon Glass
· Wed Dec 16 21:20:07 2020 -0700
aad29ae
dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
by Simon Glass
· Thu Dec 03 16:55:21 2020 -0700
fa20e93
dm: treewide: Rename dev_get_platdata() to dev_get_plat()
by Simon Glass
· Thu Dec 03 16:55:20 2020 -0700
71fa5b4
dm: treewide: Rename 'platdata' variables to just 'plat'
by Simon Glass
· Thu Dec 03 16:55:18 2020 -0700
8a2b47f
dm: treewide: Rename auto_alloc_size members to be shorter
by Simon Glass
· Thu Dec 03 16:55:17 2020 -0700
8ec9066
net: gem: Add support for more PHYs on MDIO bus
by Michal Simek
· Mon May 30 10:43:11 2016 +0200
43d9972
net: gem: Disable PCS autonegotiation in case of fixed-link
by Michal Simek
· Wed May 13 08:05:01 2020 -0600
4dcacfc
common: Drop linux/bitops.h from common header
by Simon Glass
· Sun May 10 11:40:13 2020 -0600
0f2af88
common: Drop log.h from common header
by Simon Glass
· Sun May 10 11:40:05 2020 -0600
274e0b0
common: Drop net.h from common header
by Simon Glass
· Sun May 10 11:39:56 2020 -0600
55ee186
net: zynq-gem: Setup and use mdio base separately
by Michal Simek
· Mon May 30 10:43:11 2016 +0200
4757253
net: zynq_gem: Add cache flush to zynq_gem_free_pkt
by Ashok Reddy Soma
· Sun Feb 23 08:01:29 2020 -0700
049c65b
net: zynq: Free allocated buffers in case of error
by Michal Simek
· Thu Feb 06 14:36:46 2020 +0100
60bf216
net: zynq_gem: Use ulong instead of u32 data type
by T Karthik Reddy
· Wed Jan 15 02:15:13 2020 -0700
9bc1564
dm: core: Create a new header file for 'compat' features
by Simon Glass
· Mon Feb 03 07:36:16 2020 -0700
d66c5f7
dm: core: Require users of devres to include the header
by Simon Glass
· Mon Feb 03 07:36:15 2020 -0700
c40c93e
net: zynq: Add a note about RX_BUF macro
by Michal Simek
· Wed May 22 14:12:20 2019 +0200
6333448
common: Move ARM cache operations out of common.h
by Simon Glass
· Thu Nov 14 12:57:39 2019 -0700
196c4c1
net: zynq_gem: Remove check for Versal
by Siva Durga Prasad Paladugu
· Mon Jul 01 12:19:25 2019 +0530
3d61161
net: zynq_gem: Add new versal compatible string
by Siva Durga Prasad Paladugu
· Thu Jul 25 23:07:59 2019 -0700
24003ee
net: gem: Remove DECLARE_GLOBAL_DATA_PTR from gem driver
by Michal Simek
· Thu Apr 25 11:30:22 2019 -0700
168cf70
net: gem: Remove phy autodetection code
by Michal Simek
· Fri Mar 29 09:25:09 2019 +0100
1220350
net: zynq_gem: Modify phy supported features after max-speed was set
by Siva Durga Prasad Paladugu
· Wed Mar 27 17:39:59 2019 +0530
0f407c9
zynq-gem: Use appropriate cache flush/invalidate for RX and TX
by Stefan Theil
· Mon Dec 17 09:12:30 2018 +0100
b7b3637
net: zynq_gem: Add check for 64-bit dma support by hardware
by Siva Durga Prasad Paladugu
· Mon Nov 26 16:27:39 2018 +0530
cbc2ed6
net: zynq_gem: Added 64-bit addressing support
by Vipul Kumar
· Mon Nov 26 16:27:38 2018 +0530
2874b2a
net: gem: Do not setup any clock for Xilinx SoC Versal
by Michal Simek
· Wed Aug 22 16:18:34 2018 +0200
8114538
net: zynq_gem: Add support for fixed-link phy
by Michal Simek
· Thu Sep 20 09:42:27 2018 +0200
9a6dc34
net: zynq_gem: Fix reading of max-speed property
by Siva Durga Prasad Paladugu
· Tue Sep 04 19:08:53 2018 +0530
34a48e5
net: zynq_gem: convert to use livetree
by Siva Durga Prasad Paladugu
· Mon Jul 16 18:25:45 2018 +0530
b5bc296
drivers: net: zynq_gem: fix phy dt node setting
by Grygorii Strashko
· Thu Jul 05 12:02:52 2018 -0500
d061bfd
net: zynq_gem: Initialize val variable in zynq_gem_miiphy_read()
by Michal Simek
· Thu Jun 14 09:08:44 2018 +0200
c8959f4
net: gem: Check return value from memalign/malloc
by Michal Simek
· Wed Jun 13 15:20:35 2018 +0200
952bdd3
net: zynq_gem: Initialize phyreg variable
by Michal Simek
· Wed Jun 13 10:33:49 2018 +0200
70551ca
net: zynq_gem: Fix return type for phy...()
by Michal Simek
· Wed Jun 13 10:00:30 2018 +0200
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
0703cc5
net: zynq_gem: Use max-speed property from dt
by Siva Durga Prasad Paladugu
· Thu Apr 12 12:22:17 2018 +0200
0dae065
net: zynq_gem: Dont run any phy detection logic for GMII case
by Siva Durga Prasad Paladugu
· Tue Feb 20 11:56:19 2018 +0530
918de03
wait_bit: use wait_for_bit_le32 and remove wait_for_bit
by Álvaro Fernández Rojas
· Tue Jan 23 17:14:55 2018 +0100
134cfa6
net: zynq_gem: Dont enable SGMII and PCS selection
by Siva Durga Prasad Paladugu
· Thu Nov 23 12:56:55 2017 +0530
8eefe0d
net: zynq_gem: Dont flush dummy descriptors
by Siva Durga Prasad Paladugu
· Tue May 30 14:28:40 2017 +0200
d6c7af0
net: zynq_gem: Use wait_for_bit with non breakable
by Siva Durga Prasad Paladugu
· Tue May 30 14:28:39 2017 +0200
fee13c3
net: zynq_gem: Do not return -ENOSYS on success
by Olliver Schinagl
· Mon Apr 03 16:18:53 2017 +0200
ba1dea4
dm: Rename dev_addr..() functions
by Simon Glass
· Wed May 17 17:18:05 2017 -0600
ba11ac2
Merge tag 'xilinx-for-v2017.05' of git://www.denx.de/git/u-boot-microblaze
by Tom Rini
· Thu Mar 16 16:44:23 2017 -0400
f429f56
net: zynq_gem: Fix masking of supported phydev features
by Nathan Rossi
· Mon Mar 06 00:36:23 2017 +1000
e67c6c4
zynq: Move zynq to clock framework
by Stefan Herbrechtsmeier
· Tue Jan 17 16:27:30 2017 +0100
bb43397
net: zynq: Add clk framework support to zynq ethernet driver
by Stefan Herbrechtsmeier
· Tue Jan 17 16:27:25 2017 +0100
3e47077
net: zynq: Don't overwrite gem_rclk_ctrl with default value
by Stefan Herbrechtsmeier
· Tue Jan 17 16:27:24 2017 +0100
dd79d6e
dm: core: Replace of_offset with accessor
by Simon Glass
· Tue Jan 17 16:52:55 2017 -0700
baa2035
net: zynq_gem: Use clock driver for ZynqMP
by Siva Durga Prasad Paladugu
· Tue Nov 15 16:15:42 2016 +0530
e670965
net: gem: Use wait_for_bit() instead of private mdio_wait()
by Michal Simek
· Mon Dec 12 09:47:26 2016 +0100
e4dab43
net: xilinx: Use mdio_register_seq() to support multiple instances
by Michal Simek
· Thu Dec 08 10:25:44 2016 +0100
edcfdbd
Revert "Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze"
by Tom Rini
· Fri Dec 09 07:56:54 2016 -0500
1e582b0
net: xilinx: Use mdio_register_seq() to support multiple instances
by Michal Simek
· Thu Dec 08 10:25:44 2016 +0100
fca1e84
common: miiphyutil: Work and report phy address in hex in mdio cmd
by Michal Simek
· Wed Nov 16 08:41:01 2016 +0100
f6c2d20
net: zynq_gem: Correct SGMII enable bit setting
by Siva Durga Prasad Paladugu
· Mon May 16 15:31:38 2016 +0530
7e7fcc3
net: zynq_gem: Modify the nwcfg bit definitions
by Siva Durga Prasad Paladugu
· Mon May 16 15:31:37 2016 +0530
64e4f7f
treewide: replace #include <asm-generic/errno.h> with <linux/errno.h>
by Masahiro Yamada
· Wed Sep 21 11:28:57 2016 +0900
39452be
Merge branch 'master' of git://git.denx.de/u-boot-net
by Tom Rini
· Tue May 24 11:59:02 2016 -0400
a582871
net: zynq_gem: Add the passing of the phy-handle node
by Dan Murphy
· Mon May 02 15:45:57 2016 -0500
24ce232
phy: Wire return value from phy_config()
by Michal Simek
· Wed May 18 14:37:23 2016 +0200
dbc0cfc
net: xilinx: Handle error value from phy_startup()
by Michal Simek
· Wed May 18 12:37:22 2016 +0200
4546700
net: zynq_gem: Add SGMII support for zynqMP
by Siva Durga Prasad Paladugu
· Fri Mar 25 12:53:44 2016 +0530
b81fe87
net: zynq_gem: Return error incase of invalid phy address
by Siva Durga Prasad Paladugu
· Wed Mar 30 12:29:49 2016 +0530
7f4e555
net: gem: Allow to set the MAC from an EEPROM
by Joe Hershberger
· Tue Jan 26 11:57:03 2016 -0600
65d3f3a
net: zynq_gem: Add support for SGMII interface
by Siva Durga Prasad Paladugu
· Fri Feb 05 13:22:11 2016 +0530
780c535
net: zynq: Change MDC setup for arm64
by Michal Simek
· Tue Sep 08 17:20:01 2015 +0200
93597d7
net: zynq_gem: Use shared wait_for_bit
by Mateusz Kulikowski
· Sat Jan 23 11:54:33 2016 +0100
27ba090
net: gem: Add driver dependencies to PHYLIB
by Michal Simek
· Fri Dec 11 09:14:31 2015 +0100
57b0269
net: gem: Separate recv and free_pkt functions
by Michal Simek
· Wed Dec 09 14:26:48 2015 +0100
139f410
net: gem: Fix return value from recv
by Michal Simek
· Wed Dec 09 14:16:32 2015 +0100
c6aa413
net: gem: Setup default phy address to -1
by Michal Simek
· Wed Dec 09 09:29:12 2015 +0100
d9cfa97
net: gem: Enable CTRL+C in wait_for_bit
by Michal Simek
· Thu Sep 24 20:13:45 2015 +0200
3c4ce3c
net: gem: Read information about interface from DT
by Michal Simek
· Mon Nov 30 14:17:50 2015 +0100
250e05e
net: gem: Move driver to DM
by Michal Simek
· Mon Nov 30 14:14:56 2015 +0100
3f8c635
net: gem: Fix miiphy_read name
by Michal Simek
· Mon Nov 30 14:14:37 2015 +0100
df3b414
net: gem: Remove zynq_gem_of_init()
by Michal Simek
· Mon Nov 30 14:00:20 2015 +0100
e9ecc1c
net: gem: Enable MDIO bus earlier
by Michal Simek
· Mon Nov 30 13:58:36 2015 +0100
2c68e08
net: gem: Check if priv->phydev is valid
by Michal Simek
· Mon Nov 30 14:03:37 2015 +0100
7cd7ea6
net: gem: Extract phy init code
by Michal Simek
· Mon Nov 30 13:54:43 2015 +0100
43b3832
net: gem: Remove phydev variable
by Michal Simek
· Mon Nov 30 13:44:49 2015 +0100
1a63ee2
net: gem: Change mii function not to use eth_device structure
by Michal Simek
· Mon Nov 30 10:24:15 2015 +0100
3ce1615
net: gem: Change mdio_wait prototype to pass regs
by Michal Simek
· Mon Nov 30 10:09:43 2015 +0100
75fbb69
net: gem: Do not continue if phy is not found
by Michal Simek
· Mon Nov 30 13:38:32 2015 +0100
728d32e
net: zynq: Fix MDC setting for zynq
by Michal Simek
· Tue Sep 08 17:07:01 2015 +0200
d5abec6
net: zynq: Remove unused MDCCLKDIV2 macro
by Michal Simek
· Tue Sep 08 16:54:39 2015 +0200
6429595
net: zynq: Fix mdc clock division setting for 100Mbit/s
by Michal Simek
· Tue Sep 08 16:55:42 2015 +0200
975ae35
net: zynq: Wait till packet is sent
by Michal Simek
· Mon Aug 17 09:57:46 2015 +0200
2304511
net: zynq: Disable secondary queues
by Edgar E. Iglesias
· Fri Sep 25 23:50:07 2015 -0700
1dc446e
net: zynq: Add dummy packet to fix packet duplication issue
by Michal Simek
· Mon Aug 17 09:58:54 2015 +0200
f91f7e5
net: zynq: Do not report TX underrun
by Michal Simek
· Mon Aug 17 09:51:34 2015 +0200
b6fe7ad
net: zynq: Setup BD when structures are filled
by Michal Simek
· Mon Aug 17 09:50:09 2015 +0200
c6eb0bc
net: zynq: Allocate BD_SPACE in connection to RX_BUF
by Michal Simek
· Mon Aug 17 09:45:53 2015 +0200
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