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git01.mediatek.com / filogic / uboot / f9cb31e12bd547fc898316775495ea68c49e713e / arch / arm / dts / socfpga_arria10.dtsi
  1. 66803de ARM: dts: socfpga: Adjust NAND register layout on Arria10 by Marek Vasut · Mon May 07 22:22:26 2018 +0200
  2. 03f80b1 ARM: socfpga: Synchronize Arria10 DTs by Marek Vasut · Mon Apr 23 01:37:57 2018 +0200
  3. feaa3f9 dts: cadence_spi: Sync DT bindings with Linux by Jason Rush · Tue Jan 23 17:13:10 2018 -0600
  4. 2f72120 arm: dts: Add dts and dtsi for Arria 10 by Ley Foon Tan · Wed Apr 26 02:44:44 2017 +0800