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git01.mediatek.com / filogic / uboot / f94b26109b51f02fcd5930cfbbc24a865e6e4e81 / drivers / clk / renesas / r8a774c0-cpg-mssr.c
  1. 7885dca clk: renesas: Drop include common.h by Marek Vasut · Sun Jan 21 18:31:21 2024 +0100
  2. 8d712ee clk: renesas: Synchronize RZ R8A774C0 RZ/G2E clock tables with Linux 6.6.3 by Marek Vasut · Sun Dec 03 14:15:19 2023 +0100
  3. 2f8e987 clk: renesas: Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.5.3 by Marek Vasut · Sun Sep 17 16:11:40 2023 +0200
  4. f6b3202 clk: renesas: Add and enable CPG reset driver by Marek Vasut · Thu Jan 26 21:02:03 2023 +0100
  5. d4b102a clk: renesas: Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.1.7 by Marek Vasut · Thu Jan 26 21:01:59 2023 +0100
  6. 814217e clk: renesas: Make reset controller modemr register offset configurable by Marek Vasut · Sun Apr 25 21:53:05 2021 +0200
  7. 8538d53 clk: renesas: Synchronize RZ/G2 tables with Linux 5.12 by Marek Vasut · Sun Apr 25 21:08:18 2021 +0200
  8. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  9. 3434a5f clk: renesas: Import R8A774C0 clock tables from Linux 5.9 by Lad Prabhakar · Fri Oct 16 08:37:14 2020 +0100