1. 95ed0d0 script: remove CONFIG_SYS_CCSRBAR_DEFAULT from white list by York Sun · Thu Dec 01 13:43:06 2016 -0800
  2. c06b30a armv8/fsl-lsch2: Implement workaround for PIN MUX erratum A010539 by Hou Zhiqiang · Thu Sep 29 12:42:44 2016 +0800
  3. 2945ae0 armv8: fsl-lsch2: enable snoopable sata read and write by Tang Yuantian · Mon Aug 08 15:07:20 2016 +0800
  4. b3d7164 armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option ARCH_LS1021A by York Sun · Mon Sep 26 08:09:26 2016 -0700
  5. 2b5b7a9 armv8: fsl_lsch2: Add SerDes 2 support by Qianyu Gong · Tue Jul 05 16:01:54 2016 +0800
  6. 7980839 armv8: fsl-layerscape: Add A72 core detection by Alison Wang · Tue Jul 05 16:01:52 2016 +0800
  7. 386f2e4 include: usb: Rename USB controller base address mapping by Rajesh Bhagat · Tue Jun 07 18:59:34 2016 +0530
  8. 9282d26 arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper by Sriram Dash · Mon Jun 13 09:58:32 2016 +0530
  9. d169ebe armv8: fsl-layerscape: Add support of QorIQ LS1012A SoC by Prabhakar Kushwaha · Fri Jun 03 18:41:31 2016 +0530
  10. 177fca8 arch/arm: add SEC JR0 offset by Alex Porosanu · Fri Apr 29 15:17:58 2016 +0300
  11. c4713ec secure_boot: create function to determine boot mode by Aneesh Bansal · Fri Jan 22 16:37:25 2016 +0530
  12. 8ba6606 armv8: fsl-layerscape: fixes lsch2 serdes registers define by Shaohui Xie · Mon Dec 14 18:05:35 2015 +0800
  13. 8beb075 armv8/ls1043a: Implement workaround for PEX erratum A009929 by Mingkai Hu · Mon Dec 07 16:58:54 2015 +0800
  14. adbc8bd armv8/fsl_lsch2: fix DCSR_DCFG address by Mingkai Hu · Mon Dec 07 16:58:53 2015 +0800
  15. b3e9820 armv8/ls1043ardb: add SECURE BOOT target for NOR by Aneesh Bansal · Tue Dec 08 13:54:29 2015 +0530
  16. 0ea9b3d armv8/ls1043ardb: add USB support by Gong Qianyu · Wed Nov 11 17:58:40 2015 +0800
  17. 1921899 pci/layerscape: add support for LS1043A PCIe LUT register access by Mingkai Hu · Wed Nov 11 17:58:34 2015 +0800
  18. e4e93ea armv8/fsl_lsch2: Add fsl_lsch2 SoC by Mingkai Hu · Mon Oct 26 19:47:51 2015 +0800