| commit | 177fca85e47f6ef0fa5d1a88189857e2805c97f9 | [log] [tgz] |
|---|---|---|
| author | Alex Porosanu <alexandru.porosanu@freescale.com> | Fri Apr 29 15:17:58 2016 +0300 |
| committer | York Sun <york.sun@nxp.com> | Wed May 18 08:51:46 2016 -0700 |
| tree | a187ad9403f8e304c9dd954aec3a8aad51557e08 | |
| parent | 1e98bab48ab0e97116ca343b5973e0751552398a [diff] |
arch/arm: add SEC JR0 offset Freescale PPC SoCs do not hard-code security engine's Job Ring 0 address, rather a define is used. This patch adds the same functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts) Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>