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git01.mediatek.com / filogic / uboot / f0c6051c56911dc26155296f453da406501cb7d2 / arch / riscv / dts / fu540-c000-u-boot.dtsi
  1. 2dc5984 riscv: fu540: dts: Correct reg size of clint node by Pragnesh Patel · Tue Oct 20 11:03:02 2020 +0530
  2. 3d999194 riscv: Update SiFive device tree for new CLINT driver by Sean Anderson · Mon Sep 28 10:52:29 2020 -0400
  3. b0357f4 fu540: dtsi: add reset producer and consumer entries by Sagar Shrikant Kadam · Wed Jul 29 02:36:12 2020 -0700
  4. 8a52128 riscv: sifive: fu540: enable all cache ways from U-Boot proper by Pragnesh Patel · Fri May 29 12:14:51 2020 +0530
  5. 3961e14 riscv: fu540: dts: Correct reg size of otp and dmc nodes by Bin Meng · Mon Jun 08 20:28:26 2020 -0700
  6. e3870c8 riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node by Bin Meng · Mon Jun 08 20:28:25 2020 -0700
  7. bb337f9 riscv: sifive: dts: fu540: set ethernet clock rate by Pragnesh Patel · Fri May 29 11:33:32 2020 +0530
  8. 45ffc91 riscv: sifive: dts: fu540: add U-Boot dmc node by Pragnesh Patel · Fri May 29 11:33:28 2020 +0530
  9. b65f19f riscv: sifive: dts: fu540: Add board -u-boot.dtsi files by Pragnesh Patel · Fri May 29 11:33:25 2020 +0530
  10. 2a449a3 riscv: sifive: fu540: Use OTP DM driver for serial environment variable by Pragnesh Patel · Fri May 29 11:33:22 2020 +0530