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filogic
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uboot
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f04dfff301278f8f84dca1d56817f1e667441ef8
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arch
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riscv
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dts
e552af3
riscv: dts: add SiFive Unmatched board support
by Green Wan
· Thu May 27 06:52:12 2021 -0700
06a3e40
riscv: dts: add fu740 support
by Green Wan
· Thu May 27 06:52:11 2021 -0700
6b977a4
riscv: ae350: Switch to use binman to generate u-boot.itb
by Bin Meng
· Mon May 10 20:23:40 2021 +0800
1255ab8
riscv: qemu: Switch to use binman to generate u-boot.itb
by Bin Meng
· Mon May 10 20:23:39 2021 +0800
eada910
riscv: dts: Sort build targets in alphabetical order
by Bin Meng
· Mon May 10 20:23:38 2021 +0800
ced2097
riscv: sifive: unleashed: Switch to use binman to generate u-boot.itb
by Bin Meng
· Mon May 10 20:23:35 2021 +0800
72422b9
riscv: Don't reserve AI ram in k210 dts
by Sean Anderson
· Thu Apr 08 22:13:13 2021 -0400
b23d757
riscv: k210: Use AI as the parent clock of aisram, not PLL1
by Sean Anderson
· Thu Apr 08 22:13:12 2021 -0400
7be6d2b
riscv: k210: Rename airam to aisram
by Sean Anderson
· Thu Apr 08 22:13:11 2021 -0400
e8d9e3a
riscv: Enable some devices pre-relocation
by Sean Anderson
· Thu Apr 08 22:13:09 2021 -0400
c88bdaa
riscv: dts: mpfs-icicle-kit: Drop 'clock-frequency' in the uart nodes
by Bin Meng
· Wed Mar 31 15:24:50 2021 +0800
e9ead4a
riscv: sifive: Rename fu540 board to unleashed
by Bin Meng
· Wed Mar 17 11:10:58 2021 +0800
1c30c0e
riscv: Add watchdog bindings for the k210
by Sean Anderson
· Wed Mar 10 21:02:21 2021 -0500
0937c19
riscv: k210: Enable QSPI for spi3
by Sean Anderson
· Thu Feb 04 23:11:19 2021 -0500
5854c3d
riscv: dts: Add device tree for Microchip Icicle Kit
by Padmarao Begari
· Fri Jan 15 08:20:39 2021 +0530
2ddd3e0
riscv: Add device tree bindings for SPI
by Sean Anderson
· Fri Oct 16 18:57:54 2020 -0400
fd9571a
spi: dw: Add SoC-specific compatible strings
by Sean Anderson
· Fri Oct 16 18:57:50 2020 -0400
2dc5984
riscv: fu540: dts: Correct reg size of clint node
by Pragnesh Patel
· Tue Oct 20 11:03:02 2020 +0530
d1b3321
riscv: k210: Reduce DMA block size
by Sean Anderson
· Mon Oct 12 14:18:15 2020 -0400
36d38fd
riscv: add DT binding for BOOT button on Maix board
by Heinrich Schuchardt
· Mon Sep 14 11:02:05 2020 -0400
6870556
riscv: Add pinmux and gpio bindings for Kendryte K210
by Sean Anderson
· Mon Sep 14 11:02:04 2020 -0400
3d999194
riscv: Update SiFive device tree for new CLINT driver
by Sean Anderson
· Mon Sep 28 10:52:29 2020 -0400
c6d0ef8
riscv: Update Kendryte device tree for new CLINT driver
by Sean Anderson
· Mon Sep 28 10:52:28 2020 -0400
b0357f4
fu540: dtsi: add reset producer and consumer entries
by Sagar Shrikant Kadam
· Wed Jul 29 02:36:12 2020 -0700
a9e7ec5
riscv: dts: hifive-unleashed-a00: Make memory node available to SPL
by Bin Meng
· Sun Jul 19 23:06:34 2020 -0700
05fb96d
sifive: fu540: Add Booting from SPI
by Jagan Teki
· Wed Jul 15 15:38:59 2020 +0530
90fa4e9
Merge branch 'next'
by Tom Rini
· Mon Jul 06 15:46:38 2020 -0400
8a52128
riscv: sifive: fu540: enable all cache ways from U-Boot proper
by Pragnesh Patel
· Fri May 29 12:14:51 2020 +0530
3961e14
riscv: fu540: dts: Correct reg size of otp and dmc nodes
by Bin Meng
· Mon Jun 08 20:28:26 2020 -0700
e3870c8
riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node
by Bin Meng
· Mon Jun 08 20:28:25 2020 -0700
d2b7f84
riscv: dts: hifive-unleashed-a00: add cpu aliases
by Sagar Shrikant Kadam
· Sun Jun 28 07:45:00 2020 -0700
d11b582
riscv: Add device tree for K210 and Sipeed Maix BitM
by Sean Anderson
· Wed Jun 24 06:41:23 2020 -0400
e00653c
riscv: sifive: fu540: add SPL configuration
by Pragnesh Patel
· Fri May 29 11:33:35 2020 +0530
01ec498
riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
by Pragnesh Patel
· Fri May 29 11:33:33 2020 +0530
bb337f9
riscv: sifive: dts: fu540: set ethernet clock rate
by Pragnesh Patel
· Fri May 29 11:33:32 2020 +0530
45ffc91
riscv: sifive: dts: fu540: add U-Boot dmc node
by Pragnesh Patel
· Fri May 29 11:33:28 2020 +0530
8f4a403
sifive: dts: fu540: Add DDR controller and phy register settings
by Pragnesh Patel
· Fri May 29 11:33:27 2020 +0530
b65f19f
riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
by Pragnesh Patel
· Fri May 29 11:33:25 2020 +0530
2a449a3
riscv: sifive: fu540: Use OTP DM driver for serial environment variable
by Pragnesh Patel
· Fri May 29 11:33:22 2020 +0530
76c8522
sifive: fu540: Enable spi-nor flash support
by Jagan Teki
· Wed Apr 29 21:03:53 2020 +0530
0c2964b
riscv: dts: hifive-unleashed-a00: Add -u-boot.dtsi
by Jagan Teki
· Thu Apr 23 22:30:56 2020 +0530
314d3ef
riscv: dts: Add #address-cells and #size-cells in nor node
by Rick Chen
· Thu Nov 14 13:52:29 2019 +0800
3209fb8
riscv: dts: Support four cores SMP
by Rick Chen
· Thu Nov 14 13:52:28 2019 +0800
a8ed626
riscv: dts: Add hifive-unleashed-a00 dts from Linux
by Jagan Teki
· Mon Nov 18 16:59:40 2019 +0530
5ff8f41
riscv: dts: move out AE350 L2 node from cpus node
by Rick Chen
· Wed Aug 28 18:46:10 2019 +0800
a009fa7
dts: switch spi-flash to jedec, spi-nor compatible
by Neil Armstrong
· Sun Feb 10 10:16:20 2019 +0000
5ca381e
riscv: dts: fix CONFIG_DEFAULT_DEVICE_TREE failure
by Rick Chen
· Wed Apr 03 10:43:37 2019 +0800
5e56cda
riscv: dts: ae350 support SMP
by Rick Chen
· Tue Apr 02 15:56:43 2019 +0800
f331b9b
riscv: Remove ae350.dts
by Bin Meng
· Wed Dec 12 06:12:47 2018 -0800
baaa062
riscv: dts: Add ae350_32.dts for RV32I
by Rick Chen
· Tue Nov 13 16:33:29 2018 +0800
2dab6d4
riscv: dts: Sync to Linux Kernel ae350 dts.
by Rick Chen
· Tue Nov 13 15:13:34 2018 +0800
6e1033f
riscv: ae350: Clean up mixed tabs and spaces in the dts
by Bin Meng
· Wed Sep 26 06:55:18 2018 -0700
ed4a3b3
riscv: dts: Support cfi flash
by Rick Chen
· Tue May 29 11:05:54 2018 +0800
c7cccef
riscv: dts: Sync DT with Linux Kernel
by Rick Chen
· Tue May 29 10:53:41 2018 +0800
b66af37
riscv: cpu: nx25: Rename as ax25
by Rick Chen
· Tue May 29 09:54:40 2018 +0800
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
ef6b196
riscv: dts: AE250 support sd High-Speed mode
by Rick Chen
· Mon Dec 25 17:05:39 2017 +0800
2e4fc1b
riscv: nx25: dts: Add AE250 dts to support RISC-V
by Rick Chen
· Tue Dec 26 13:55:50 2017 +0800