1. 6280e32 riscv: move the AX25-specific implementation of flush_dcache_all by Lukas Auer · Fri Jan 04 01:37:29 2019 +0100
  2. 89681a7 riscv: Save boot hart id to the global data by Bin Meng · Wed Dec 12 06:12:45 2018 -0800
  3. 1f46f6d riscv: Return to previous privilege level after trap handling by Bin Meng · Wed Dec 12 06:12:43 2018 -0800
  4. ea95452 riscv: Fix context restore before returning from trap handler by Bin Meng · Wed Dec 12 06:12:42 2018 -0800
  5. 2e128a7 riscv: Move trap handler codes to mtrap.S by Bin Meng · Wed Dec 12 06:12:41 2018 -0800
  6. a7544ed riscv: Do some basic architecture level cpu initialization by Bin Meng · Wed Dec 12 06:12:40 2018 -0800
  7. edfe9a9 riscv: Update supports_extension() to use desc from cpu driver by Bin Meng · Wed Dec 12 06:12:38 2018 -0800
  8. 2caa1ee riscv: Remove non-DM version of print_cpuinfo() by Bin Meng · Wed Dec 12 06:12:35 2018 -0800
  9. 7a3bbfb riscv: Probe cpus during boot by Bin Meng · Wed Dec 12 06:12:34 2018 -0800
  10. 8fa4478 riscv: qemu: Add platform-specific Kconfig options by Bin Meng · Wed Dec 12 06:12:32 2018 -0800
  11. 4b284ad riscv: ax25: Hide the ax25-specific Kconfig option by Bin Meng · Wed Dec 12 06:12:28 2018 -0800
  12. 66c6935 riscv: qemu: Create a simple-bus driver for the soc node by Bin Meng · Wed Dec 12 06:12:25 2018 -0800
  13. 2a21815 riscv: ax25-ae350: Pass dtb address to u-boot with a1 register by Rick Chen · Mon Dec 03 17:48:20 2018 +0800
  14. 89b3934 riscv: Add kconfig option to run U-Boot in S-mode by Anup Patel · Mon Dec 03 10:57:40 2018 +0530
  15. 842d580 riscv: cache: Implement i/dcache [status, enable, disable] by Rick Chen · Wed Nov 07 09:34:06 2018 +0800
  16. 39a652b riscv: save hart ID and device tree passed by prior boot stage by Lukas Auer · Thu Nov 22 11:26:29 2018 +0100
  17. 8598e6b riscv: do not blindly modify the mstatus CSR by Lukas Auer · Thu Nov 22 11:26:28 2018 +0100
  18. 230ab8a riscv: remove unused labels in start.S by Lukas Auer · Thu Nov 22 11:26:27 2018 +0100
  19. ccd035a Drop CONFIG_INIT_CRITICAL by Bin Meng · Thu Nov 22 11:26:26 2018 +0100
  20. af51285 riscv: align mtvec on a 4-byte boundary by Lukas Auer · Thu Nov 22 11:26:25 2018 +0100
  21. 7cf4368 riscv: fix inconsistent use of spaces and tabs in start.S by Lukas Auer · Thu Nov 22 11:26:24 2018 +0100
  22. de8d80e riscv: Move do_reset() to a common place by Bin Meng · Wed Sep 26 06:55:22 2018 -0700
  23. 8a8694d riscv: Add QEMU virt board support by Bin Meng · Wed Sep 26 06:55:21 2018 -0700
  24. bcb3843 riscv: Make start.S available for all targets by Bin Meng · Wed Sep 26 06:55:17 2018 -0700
  25. 055700e riscv: Add a helper routine to print CPU information by Bin Meng · Wed Sep 26 06:55:14 2018 -0700
  26. c7feb19 riscv: Fix coding style issues in the linker script by Bin Meng · Wed Sep 26 06:55:12 2018 -0700
  27. a28e0f5 riscv: Move the linker script to the CPU root directory by Bin Meng · Wed Sep 26 06:55:11 2018 -0700
  28. b28f7b3 riscv: Include bss subsections in linker script by Alexander Graf · Mon Aug 20 14:25:49 2018 +0200
  29. 94a10f2 efi_loader: Rename sections to allow for implicit data by Alexander Graf · Tue Jun 12 07:48:37 2018 +0200
  30. b66af37 riscv: cpu: nx25: Rename as ax25 by Rick Chen · Tue May 29 09:54:40 2018 +0800
  31. 9677a37 efi_loader: Enable RISC-V support by Rick Chen · Mon May 28 19:06:37 2018 +0800
  32. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  33. 40a6fe7 riscv: ae250: Support DT provided by the board at runtime by Rick Chen · Thu Mar 29 10:08:33 2018 +0800
  34. e76b804 riscv: cpu: Add nx25 to support RISC-V by Rick Chen · Tue Dec 26 13:55:48 2017 +0800