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git01.mediatek.com / filogic / uboot / df4262f7923cd08e0b3cb924afc17f8941c3da32 / include / fsl_ddr.h
  1. d259d9c global: Remove unused CONFIG defines by Tom Rini · 1 year, 11 months ago
  2. f839dd0 Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to Kconfig by Tom Rini · 2 years, 4 months ago
  3. ed38aef command: Remove the cmd_tbl_t typedef by Simon Glass · 4 years, 7 months ago
  4. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  5. d3e6816 Revert "drivers/ddr/fsl: Dual-license DDR driver" by Tom Rini · 7 years ago
  6. 6d49eda drivers/ddr/fsl: Dual-license DDR driver by York Sun · 7 years ago
  7. fe84507 ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS by York Sun · 8 years ago
  8. 15875a5 fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum by Shengzhou Liu · 8 years ago
  9. e237880 Add more SPDX-License-Identifier tags by Tom Rini · 9 years ago
  10. d957a67 drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3 by York Sun · 9 years ago
  11. 999273f drivers/ddr/fsl: Adjust bstopre value by York Sun · 9 years ago
  12. b10d1b7 driver/ddr/fsl: Add a hook to update SPD address by York Sun · 10 years ago
  13. 55eb5fa drivers/ddr/fsl: Update DDR driver for DDR4 by York Sun · 10 years ago
  14. 8ced050 driver/ddr/fsl: Add sync of refresh by York Sun · 10 years ago
  15. 2c0b62d driver/ddr/fsl: Add support for multiple DDR clocks by York Sun · 10 years ago
  16. 70acb34 arm/ls1021a: Add workaround for DDR erratum A008378 by York Sun · 10 years ago
  17. 79a779b driver/ddr: Restruct driver to allow standalone memory space by York Sun · 10 years ago
  18. 2896cb7 driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · 11 years ago
  19. 29647ab driver/ddr: Change Freescale ARM DDR driver to support both big and little endian by York Sun · 11 years ago
  20. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · 11 years ago[Renamed (96%) from arch/powerpc/cpu/mpc8xxx/ddr/ddr.h]
  21. 4a71741 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · 11 years ago
  22. 5e15555 powerpc/mpc8xxx: Add memory reset control by York Sun · 11 years ago
  23. 4379438 powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands by James Yang · 12 years ago
  24. bd495cf powerpc/8xxx: Add support for interactive DDR programming interface by York Sun · 13 years ago
  25. e73cc04 powerpc/mpc8xxx: Enable calculation for fixed DDR chips by York Sun · 13 years ago
  26. b78c7bf powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq() by Kumar Gala · 14 years ago
  27. 27f83be powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3 by York Sun · 14 years ago
  28. 80ad401 8xxx/ddr: add support to only compute the ddr sdram size by Haiying Wang · 14 years ago
  29. 93799ca powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 by york · 14 years ago
  30. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc8xxx/ddr/ddr.h]
  31. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc8xxx/ddr/ddr.h]
  32. 68ef4bd fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT by Kumar Gala · 15 years ago
  33. fa44036 Pass dimm parameters to populate populate controller options by Haiying Wang · 16 years ago
  34. 0383694 rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · 16 years ago
  35. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago