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git01.mediatek.com / filogic / uboot / df1d94b54383001005d2fa1cee5574fc6dd23cfc / arch / arm / mach-socfpga / wrap_sdram_config.c
  1. dec7ea0 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" by Tom Rini · Mon May 20 13:35:03 2024 -0600
  2. abb9a04 Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" by Tom Rini · Sat May 18 20:20:43 2024 -0600
  3. c77f48c arm: socfpga: Remove <common.h> and add needed includes by Tom Rini · Tue Apr 30 07:35:34 2024 -0600
  4. dcdd3bd global: Migrate CONFIG_HPS* symbols to the CFG namespace by Tom Rini · Fri Oct 28 20:27:14 2022 -0400
  5. 6bccacf ddr: altera: Add DDR2 support to Gen5 driver by Marek Vasut · Fri Oct 18 00:22:31 2019 +0200
  6. ceab269 arm: socfpga: make config structs const by Simon Goldschmidt · Wed Nov 14 21:05:12 2018 +0100
  7. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  8. 3ea5951 ddr: altera: Configuring SDRAM extra cycles timing parameters by Chin Liang See · Wed Sep 21 10:25:56 2016 +0800
  9. 372f70d arm: socfpga: Switch to filtered QTS files by Marek Vasut · Mon Aug 10 21:21:07 2015 +0200
  10. aefb78d arm: socfpga: Move wrappers into platform directory by Marek Vasut · Sun Aug 02 21:12:09 2015 +0200[Renamed (98%) from board/altera/socfpga/wrap_sdram_config.c]
  11. f00a6ea ddr: altera: sequencer: Wrap misc remaining macros by Marek Vasut · Sun Aug 02 19:18:47 2015 +0200
  12. 3bf9204 ddr: altera: sequencer: Wrap IO_* macros by Marek Vasut · Sun Aug 02 19:00:23 2015 +0200
  13. 39b620e ddr: altera: sequencer: Wrap RW_MGR_* macros by Marek Vasut · Sun Aug 02 18:12:08 2015 +0200
  14. 3384e74 ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_init by Marek Vasut · Sun Aug 02 17:15:19 2015 +0200
  15. 32ada57 ddr: altera: sdram: Introduce socfpga_sdram_get_config() by Marek Vasut · Sat Aug 01 21:35:18 2015 +0200